Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[SiliconFly]

.

 

[igor_kavinski]

If ARL Refresh has 32 REAL cores (8P+24E), that's gonna be one interesting chip. Probably gonna need minimum 8800 MT/s CUDIMM based DDR5 to feed all those cores.

 

[cebri1]

Same value as any other academic experiments/research. Assuming that these articles on Semiwiki are by the same author they provide a bit more context into what he does - https://semiwiki.com/author/fred-chen/

As for why people saw fit to distribute the information? Well, isn't it obvious given the glee with which many claimed it as proof that Intel 3 yields were horrible? I always find it confusing when supposed technology enthusiasts wish to be dependent on South Korea and Taiwan for leading edge manufacturing.

Intel Direct Connect Event - Semiwiki

On Wednesday, February 21st Intel held their first Foundry Direct Connect event. The event had both public and NDA sessions, and I was in both. In this article I will summarize what I learned (that is not covered by NDA) about Intel’s business, process, and wafer fab plans (my focus is process...

semiwiki.com

"I can’t discuss specifics, but Intel showed strong yield data for i7 down through 18A."

So either they were shown false data, or the intel yield drama is a "bit" over blown. The fact that they publicly announced D0 <0.40 for 18A, makes me think the latter is the correct one.

 

[OriAr]

Intel Direct Connect Event - Semiwiki

On Wednesday, February 21st Intel held their first Foundry Direct Connect event. The event had both public and NDA sessions, and I was in both. In this article I will summarize what I learned (that is not covered by NDA) about Intel’s business, process, and wafer fab plans (my focus is process...

semiwiki.com

"I can’t discuss specifics, but Intel showed strong yield data for i7 down through 18A."

So either they were shown false data, or the intel yield drama is a "bit" over blown.

Overblown doesn't even begin to cover it.
It has d0 of less than 0.4, that's perfectly fine for a process that's at least 6 months away from HVM, despite what all the FUD spreaders like to say.
Potential customers only got PDK 1.0 last month, having fairly good yields already will help Intel at least start getting some business from them. (Rumor mill says Nvidia is getting wafers on Intel 3 next year for a GPU chiplet they are making for MediaTek's WoA SoC for a start)

 

[igor_kavinski]

(Rumor mill says Nvidia is getting wafers on Intel 3 next year for a GPU chiplet they are making for MediaTek's WoA SoC for a start)

That actually makes perfect sense. Nvidia experimenting with WoA SoC on Intel's experimental process. Cool.

 

[cebri1]

Overblown doesn't even begin to cover it.
It has d0 of less than 0.4, that's perfectly fine for a process that's at least 6 months away from HVM, despite what all the FUD spreaders like to say.
Potential customers only got PDK 1.0 last month, having fairly good yields already will help Intel at least start getting some business from them. (Rumor mill says Nvidia is getting wafers on Intel 3 next year for a GPU chiplet they are making for MediaTek's WoA SoC for a start)

Intel 3 yield issue also do not make much sense, because Intel 4 seems to be yielding well (over 15M units produced in the last 9 months).

Edit: Btw, I think someone also mentioned it. 20A being scrapped is probably because 18A with PowerVia had good enough yields, and 20A use was going to be limited (one ARL-S SKU that we know off). However, 18A is falling short on performance expectations (from around 25% improvement in perf/W over Intel 3 to only 15%). The new 18A-P node they added to the roadmap will have the expected additional 10% improvement, but I don't think that will be ready before end of 25, early 26.

 

[fastandfurious6]

I missed on bitcoin, ethereum, dogecoin, gamestop, every tech stock ever

I'm now going all in, this is the beginning of Intel's end!

 

[511]

Intel 3 yield issue also do not make much sense, because Intel 4 seems to be yielding well (over 15M units produced in the last 9 months).

If intel 3 has yield issue they can't manafacture ~570mm2 sierra forest die such big dies requires amazing yield or very very high cost

Edit: Btw, I think someone also mentioned it. 20A being scrapped is probably because 18A with PowerVia had good enough yields, and 20A use was going to be limited (one ARL-S SKU that we know off). However, 18A is falling short on performance expectations (from around 25% improvement in perf/W over Intel 3 to only 15%). The new 18A-P node they added to the roadmap will have the expected additional 10% improvement, but I don't think that will be ready before end of 25, early 26.

Yeah and yhat has support for mobile

 

[ondma]

With Intel's current state, anything is possible.

But I'm seriously hoping they don't bring MT back as it might hurt ST a bit. I prefer good ST and a lot of real cores instead for multithreading.

Fyi, loss of MT perf due to removing HT is compensated a bit by increased IPC due to removal of HT.



It's evident Intel is in full damage control mode trying to control the narrative to their favor. Finding out this late in the cycle that it uses too much die area is just plain absurd and totally laughable. If Intel has money, none of this would have happened and they wouldn't be saying any of this.


Why not?


Some random/unverified leaks usually on Twitter/X. Don't have any saved links. But some are there in this thread itself if you're strong enough to scroll back thru the posts. And forget MT. Without HT, can't expect much.

Why not Amanda Seyfried? Oh, maybe Scarlet Johannsen, Margot Robbie, Gal Gadot, Charlize Theron, Jennifer Lawrence to name a few. Anyway, off topic, of course, just trying to introduce a little levity. Amanda Seyfried is undoubtedly talented, but I just never think of her when I think of hot female actors.

Back on topic, I agree with you about preferring 1T over nT performance if one has to choose. You still are holding on to the hope that LC will have a larger 1T performance gain than most expectations. If you are right (say ~ 20% ipc), then I am fine with dropping HT. If not, then they seemed to drop HT for no or minimal benefit to ST, which seems like a net loss. I am really disappointed that Royal Core did not work out. Intel desperately needs a ground up redesign of the P cores. Their P cores are like trying to run a 400 cubic inch dual carb V8 in the current age of fuel injected, computer controlled turbos. Yea the performance may be there, but the efficiency is not even in the ballpark. .

 

[cebri1]

If intel 3 has yield issue they can't manafacture ~570mm2 sierra forest die such big dies requires amazing yield or very very high cost

But that is product specific. Large dies will always have lower yields.

 

[511]

What I heard is on ARL, lion cove is 442 per core/ghz , Skymont is 363 per core/ghz, in the r23.

Based on notebook check RPC is 392/Ghz so it is still 7% fastey than skymont and LNC is 12% faster than RPC

 

[511]

But that is product specific. Large dies will always have lower yields.

Yes that is why large dies have few extra cores to disable and improve yield also if such large dies don't yield well it's a nightmare from cost perspective

 

[SiliconFly]

.

 

[Josh128]

My prediction for Lion Cove based on leaks seen so far is ~6-8% average IPC over Zen 5. Full on MT @ stock settings top SKU vs top SKU in desktop (16 core vs 24 core), Im expecting an average of +13% perf. OC for OC, could be ~15-20% more. Zen 5 does scale rather well with power, but starts so low to begin with (41.8K R23) I think ARL will really pull away when OC'ed. Being on 3nm should have major benefits in all core OC attainable up to the ~300W range.

For gaming, its going to be interesting to see how ARL's IPC advantage carries vs Raptor Lake being that its MCM. It likely will have a decided memory speed advantage vs Zen 5 even though its MCM.

Finally, the most interesting thing for me will be the price. I dont see how its not going to be expensive as hell. If AMD is trying to keep its margins on 4nm by pricing Zen 5 where it launched, I cant imagine Intel not doing the same on a more expensive and likely lower yield process, the first CPU by Intel ever that has its compute tiles fabbed by someone other than Intel.

 

[DrMrLordX]

It's evident Intel is in full damage control mode trying to control the narrative to their favor. Finding out this late in the cycle that it uses too much die area is just plain absurd and totally laughable. If Intel has money, none of this would have happened and they wouldn't be saying any of this.

Sounds like Royal Cove had workload targets similar to Zen5.

If intel 3 has yield issue they can't manafacture ~570mm2 sierra forest die such big dies requires amazing yield or very very high cost

Let's not forget IceLake-SP. Intel has been down this road before.

 

[Hulk]

Based on notebook check RPC is 392/Ghz so it is still 7% fastey than skymont and LNC is 12% faster than RPC

I generally use 389/GHz for Raptor Cove R23 ST and 265/GHz for Crestmont so yeah that 392 is a good (accurate) number.

Based on Lion Cove (442) and Skymont (363) numbers, ARL should score ~45,000 MT at 5.4/4.5 and ~2,500 ST at 5.7. If that can be achieved on air with less than 225W then I'd consider ARL successful. It would be a nice bump in performance and efficiency since Raptor Lake would need about 350W of silicon degrading electrons to score 45,000, not to mention the cooling towers required.

Realistically I'd wager we'll see ARL CB R23 MT scores of about 43,000. It's hard to scale those theoretical scores all the way to max clocks I've found.

 

[jdubs03]

Skymont being exactly 38% more IPC is pretty impressive. No wonder why Intel is looking to consolidate the core team, the Monts could overtake the Coves. Perhaps as early as Darkmont? Or maybe it’ll be the Wolves that get it done.

@Hulk, the e-cores boost to 4.6. So the calculation comes out to about 45800. At least 43,500 is likely.

 

[FlameTail]

Skymont being exactly 38% more IPC is pretty impressive. No wonder why Intel is looking to consolidate the core team, the Monts could overtake the Coves. Perhaps as early as Darkmont? Or maybe it’ll be the Wolves that get it done

It must be given a new name (Wolf) for a reason.

 

[9949asd]

I generally use 389/GHz for Raptor Cove R23 ST and 265/GHz for Crestmont so yeah that 392 is a good (accurate) number.

Based on Lion Cove (442) and Skymont (363) numbers, ARL should score ~45,000 MT at 5.4/4.5 and ~2,500 ST at 5.7. If that can be achieved on air with less than 225W then I'd consider ARL successful. It would be a nice bump in performance and efficiency since Raptor Lake would need about 350W of silicon degrading electrons to score 45,000, not to mention the cooling towers required.

Realistically I'd wager we'll see ARL CB R23 MT scores of about 43,000. It's hard to scale those theoretical scores all the way to max clocks I've found.

it’s 220w when running r23, but run fpu will be 250w. Ecore is 4.6.

 

[511]

Once we get independent results, one of the things I'm really looking forward to in the comparison vs MTL is performance per watt (adjusted for IPC increase). Intel 4 vs N3B will give us good information about where Intel 3 is as well as 18A.

For this lunar lake should be a better comparisons cause desktop generally is optimized for performance rather than power efficiency

 

[vanplayer]

Finally, the most interesting thing for me will be the price. I dont see how its not going to be expensive as hell. If AMD is trying to keep its margins on 4nm by pricing Zen 5 where it launched, I cant imagine Intel not doing the same on a more expensive and likely lower yield process, the first CPU by Intel ever that has its compute tiles fabbed by someone other than Intel.

IIRC the whole ARL lineup's cost is almost 2 times higher than Zen5 including Strixpoint. Though Intel has larger market share to mitigate this.

If intel 3 has yield issue they can't manafacture ~570mm2 sierra forest die such big dies requires amazing yield or very very high cost

Yeah and yhat has support for mobile

Sierra Forest yield is not good, at least it's worse than expected.

 

[igor_kavinski]

It must be given a new name (Wolf) for a reason.

Because it will work with other wolf cores in a cohesive pack and devour MT workloads. What other reason could there be?

 

[Henry swagger]

Skymont being exactly 38% more IPC is pretty impressive. No wonder why Intel is looking to consolidate the core team, the Monts could overtake the Coves. Perhaps as early as Darkmont? Or maybe it’ll be the Wolves that get it done.

@Hulk, the e-cores boost to 4.6. So the calculation comes out to about 45800. At least 43,500 is likely.

Arctic wolf will be 12 wide.. so another big jump

 

[Henry swagger]

I generally use 389/GHz for Raptor Cove R23 ST and 265/GHz for Crestmont so yeah that 392 is a good (accurate) number.

Based on Lion Cove (442) and Skymont (363) numbers, ARL should score ~45,000 MT at 5.4/4.5 and ~2,500 ST at 5.7. If that can be achieved on air with less than 225W then I'd consider ARL successful. It would be a nice bump in performance and efficiency since Raptor Lake would need about 350W of silicon degrading electrons to score 45,000, not to mention the cooling towers required.

Realistically I'd wager we'll see ARL CB R23 MT scores of about 43,000. It's hard to scale those theoretical scores all the way to max clocks I've found.

Plus arrow refresh will have higher clocks. 6ghz on n3b mayb ? 🤔

 

[511]

IIRC the whole ARL lineup's cost is almost 2 times higher than Zen5 including Strixpoint. Though Intel has larger market share to mitigate this.

I agree it is expensive but I think it's around 1.5 not 2X times than strix point N3B while expensive I don't have number for 6+8 tiles area N6 is cheap IO Is cheap also the point regarding N6 was the reuse of wafers for arc orders imo i heard they ordered quite a lot for arc but it didn't sell if you can give me the die size for 6+8 tile i can roughly calculate the cost

Sierra Forest yield is not good, at least it's worse than expected.

Source ?