Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[ErichZannMusician]

Granite Rapids looking good so far. Redwood Cove in servers is not easily dismissed. And as Sierra Forest shows, Intel 3 is more than competitive.

 

[jdubs03]

By the way, is there a table or graph of the average IPC increases for the FP and INT of Apple's big cores from each Mx generation?

This should help:

 

[AMDK11]

This should help:
View attachment 104378

Thanks.
So it turns out that they moved from the Firestorm(M1) 8-Wide, ROB 630, 6x Exec ALU, 4x Exec FPU decoder to the Everest(M4) 10-Wide decoder, ROB 918, 8x Exec ALU and 4x Exec FPU, gaining only ~ 10% IPC increase.

Well, I guess something's wrong. This ARM is not as beautiful as it is painted. Stagnation XD


EDIT:
Is there a chart or data on how much the Firestorm has gained compared to previous generations?

I'm interested in the average of the IPC growth curve, not the peak or performance (IPC+clocking) (to be clear).

 

[Geddagod]

The Firestorm core consists of several large cores on a single board. They could afford the L1 monster and a more complex, low-clock core. They had no competition, so they developed without pressure.

AMD and Intel consider Xeon and Epyc when designing to accommodate a certain number of cores, as well as those designed for higher clock speeds. So there is less room for improvement as clock speed and core complexity always lead to trade-offs.

By the way, is there a table or graph of the average IPC increases for the FP and INT of Apple's big cores from each Mx generation?

Intel and AMD really should take a leaf out of Apple's book. Wide, low clocked cores for the win.
Also, idk if there is a table of the average IPC increase of Apple's P-cores per generation, you prob would have to google it.

 

[Geddagod]

Thanks.
So it turns out that they moved from the Firestorm(M1) 8-Wide, ROB 630, 6x Exec ALU, 4x Exec FPU decoder to the Everest(M4) 10-Wide decoder, ROB 918, 8x Exec ALU and 4x Exec FPU, gaining only ~ 10% IPC increase.

Well, I guess something's wrong. This ARM is not as beautiful as it is painted. Stagnation XD


EDIT:
Is there a chart or data on how much the Firestorm has gained compared to previous generations?

I'm interested in the average of the IPC growth curve, not the peak or performance (IPC+clocking) (to be clear).

This graph just makes Intel's and AMD's cores look even worse lol. How is Apple stagnating so hard and still producing cores on par or better than AMD and Intel

 

[AMDK11]

This graph just makes Intel's and AMD's cores look even worse lol. How is Apple stagnating so hard and still producing cores on par or better than AMD and Intel

Nothing puts AMD and Intel in a bad light. Zen and Cove are simply designed for higher clock speeds (the achieved clock speed is taken into account in the microarchitecture). Higher clock speed = less dense core logic and overall less complex core(tradeoffs). It's always a balance between clock speed and core complexity.

Apple makes mainly mobile and desktop computers. And since it achieves lower clock speeds, the logic (logic circuits) can be packed more densely, so more resources can be added.


If Intel or AMD expanded their cores more from generation to generation, there would be fewer cores for Xeon/Epyc. They would occupy a larger surface area, which means lower yield per wafer.

Each of us looks selfishly and thinks that I want a larger core (wider and deeper), preferably 2x larger and with an IPC higher on average by 80%, but this will never happen. Project lead time and available manufacturing processes are a barrier, especially when the priority is Epyc/Xeon, and you also need to take them into account when designing cores.

 

[poke01]

So it turns out that they moved from the Firestorm(M1) 8-Wide, ROB 630, 6x Exec ALU, 4x Exec FPU decoder to the Everest(M4) 10-Wide decoder, ROB 918, 8x Ecex ALU and 4x Exec FPU, gaining only ~ 10% IPC increase.

Well, I guess something's wrong. This ARM is not as beautiful as it is painted. Stagnation XD

You got the M4 P core name and specs wrong 😅. I think those are for M3?


Apple didn’t stagnate per se but their yearly IPC growth did slow down. Apple has been focusing on increasing clocks because their IPC slowed. That doesn’t matter in the larger picture as they still have a huge IPC lead against x86 cores.

https://twitter.com/x/status/1818141280117178440

.

 

[poke01]

Nothing puts AMD and Intel in a bad light. Zen and Cove are simply designed for higher clock speeds (the achieved clock speed is taken into account in the microarchitecture). Higher clock speed = less dense core logic and overall less complex core(tradeoffs). It's always a balance between clock speed and core complexity.

Apple makes mainly mobile and desktop computers. And since it achieves lower clock speeds, the logic (logic circuits) can be packed more densely, so more resources can be added

This doesn’t apply anymore with M4 with a clock of up to 4.5GHz.

The AMD EPYC 9755 features 128 Zen 5 cores and can process 256 threads simultaneously. The CPU operates at clock speeds between 2.7 GHz and 4.1 GHz and has a thermal design power of 500W.

Apple M4 reached server Zen 5 clocks. You won’t see 5.7GHz in a server CPU.

 

[adroc_thurston]

You won’t see 5.7GHz in a server CPU.

 

[AMDK11]

You got the M4 P core name and specs wrong 😅. I think those are for M3?

https://pbs.twimg.com/media/GPBKJ-6XcAE1pp-?format=jpg&name=900x900

 

[AMDK11]

This doesn’t apply anymore with M4 with a clock of up to 4.5GHz.

The AMD EPYC 9755 features 128 Zen 5 cores and can process 256 threads simultaneously. The CPU operates at clock speeds between 2.7 GHz and 4.1 GHz and has a thermal design power of 500W.

Apple M4 reached server Zen 5 clocks. You won’t see 5.7GHz in a server CPU.

But in the M4 you won't see the core count from Epyc or the clock speed from Ryzen.

 

[DavidC1]

This doesn’t apply anymore with M4 with a clock of up to 4.5GHz.

The AMD EPYC 9755 features 128 Zen 5 cores and can process 256 threads simultaneously. The CPU operates at clock speeds between 2.7 GHz and 4.1 GHz and has a thermal design power of 500W.

Apple M4 reached server Zen 5 clocks. You won’t see 5.7GHz in a server CPU.

Yep.

After 4 generations of much slower growth the x86 cores are behind like Netburst was against Conroe.

This doesn’t apply anymore with M4 with a clock of up to 4.5GHz.

The AMD EPYC 9755 features 128 Zen 5 cores and can process 256 threads simultaneously. The CPU operates at clock speeds between 2.7 GHz and 4.1 GHz and has a thermal design power of 500W.

Apple M4 reached server Zen 5 clocks. You won’t see 5.7GHz in a server CPU.

Yep.

After 4 generations of much slower growth the x86 cores are behind like Netburst was against Conroe.

Time will tell which side is the truth. At this point, it's just speculation for me.

If you can't perceive between fake ones and real ones, then we can't help you.

Did Apple design M1 with a market like Xeon or Epyc in mind where the number of cores matters? Let me know when Apple achieves an average 30% IPC increase again.

Apple P cores are fairly small and extremely power efficient. The clocks are astonishingly high for how good it performs. It kicks Zen 5 and LNC to the curb and more.

You are essentially saying Core 2 was not fit for a server core, when making a good core is the hardest part to do and fitting it with the right system around it makes it a stellar server CPU.

Intel proved that with Nehalem, which is essentially souped up Penryn with IMC, new P2P interconnect and SMT. It completely decimated the Opteron competition, rendering it to history.

 

[DavidC1]

The worst part of the Intel saga is some seems to think not only the Royal Core team is gone, but essentially they are forcing Haifa into the Austin team.

There was an employee at IBM that was stellar at her job, and she got promoted. Then she did so bad they fired her. The morale of the article was that rather than firing them, they should have just put her back in her previous position, and that everyone has a skill floor where they excel.

Of course the other possibility is that the situation was so bad that no one could save the company. The leaders are only human after all.

It is possible that the excellence of Pat in his previous CEO roles were because the company was small enough, while Intel is straddled with too many bureaucratic layers, laziness and even corruption for many decades. Perhaps this is where it will end.

While I like to believe Intel is laying off lazy and redundant positions, there's the possibility that Intel management under Pat is no different than others before him. This would then be consistent with the continual decline of the West.

Instead they should be like Toyota and value employees. Among other things they have a no layoff policy, and giving them more training so they can do better. If you treat them like they are worthless, eventually you get what you asked for.

 

[Hitman928]

Apple P cores are fairly small

No. Incredible PPA, but they are not small.

 

[Geddagod]

Nothing puts AMD and Intel in a bad light. Zen and Cove are simply designed for higher clock speeds (the achieved clock speed is taken into account in the microarchitecture). Higher clock speed = less dense core logic and overall less complex core(tradeoffs). It's always a balance between clock speed and core complexity.

Apple makes mainly mobile and desktop computers. And since it achieves lower clock speeds, the logic (logic circuits) can be packed more densely, so more resources can be added

Clock speed doesn't matter. All that matters is per core performance. Clock speed is just one way to achieve that. Apple achieves that using IPC.
The excuse of clock speed used to work when ARM cores were much weaker than X86 cores. Oh sure ARM cores are more efficient, but look how much faster x86 is in 1T!

If Intel or AMD expanded their cores more from generation to generation, there would be fewer cores for Xeon/Epyc. They would occupy a larger surface area, which means lower yield per wafer.

Just do what Apple is doing. Ez.

Each of us looks selfishly and thinks that I want a larger core (wider and deeper), preferably 2x larger and with an IPC higher on average by 80%, but this will never happen. Project lead time and available manufacturing processes are a barrier, especially when the priority is Epyc/Xeon, and you also need to take them into account when designing cores.

Nah, I just don't want Apple beating AMD and Intel in core design

 

[AMDK11]

Yep.

After 4 generations of much slower growth the x86 cores are behind like Netburst was against Conroe.

If you can't perceive between fake ones and real ones, then we can't help you.

Apple P cores are fairly small and extremely power efficient. The clocks are astonishingly high for how good it performs. It kicks Zen 5 and LNC to the curb and more.

You are essentially saying Core 2 was not fit for a server core, when making a good core is the hardest part to do and fitting it with the right system around it makes it a stellar server CPU.

Intel proved that with Nehalem, which is essentially souped up Penryn with IMC, new P2P interconnect and SMT. It completely decimated the Opteron competition, rendering it to history.

Is the 4GHz M4 still significantly ahead of the 5.7GHz Zen5 and LionCove?

First of all, M4 is not x86 and I don't see any crushing here.

Can I buy a motherboard with a slot in which I can install any M4 model (number of cores)? Can I install any NVidia/AMD graphics card with M4? Can I install as much RAM as I want and expand it when I need it?

Can I install Windows and use any applications I use without problems or performance drops?

 

[AMDK11]

Clock speed doesn't matter. All that matters is per core performance. Clock speed is just one way to achieve that. Apple achieves that using IPC.
The excuse of clock speed used to work when ARM cores were much weaker than X86 cores. Oh sure ARM cores are more efficient, but look how much faster x86 is in 1T!

Just do what Apple is doing. Ez.

Nah, I just don't want Apple beating AMD and Intel in core design

Clocking matters because clocking + IPC = performance.

Zen5 and LionCove can run faster by 1.6-1.7 GHz.

Moreover, M4 is not x86, so Arch's behavior is different and cannot be easily compared.

Show me an M4 with 128-192 cores. Additionally, there is SMT which reduces the distance between LionCove and Zen5 cores in IPC (Epyc/Xeon).

With the same number of cores as Epyc, the M4 will definitely not achieve this clock speed.

Moreover, the M4 cores are not small and are behemoths in terms of transistor count, with a monstrous L1-I cache of 192KB and L1D of 128KB.

 

[AMDK11]

The Firestorm core consists of several large cores on a single board. They could afford the L1 monster and a more complex, low-clock core. They had no competition, so they developed without pressure.

AMD and Intel consider Xeon and Epyc when designing to accommodate a certain number of cores, as well as those designed for higher clock speeds. So there is less room for improvement as clock speed and core complexity always lead to trade-offs.

By the way, is there a table or graph of the average IPC increases for the FP and INT of Apple's big cores from each Mx generation?

For me, the M4 is a curiosity and nothing more. There is no real threat to Zen5 or LionCove on the x86 platform.

Yes, Intel and AMD must take Apple into account, but I don't think they feel a real threat. AMD will successfully release subsequent generations of Epyc, both for desktop and mobile processors. Those who use Windows won't be interested in iOS anyway, and those who use iOS only have no idea what IPC is.

You can think about it, discuss it, etc. but it is not the same as Pentium 4 and Core 2.


More like the times of Athlon64 and somewhere PowerPC which supposedly has mythical performance and will destroy x86.

 

[jdubs03]

Based on my chart about which shows clocked normalized IPC for each M generation.

From the same video and recent AMD images you can compare the spec2017int and fp scores of both M4 and Zen 5.

The M4 at 4.4Ghz tops Zen 5 at 5.1Ghz outright + clock normalized IPC at max draw, M4 still wins handily.

It’ll be in MBPs so sure it’s not available in the wider Windows/Linux ecosystem; but y’all are talking about core design and performance. And in those terms they’re still ahead by at least a generation if not more.

 

[DavidC1]

It’ll be in MBPs so sure it’s not available in the wider Windows/Linux ecosystem; but y’all are talking about core design and performance. And in those terms they’re still ahead by at least a generation if not more.

60% advantage isn't just a generation, it's more than three generations. You are talking 6-7 years by current AMD/Intel standards.

4.4GHz M4 outperforms Zen 5 even if it was at 5.7GHz. At 90% scaling for SpecInt, M4 is 20% faster. According to that, even a 4GHz M3 is faster. Okay, let's give AMD a bit of a benefit of doubt and add 6% because desktops are faster. 4.4GHz M4 is still 13% faster than 5.7GHz Zen 5. Looks like it'll need 5.7GHz Zen 6 just to equal M4 in absolute performance!

For me, the M4 is a curiosity and nothing more. There is no real threat to Zen5 or LionCove on the x86 platform.

Intel/AMD certainly doesn't view it that way with the comparisons they do. Lunarlake for example is a DIRECT response to Apple M series. Despite the ISA change because they abandoned Intel, their laptops still sold very well because of the phenomenal translator, and absolute blowout performance, thermals, and battery life over the Intel-based predecessors. It's embarassing.

Truth is AMD followed Intel to the clockspeed mania and BOTH companies need to back down, by a huge amount.

 

[jdubs03]

60% advantage isn't just a generation, it's more than three generations. You are talking 6-7 years by current AMD/Intel standards.

4.4GHz M4 outperforms Zen 5 even if it was at 5.7GHz. At 90% scaling for SpecInt, M4 is 20% faster. According to that, even M3 is faster. Okay, let's give AMD a bit of a benefit of doubt and add 6% because desktops are faster. 4.4GHz M4 is still 13% faster than 5.7GHz Zen 5. Looks like it'll need 5.7GHz Zen 6 just to equal M4 in absolute performance!

I was being generous 😁
And this is just performance not power draw. The gap would be even wider.

 

[DavidC1]

I was being generous 😁
And this is just performance not power draw. The gap would be even wider.

It's an embarassment. People have been in the AMD vs Intel mindset for so long that "Netburst vs K8" or "Bulldozer vs Sandy Bridge" comparison is now ARM vs Intel. We aren't seeing Conroe moment in x86 because it's in the mobile camp.

Considering how it's getting worse for Intel, the relentless assault by ARM using an entirely new sector of compute(smartphones and tablets) may actually result in a firm winner if they don't fix their situation soon.

 

[Nothingness]

Considering how it's getting worse for Intel, the relentless assault by ARM using an entirely new sector of compute(smartphones and tablets) may actually result in a firm winner if they don't fix their situation soon.

Arm is already making significant in roads in the hyperscaler market where for many cases what matters is TCO. Their efficient smallish cores deliver very competitive per socket/watt performance which nicely fits some workloads (not all, of course, and that's why x86 still is needed). And even if Intel/AMD are trying to follow path here, they still lack the historic flexibility of Arm where a customer can design its own SoC for its specific needs.

BTW there's a reason why Intel was having a hard time with their first try as a foundry: their design flow were a match for their internal CPU teams; anything designed differently, notably with process portability in mind, didn't work. I don't know where they stand now, but given that they use TSMC, I guess they have raised the bar. But Arm and other IP providers have decades of experience here.

 

[poke01]

With the same number of cores as Epyc, the M4 will definitely not achieve this clock speed.

True, if more than 3 threads are used the clock drops to full core 3.94GHz from 4.5GHz but thats true of any CPU core under multi-core load. That is WHY high IPC is important it's crucial for mobile and server because you won't run the max clock speed for all core load.



Just wait for Lunar vs M3/M4 comparisons later this year. Its more comparible than Xeon or Eypcs. Lunar has no SMT and is a mobile focused design.

There is a reason why Intel is focusing on IPC now because they are very behind and chasing clocks never works. Apple will also need a new desgin soon because they hit a IPC slow down.

View attachment 104380

Thats a maiframe IBM cpu. Well let me more clear, x86 server CPU. The Xeon/Eypcs will never go above 5.5GHz for multi core.

 

[jdubs03]

I think Apple will be full steam ahead regardless. And I suspect the M5 will be another decent step. For sure the IPC increase hasn’t been that great since the M1. Though their biggest increase since M1 has been the M3 -> M4. Everest to Donan, right? Seems like it’s a new core, but could be wrong there.

They’re certainly not in the same position as Intel who need a redesign, or at least make substantial improvements in IPC with less power. Because AMD has surpassed them in overall performance and already had in efficiency.