Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing Raptor Lake-U. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q1 2026.

		Intel Raptor Lake U	Intel Wildcat Lake 15W?	Intel Lunar Lake		Intel Panther Lake 4+0+4
Launch Date		Q1-2024	Q2-2026	Q3-2024		Q1-2026
Model		Intel 150U	Intel Core 7	Core Ultra 7 268V		Core Ultra 7 365
Dies		2	2	2		3
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		Intel 18-A + Intel 3 + TSMC N6
CPU		2 P-core + 8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		4 P-core + 4 LP E-cores
Threads		12	6	8		8
Max Clock		5.4 GHz	?	5 GHz		4.8 GHz
L3 Cache		12 MB		12 MB		12 MB
TDP		15 - 55 W	15 W ?	17 - 37 W		25 - 55 W
Memory		128-bit LPDDR5-5200	64-bit LPDDR5	128-bit LPDDR5x-8533		128-bit LPDDR5x-7467
Size		96 GB		32 GB		128 GB
Bandwidth				136 GB/s
GPU		Intel Graphics	Intel Graphics	Arc 140V		Intel Graphics
RT		No	No	YES		YES
EU / Xe		96 EU	2 Xe	8 Xe		4 Xe
Max Clock		1.3 GHz	?	2 GHz		2.5 GHz
NPU		GNA 3.0	18 TOPS	48 TOPS		49 TOPS

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[dullard]

There's a lot of attention paid to Lunar Lake because it clearly shows what to expect from Arrow Lake, which has mostly the same P- and E-cores.

We will get more details about Arrow Lake only in August.

Intel usually announces new desktop CPUs in October. As for mobile CPUs, they are announced at CES in January. There's no reason to think that this year will be different.

There is attention for performance reasons. But performance wasn't the discussion point. See this quote below and notice how it was NOT about performance but about release dates. I still have yet to see why the release date of one product and availability of that product are reliant on an unrelated product.

As for Intel, ARL may be formally announced in October, but the latest rumors I have heard are saying it may be early 2025 for significant availability....Hell, a major laptop manufacturer whose name slips my mind right now is expressing concern that Lunar Lake will not have good availability for the holiday season

As for desktop Arrow Lake CPUs in October, that is exactly what I said earlier. https://forums.anandtech.com/thread...akes-discussion-threads.2606448/post-41232851

 

[Doug S]

Now as you don't seem completely stupid, I wonder where our misunderstanding comes from.

You sure about that?

 

[SiliconFly]

-

 

[TwistedAndy]

You sound too sure already!

There are, obviously, some differences, like the amount of cache, the way E-cores are connected, and SLC, but the cores in Arrow Lake will be mostly the same as Lunar Lake.

There will probably be HT support for S and HX, but that's just a rumour.

 

[dullard]

I'm always sure and never wrong. Never!!111

There are, obviously, some differences like the amount of cache, the way how E-cores are connected, and SLC, but the cores in Arrow Lake will be mostly the same as Lunar Lake.

Probably there will be HT support for S and HX, but that's just rumours.

Add to your list:

1) Different memory types, speeds, and different memory controllers.

2) Any chips that get 20A would have an entirely new transistor (RibbonFET with faster transistor switching) and PowerVia (enabling higher frequencies, lower resistance, and lower capacitance).

3) Operating at a wholly different place on the performance/power curve.

4) Different core interconnects with drastically different numbers of cores.

Anything else different between these mostly same cores?

 

[DavidC1]

I really like how you backed into lunar lake clocks for skymont by using Intel peak to peak performance versus crestmont with crestmont clocks being known . Very clever!

Thanks.

Lunarlake really shows promise. At 3GHz clocks and Raptor Cove exceeding performance, it'll be able to run many applications on the Skymont cluster alone. Whatever power advantage Skymont has will be fully demonstrated.

Plus...
-SLC cache to reduce going to main memory
-Mem PHY power reduction*
-Better Thread Director
-Better partitioning of blocks along with further improved power management.

*In previous chips, there LPDDR support was really for compatibility. It seems they have rebuilt the memory controller to lower power.

 

[DavidC1]

Interesting how power hungry the "LPE" cores are.

My guess is on Meteorlake, rather than just powering up the SoC tile, it's also powering up the compute tile, whereas if you have P or E core active you only have the compute tile active.

You can see the E core uses less power per performance than "Low Power" E cores. Really sucks how it is. Maybe that's a reason why in addition to LPE core being low performance the power benefits are situational. The thread director "sees" that it's not worth moving to the LPE core.

If they can address this, lower the power further, and improve perf/W on the low end by 3x like it says on the presentation, it'll be a huge improvement.

 

[H433x0n]

Interesting how power hungry the "LPE" cores are.

My guess is on Meteorlake, rather than just powering up the SoC tile, it's also powering up the compute tile, whereas if you have P or E core active you only have the compute tile active.

You can see the E core uses less power per performance than "Low Power" E cores. Really sucks how it is. Maybe that's a reason why in addition to LPE core being low performance the power benefits are situational. The thread director "sees" that it's not worth moving to the LPE core.

If they can address this, lower the power further, and improve perf/W on the low end by 3x like it says on the presentation, it'll be a huge improvement.

Looking at that graph ARL-U (which is just MTL refresh with RWC+ on Intel 3) should do pretty well as a low range option with the Intel 3 perf/watt improvement.

 

[DrMrLordX]

Then Lion Cove will clock at 5GHz and be 10-15% slower in ST compared to Raptor Cove.

... why? e-core boost clocks don't necessarily relate to p-core boost clocks at all.

 

[TwistedAndy]

You can see the E core uses less power per performance than "Low Power" E cores. Really sucks how it is. Maybe that's a reason why in addition to LPE core being low performance the power benefits are situational. The thread director "sees" that it's not worth moving to the LPE core.

Two LP E-cores in Meteor Lake were suffering from missing L3 cache and high LPDDR5 latencies. They could not handle even some basic tasks on their own. As a result, the CPU tile was used much more frequently than it should.

In Lunar Lake, Intel addresses this issue by using the side cache (SLC) and increasing the number of cores in LP island. Probably, it will help.

 

[DavidC1]

Looking at that graph ARL-U (which is just MTL refresh with RWC+ on Intel 3) should do pretty well as a low range option with the Intel 3 perf/watt improvement.

Yes, but if they don't improve the behavior of the LPE, then it would still be a so-so product.

Two LP E-cores in Meteor Lake were suffering from missing L3 cache and high LPDDR5 latencies. They could not handle even some basic tasks on their own. As a result, the CPU tile was used much more frequently than it should.

This is much more than that. The LPE core should at most, use the same power as the E core cluster, not MORE. The E core behaves properly.

This is due to an execution problem that brought delays to the product. They clearly missed their target.

 

[TwistedAndy]

This is much more than that. The LPE core should at most, use the same power as the E core cluster, not MORE. The E core behaves properly.

This is due to an execution problem that brought delays to the product. They clearly missed their target.

Yes, Intel clearly missed its target with LP E-cores in Meteor Lake.

On the other hand, it makes sense to consider Meteor Lake as a development platform that was pushed into some real products.

 

[DavidC1]

Why Skymont is a vastly more sensible and superior design:

-In an effort to save transistors(power and area), the decoders are weaker than in the P cores. This results in relying on more of microcode, which significantly reduces decoder throughput.
-Since Tremont, they moved to a Clustered Decode setup, which allows the second cluster to execute even if another is blocked by microcode.
-Skymont duplicates common microcode instructions across all 3 clusters so it can continue to execute across all. They call it "Nanocode".
-The chief architect of Skymont also says that 3-wide decode is easier to fill than 4.

-From C&C: From our testing, Tremont’s decoder starts behaving like a 3-wide one after around 128 to 160 instructions without a taken branch. Its throughput peaks with 3 to 64 instructions in the loop. Average applications have 5% to 20% branches, and about half of those are taken so Tremont’s lack of automatic load balancing between the clusters shouldn’t be a big issue.

-Gracemont eliminates the need to use taken branches to take full advantage of the new decoders. It achieves full output, limited only by the backend:

Gracemont improves load balancing between the two decode clusters by automatically switching, instead of relying on taken branches.

On the surface, the P core approach seems better. However, the E core approach is much more sensible. The P core approach is Bigger, More, Badder, which is contrary to what is needed in modern designs that are power limited.

3-wide being easier to fill means better utilization, and there's enough taken branches in x86 code to take full advantage of the clusters, and Gracemont and beyond eliminates the corner case scenario where branches aren't taken for many instructions. Clustered decode is also significantly more compact in terms of transistors. This is a careful balance, unlike the P cores which is big, bigger, and BIGGER!

-Uop cache vs no Uop cache: Pentium 4's problem was that it relied nearly entire on the Trace Cache for decoder throughput. TC was able to output the normal 3-wide, but the uarch had only 1 decoder. While the uop cache has much higher hit rate and much more efficient, there's still a 2-pipeline penalty for missing. And the hit rate is lot lower at about 60%. The E cores go for a straightup extension of decoders.

-Many dedicated and not shared ports: Sharing has benefits, but the boundary where it shares the bandwidth drops to zero. You also need to add algorithms so they can effectively share the data.
-Trying new ideas, instead of just sticking with the old: Ultra wide retire, and more store AGUs. The changes that took 5 generations for the P cores are now being seen nearly every generation.
-Doubled 128-bit FP versus new wider instructions: Doubled amount of units such as in Skymont benefits ALL existing code, unlike AVX, AVX2, AVX512 that all needed recompiling. That is why Skymont is 68% faster in FP. Nevermind the flip-flop and endless fighting for whether AVX512 is needed or not. Skymont's FP is 2x as capable in literally every code since when 128-bit vector was introduced in 2006 with Core 2!

10 years of consistent execution, while the P core team was flopping on it's face more than a Seal on land flops on it's belly. It should offer significant advantages iso-node over existing designs, even Zen 5c. Can't wait to see how the future holds for them. Bring on Arctic Wolf. Another 30% in two years will render all argument for the current P core design moot.

 

[DavidC1]

Yes, Intel clearly missed its target with LP E-cores in Meteor Lake.

On the other hand, it makes sense to consider Meteor Lake as a development platform that was pushed into some real products.

No it's not. Not at all. It was a delayed design hit by Intel 7nm problems. I don't know why it's so hard for some people to grasp? You have done projects in school right? If you are not lazy and start from day 1 and carefully plan it out, you are neither late nor have problems. Those that wait till too long or don't execute aren't only late but the project sucks.

This is why Meteorlake was mediocre. If you hear or delays on a future project, treat it with suspicion, that it might disappoint. NV30 was very late too. They miss targets, thus it's delayed trying to meet original goals. More often than not they don't.

Knights Landing Xeon Phi went from being a late 2013 chip with 200W TDP and 3.3TFlop DP FP to mid 2014 chip with 230W TDP and 3TFlop DP FP. 15% less power, 10% faster, 9 months ago. KNL was a victim of 14nm delay.

Meteorlake was an Alderlake replacement. Raptorlake was not supposed to exist. Think about that. Imagine a better product than current Meteorlake with more being offloaded to LPE cores that are lower power but in end of 2022. This would have demolished competition.

 

[DavidC1]

LOL!

https://www.notebookcheck.com/Asus-Vivobook-S-15-OLED-im-Test-Mit-dem-Snapdragon-X-Elite-in-ein-neues-Notebook-Zeitalter.847338.0.html

Lunarlake looks like it might crush it. Battery life is better, but not too far ahead of Meteorlake. GPU is slower than Iris Xe while Lunarlake's Xe2 is 50%+ faster at the same power level.

 

[TwistedAndy]

I agree that Meteor Lake was initially planned as a replacement for Alder Lake on the newer node with a tiled approach and many other features. To make this transition safer, Intel planned to use the existing P-core architecture and slightly update E-cores. It reminiscences their Tik-Tock model.

But still, there are a lot of new features in Meteor Lake, including a tiled approach, a separate memory controller and a media engine, a new NPU, Thead Director, and other stuff. Now, Intel is still polishing some software and drivers for Meteor Lake.

I hope, that all the lessons learned and we will see some interesting stuff in Lunar Lake and Arrow Lake

As for Skymont, I have written a lot about it before and it looks really impressive on paper.

Lunarlake looks like it might crush it.

And it will. Qualcomm X Elite is also a test platform. And it looks pretty promising.

 

[DavidC1]

2) Any chips that get 20A would have an entirely new transistor (RibbonFET with faster transistor switching) and PowerVia (enabling higher frequencies, lower resistance, and lower capacitance).

With just a section of one market said to be using 20A, I don't think you'll see any advantages for the 20A chip. Think in terms of Cannonlake, where it was used to bring the real 10nm node. In this case it's used to bring up 18A.

You need significant design and process cooperation nowadays so a simple port no longer brings big advantages. Things like PowerVia even more so because now the circuit design needs to change.

 

[SiliconFly]

-

 

[DavidC1]

But still, there are a lot of new features in Meteor Lake, including a tiled approach, a separate memory controller and a media engine, a new NPU, Thead Director, and other stuff. Now, Intel is still polishing some software and drivers for Meteor Lake.

And it will. Qualcomm X Elite is also a test platform. And it looks pretty promising.

It don't matter. Most, if not all was planned for late 2022. 7nm delay was over 6+ months, that's why it became 2023 and we got Raptorlake..

Saying it's a "test platform" is an excuse. We don't care, neither do other consumers. Just say as it is. Meteorlake is mediocre and so is X Elite.

Meteor Lake with its RWC cores wouldn't have demolished any competition. The only thing it's capable of doing is demolishing Intel.

What the heck are you talking about? Did you even read what I said?

Page 31

https://hc34.hotchips.org/assets/program/conference/day2/Mobile%20and%20Edge/Meteor_Lake_Hotchips%20_%20Wilfred%20_%20final_submit%20(1).pdf

They said they worked to eliminate the "2-3% disaggregation tax". They clearly missed their goals. There's no reason that they can do better. It's the low level details they don't tell us.

 

[SiliconFly]

-

 

[TwistedAndy]

Saying it's a "test platform" is an excuse. We don't care, neither do other consumers. Just say as it is. Meteorlake is mediocre and so is X Elite.

Meteor Lake is mediocre in terms of CPU performance but offers a noticeably better battery life and has a more powerful GPU. It's OK for regular customers.

As for Snapdragon X Elite, it has a lot of software and driver issues. I don't see any reason to buy it now, but in a year or two it might be a pretty decent option.

 

[Henry swagger]

Meteor Lake is mediocre in terms of CPU performance but offers a noticeably better battery life and has a more powerful GPU. It's OK for regular customers.

As for Snapdragon X Elite, it has a lot of software and driver issues. I don't see any reason to buy it now, but in a year or two it might be a pretty decent option.

Meteor lake will still outsell the elite and amd.. even apple is struggling with sales.. brand power is way more important than performance

 

[SiliconFly]

-

 

[ondma]

Looks like July 15 for the Ryzen 300 Series laptop chips and either preorder or actual availability (unclear) of July 31 for the Ryzen 9000s. Since this is a discussion about Arrow Lake, which is best compared to the Ryzen 9000 line, I used July 31st. https://videocardz.com/newz/amd-ryz...00-sales-start-july-31-according-to-retailers

I don't follow how rumor of one complaint of Lunar Lake availability has much to do with Arrow Lake's release date and/or availability.

What is Mountain Lake?

Lunar Lake and Arrow Lake are totally different market segments. And Lunar Lake is launching sooner than Arrow Lake. So, why does focus on the sooner launching ultralight notebook Lunar Lake have anything to say about higher powered Arrow Lake desktop and higher power mobile chips?

If I follow your logic, that means if Ford promotes its upcoming redesigned Mustang released during a summer then that means that a F150 released a later fall is both bad and delayed until Winter?

Obviously, I had a brain fart and meant Meteor Lake, not Mountain Lake, although maybe Intel needs a new lake of some sort. Otherwise I still stand by what I have said. As far as Meteor Lake vs LL vs ARL, it just goes to show the pattern of Intel's execution. Meteor Lake was late, didnt make it to the desktop, was equal to or a regression in performance, and failed to live up to the expectations of greatly improved power usage. Lunar Lake "looks" promising in mobile, I will admit. However, I dont see how anyone can really expect ARL to be more than just "ok". Coming out after Zen 5 and maybe Zen 5 X3D, it certainly needs to be better than that. They apparently gave up hyperthreading, supposedly to get more ST gains, but Lion Cove, based on earlier leaks and LL IPC improvements doesn't show any more, (actually probably less) IPC improvement than other recent new Intel releases. And the new "foundry competitor" is using TSMC nodes for LL and the most performant ARL. As I said, ARL would probably have been great if it had come out instead of RL-R. It would probably have given Intel the lead for at least a few months. But coming out near the end of the year, it probably will make Intel competitive at best until Zen 6. And what does Intel have to counter? Probably an ARL-R.

 

[ondma]

There is attention for performance reasons. But performance wasn't the discussion point. See this quote below and notice how it was NOT about performance but about release dates. I still have yet to see why the release date of one product and availability of that product are reliant on an unrelated product.

As for desktop Arrow Lake CPUs in October, that is exactly what I said earlier. https://forums.anandtech.com/thread...akes-discussion-threads.2606448/post-41232851

You are either mis-interpreting or deliberately obfuscating the point of my post. It is most certainly about both performance and release dates. As I keep saying, ARL probably would have been a very good product if it had been released instead of Raptor Lake refresh. It might have been a modest improvement, but would have given Intel a better performing product than AMD for at least a few months, and would have mitigated at least some of their efficiency disadvantage. But coming after Zen 5, Intel needs a home run, and I think anyone who still expects that at this point is dreaming.