Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[StinkyPinky]

Huge epic fail. 48 TOPS compared to 50 for AMD.

Throw them all in the trash. Game over, man. Game over.

 

[jpiniero]

AT has the LNL slides up:

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That's not bad for the E cores. I assume the General qualifier means excluding Vector. The cores are still in the 1-2 mm2 range, right?

 

[Henry swagger]

Chadmont in action.

Insane stuff right here lol

 

[adroc_thurston]

Also, not too sure about calling a 4-cyc 48K d-cache an "L0" but maybe there's something I'm missing. Their "L0" sounds to me very much like an L1, and their "L1" sounds very much like an L2.

L1 is basically L1.5, kinda fits the niche of the old 256K L2.

That's not bad for the E cores. I assume the General qualifier means excluding Vector. The cores are still in the 1-2 mm2 range, right?

The things are the size of Neoverse V3.

 

[SarahKerrigan]

L1 is basically L1.5, kinda fits the niche of the old 256K L2.

Works for me.

Most Itanium gens had a 256K 5-7 cyc L2D cache. There were no naming shenanigans about "oh, that's really an L1, and our 16K 1-cyc L1D is actually an L0." But it's a small thing for me to nitpick about, so I'm not going to.

 

[poke01]

It’s gooooooooood. nah, its excellent

Chadmont in action.

 

[adroc_thurston]

This isn't even atom anymore, this is a big core.
It's bigger than Zen4 in all dimensions. wild. makes sense for CWF tho.

 

[poke01]

my goodness, Intel won computex!!!!!!!

 

[StinkyPinky]

Has to be a catch with those E cores. Would be insane to have E cores matching two year old P cores.

 

[gdansk]

This isn't even atom anymore, this is a big core.
It's bigger than Zen4 in all dimensions. wild. makes sense for CWF tho.

Well they're on N3E so it's not a problem is it

 

[jpiniero]

Intel launches Xeon 6700E "Sierra Forest" CPU series with up to 144 cores - VideoCardz.com

Intel Accelerates AI Everywhere, Redefines Power, Performance and Affordability With Intel Xeon 6 processors, Gaudi accelerators and Lunar Lake architecture, Intel delivers the best of AI across cloud, networking, client and edge solutions. TAIPEI, Taiwan, June 4, 2024 – Today at Computex, Intel...

videocardz.com

Sierra Forrest's top model is 144 cores @ 2.2 Base. 330W TDP.

 

[gdansk]

Has to be a catch with those E cores. Would be insane to have E cores matching two year old P cores.

The catch is "only" 4.6GHz?

 

[adroc_thurston]

Well they're on N3E so it's not a problem is it

CWF is 18A so that's even better, possibly.
Either way, the thing is basically Z4c with worse SIMD.

 

[SarahKerrigan]

Has to be a catch with those E cores. Would be insane to have E cores matching two year old P cores.

They aren't likely to be running at 6GHz, for one thing.

 

[adroc_thurston]

Has to be a catch with those E cores. Would be insane to have E cores matching two year old P cores.

they're HUEG.
Like most structures are above Z4c.

 

[Saylick]

Now that we see all the architectural core upgrades under the hood, LNL looks pretty impressive on paper. My apprehension with my company only giving us Intel CPUs essentially vanished.

 

[Hitman928]

Honestly, the Skymont cores seem to be going in the direction I wanted AMD to take with Zen 5. Very impressive results. The lack of performance comparisons to competitors seems strange, maybe they'll have those slides during the actual presentation?

As a side note, does Intel usually include this +/- 10% margin of error disclaimer? That seems to be a pretty large margin of error given how close we are to release.

 

[gdansk]

From Anandtech

This Lion Cove architecture also aligns with performance increases, boasting a predicted double-digit bump in IPC over the older Redwood Cove generation. This uplift is noticed, especially in the betterment of its hyper-threading, whereby improved IPC by 30%, dynamic power efficiency improved by 20%, and previous technologies, in balancing, without increasing the core area, in a commitment of Intel to better performance, within existing physical constraints.

Does anyone understand that?

 

[Ghostsonplanets]

WTF that's a insane victory leap for Intel! Skymont is insane and Skymont IPC increase is basically matching AMD but coming from a much stronger starting point.

Intel won Computex.

 

[adroc_thurston]

Skymont is insane and Skymont IPC increase is basically matching AMD

It basically matches its own big core cousin. lmao.

 

[Saylick]

From Anandtech

Does anyone understand that?

Seems like it was AI generated lol

I think they are just saying that SMT traditionally gives 30% more throughput and 20% better power efficiency (so the power increases a little for that 30% more throughput).

But here's the relevant slides:

 

[poke01]

Seems like it was AI generated lol

I think they are just saying that SMT traditionally gives 30% more throughput and 20% better power efficiency (so the power increases a little for that 30% more throughput).

But here's the relevant slides:
View attachment 100417
View attachment 100418
View attachment 100419

wait is Lion cove keeping SMT?

 

[tamz_msc]

LOL Pat taking a shot at Qualcomm.

 

[adroc_thurston]

wait is Lion cove keeping SMT?

Some variants, yes.

 

[Hulk]

If Skymont actually performs like Raptor Cove then the E's will finally fulfill their promise.

So Lion Cove will include HT after all.

If Skymont can equal Raptor Cove IPC and runs at 4.6GHz and Lion Cove does 5.4GHz nT and achieves a 15% bump over Raptor Cove than ARL should do a little over 48,000 CB R23 MT.

Zen 15 based on AMD's charts should do about 45,000 in CB R23 MT.

Now on top of all that speculation we don't know if those clocks for ARL are "burning down the house" or achievable with moderate air cooling.

As it has been for the last few generations I think the top of the stack parts for AMD and Intel are once again going to be very comparable.