Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

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Tigerick

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Apr 1, 2022
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Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

Intel Alder Lake - NIntel Wildcat LakeIntel Lunar LakeMediatek D9500
Launch DateQ1-2023Q2-2026 ?Q3-2024Q3-2025
ModelIntel N300?Core Ultra 7 268VDimensity 9500 5G
Dies2221
NodeIntel 7 + ?Intel 18-A + TSMC N6TSMC N3B + N6TSMC N3P
CPU8 E-cores2 P-core + 4 LP E-cores4 P-core + 4 LP E-coresC1 1+3+4
Threads8688
Max Clock3.8 GHz?5 GHz
L3 Cache6 MB?12 MB
TDP7 WFanless ?17 WFanless
Memory64-bit LPDDR5-480064-bit LPDDR5-6800 ?128-bit LPDDR5X-853364-bit LPDDR5X-10667
Size16 GB?32 GB24 GB ?
Bandwidth~ 55 GB/s136 GB/s85.6 GB/s
GPUUHD GraphicsArc 140VG1 Ultra
EU / Xe32 EU2 Xe8 Xe12
Max Clock1.25 GHz2 GHz
NPUNA18 TOPS48 TOPS100 TOPS ?






PPT1.jpg
PPT2.jpg
PPT3.jpg



As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



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H433x0n

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Which also explains their bloat and addiction to using HP process libraries.
Using HP process libraries I’m not sure you can consider a skill issue. We’ll find out when ARL launches how often Lion Cove utilize TSMC’s 2-2fin cells.
 

Abwx

Lifer
Apr 2, 2011
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It's 165H compared to 1185G7 in SYSmark 30 Overall score.
🤣

That s basically a meager progress, a 1185G7 would gain 40% better perf/Watt at same perf if extended to 8 cores, and at 1.2x the perf it would still be 1.2x more efficient, all while using the same old 10nm process that is well below the last process iteration used in RPL.
 
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coercitiv

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It was actually Ryan Shrout (I don't think he's at Intel anymore), but indeed he did.
Ryan Shrout is no longer with Intel, so folks should not take his opinion as official PR speak.

The comparison with 1185G7 is weird. The 47% figure has little meaning when compared with the upcoming competition. However, from their PoV it may make sense to compare with 1185G7, it's their last premium quad core. LNL with 4+4 and removed SMT is closer to a 4P/8T CPU than any of their recent hybrid configs.

Like I said though, it feels weird to see a product that is supposed to fight for the efficiency crown being touted for TOPS and beating an old skinny guy. Meanwhile Qualcomm is showing Geekbench numbers on variable power graphs. Big mismatch in the show of confidence from the two companies, even if it's just the optics for now.
 

dullard

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May 21, 2001
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Why go 3 year? Why not compare to a Pentium and show us 5000% increase!
Intel has been doing 3 year comparisons for many years now (A quick search and I found them using 3 year old computer comparisons since at least the year 2009). 3 years because that is when companies and some people tend to think about replacing their computers. That is, how does a new computer compare to the current computer in use.

There is no magic number of years. But 3 years is what Intel has been using in marketing for quite some time.
 
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Tigerick

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Apr 1, 2022
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LNL MX EV QS B-0 4.9GHz - Xino

Peak 1T Turbo I assume. Also, probably only achievable with on a higher TDP SKU.

Edit:

LNL iGPU - 60 TOPs
LNL NPU - 45 TOPs

LNL > 100 TOPs.

Bodes well for some gaming on the shiny new BMG iGPU while using XeSS XMX path😁
B-0 stepping with QS Validation should mean almost reaching PRQ status: 4.9GHz is quite high for ultra-mobile CPU, can't wait for GB6 1T benchmark...:cool:
 

mikk

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Not if it's a Meteor Lake like launch in December. 4.9 Ghz is surprisingly high, I expected fmax something between 4-4.5 Ghz. Take note @SpudLobby

N3B can't be that bad, it's not a bad sign for ARL-S too. Maybe they can reach 5 Ghz with the production models.
 

Ghostsonplanets

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Not if it's a Meteor Lake like launch in December. 4.9 Ghz is surprisingly high, I expected fmax something between 4-4.5 Ghz. Take note @SpudLobby

N3B can't be that bad, it's not a bad sign for ARL-S too. Maybe they can reach 5 Ghz with the production models.
LNL is meant to release alongside a/some designs in August. At max September (Innovation Days). If LNL is delayed (Which would be a big fumble because it's a higher priority project for Intel), Intel will be in a really bad position because OEMs will be pissed (LNL 3x design wins over MTL) and both Strix and Snap X Elite will have beaten them on TTM and get the lions share of the AI PC push that MS will unsleash.
 
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SpudLobby

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Not if it's a Meteor Lake like launch in December. 4.9 Ghz is surprisingly high, I expected fmax something between 4-4.5 Ghz. Take note @SpudLobby

N3B can't be that bad, it's not a bad sign for ARL-S too. Maybe they can reach 5 Ghz with the production models.

Yes this is higher than I expected. I expected 3.9GHz for the top part not because of N3B limitations, but Intel being sane and deliberate with power. Oh well lol
 

SpudLobby

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May 18, 2022
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Yes it is. That high the transistors would have to be leaky. Then how are they keeping it power efficient?

They’re…. not. Like, directionally way more than it would be on Intel 4 with crappier tiling and a terrible memory hierarchy, yeah — but realistically this just means ST will be higher than it probably should be (platform power wise) given the target is at most 30W.

Just watch lol. N3B is still a fine node and LNL a solid improvement, but just watch.
 

Ghostsonplanets

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Yes it is. That high the transistors would have to be leaky. Then how are they keeping it power efficient? Crazy amount of power gating? Very low voltage? I'm intrigued!
Maybe one of the P cores follow the Super P Core scheduling behavior of MTL, as in one of the P cores can boost up to 4.9 GHz in absolute ST bound workload.

Except that MTL basically deactived the 2 Super P cores while on battery. LNL won't have this luxury.

The only thing we can infer is that 4.9GHz refer to peak 1T Turbo.
They showed a working LNL laptop at an event in 2023 I think? They would have to be bumbling fools to delay something that's been ready for so long.
Wasn't a laptop but a working board with LNL. But yes, they need LNL ready to hit the shelves in ~3 - 4 months.
 

Hulk

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How much compute is behind ChatGPT or CoPilot? I ask because I'm curious as to how these on-board NPU's will compare performance-wise?

I'll be a HUGE fan of on-board AI when one of my applications freezes or causes a restart or whatever and my on-board AI analyses the system, diagnoses the problem, tells me exactly what happened and then solves it so it doesn't happen again. Now that would be something.

When will AI be optimizing graphics drivers or other software? I haven't seen any revolutionary changes in my software outside of Topaz AI.
 

Abwx

Lifer
Apr 2, 2011
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How much compute is behind ChatGPT or CoPilot? I ask because I'm curious as to how these on-board NPU's will compare performance-wise?
Thousands of CPUs and GPUs along with gigantic RAM quantities, this consume MWs, as a comparison the power comsumption of a functionnal human brain is about 20W, that s telling about the huge inefficencies of those AIs.
 

DavidC1

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LNL is meant to release alongside a/some designs in August. At max September (Innovation Days). If LNL is delayed (Which would be a big fumble because it's a higher priority project for Intel), Intel will be in a really bad position because OEMs will be pissed (LNL 3x design wins over MTL) and both Strix and Snap X Elite will have beaten them on TTM and get the lions share of the AI PC push that MS will unsleash.
It said Lunarlake release is partially dependent on when Xe2 will be ready.
Yes it is. That high the transistors would have to be leaky. Then how are they keeping it power efficient? Crazy amount of power gating? Very low voltage? I'm intrigued!
Raptorlake is at 6GHz now. AMD can reach 5GHz on their mobile parts too. It may not be efficient by any means at that frequency, but battery life is pretty much all about idle power and how fast/how well the chip can reach that idle state.

That's how Apple with their big fat chip architecture achieves great battery life. Web browsing and other bursty workloads mostly do not care about TDP.
Thousands of CPUs and GPUs along with gigantic RAM quantities, this consume MWs, as a comparison the power comsumption of a functionnal human brain is about 20W, that s telling about the huge inefficencies of those AIs.
That's cause "AI" isn't real intelligence by any means. It took until now to do it because we didn't have transistor budget, memory and drive capacity to do so. With the world swamped on endless data plus these companies practically ignoring any copyright infringement for that matter, now it is possible.
 
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maddie

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That's cause "AI" isn't real intelligence by any means. It took until now to do it because we didn't have transistor budget, memory and drive capacity to do so. With the world swamped on endless data plus these companies practically ignoring any copyright infringement for that matter, now it is possible.
Anyone waiting for AI generated content to be used as the majority of training data for new models? A feedback loop of colossal problems.
 

Hulk

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It said Lunarlake release is partially dependent on when Xe2 will be ready.

Raptorlake is at 6GHz now. AMD can reach 5GHz on their mobile parts too. It may not be efficient by any means at that frequency, but battery life is pretty much all about idle power and how fast/how well the chip can reach that idle state.

That's how Apple with their big fat chip architecture achieves great battery life. Web browsing and other bursty workloads mostly do not care about TDP.

That's cause "AI" isn't real intelligence by any means. It took until now to do it because we didn't have transistor budget, memory and drive capacity to do so. With the world swamped on endless data plus these companies practically ignoring any copyright infringement for that matter, now it is possible.

Do we really know what "real" intelligence is? If it acts smart and can do smart things then what's the difference between real intelligence and AI?

The thing that freaks me out about this is the fact that the "software" isn't traditional code, meaning that if you look at it you have no idea what it is doing. It's obviously very crude compared to an organic brain but it is making up for that complex structure with massive transistor budget and commensurate compute. I liken it so solving a math problem using an incremental search rather than one of the more efficient techniques such as Newton-Raphson.
 

Ghostsonplanets

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No profanity in Tech.
[Retracted]: Would be really funny if Intel is already using the compute tile fabbed on Intel 3 on current MTL designs.

It said Lunarlake release is partially dependent on when Xe2 will be ready.
Xe LPG² BMG IP is ready and has been since a long time. The enablement patches for it also have been out way before Battlemage dGPU for quite a long time. LNL TTM isn't dependent on discrete BMG TTM.
 
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mikk

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Isn't this a downgrade over 6+8 ARL-H with only 4+8, how does that make sense?
 

Ghostsonplanets

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View attachment 96751

Interesting leaks from unknown user
It's fake. Huge Intel fanboy that doesn't know anything and he's usually all the time around tech twitter trying to get leaks.

Anyway, you can spot on that it's fake due to him claiming CPU tile and SoC tile are separated tiles fabricated on different nodes. While, from what we know, CPU and SoC tile are merged on PTL. The CPU core configuration is also straight out of MLID videos.