Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



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Intel Core Ultra 100 - Meteor Lake

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As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)



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coercitiv

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Make Intel use Intel Foundries FIRST before they force those brain-dead ideas.
This is Intel's Catch 22. I have yet to see a reasonable explanation for how they "planned" 18A as a customer focused node while their own internal premium chips were planned for TMSC. Are we going to hear the same tune for 14A?

I keep hoping they dig themselves out of this crisis, but my past self was probably more realistic.
 
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coercitiv

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Like I said, the only way it was going to work would be for Intel to get their 99% CPU Server market share back, and if not possible, to dump the fabs. Otherwise you'd have the Foundry killing the entire company.
The chip design company is dying too, the only reason this is not extremely obvious is because IFS is dying faster.
 

511

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ASML already got there with lithography and TSMC is getting there with logic transistor manufacturing
The irony is Intel funded ASML EUV research and Cannon and Nikon were unable to do this were due to license restrictions same for US Companies
 

511

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I have yet to see a reasonable explanation for how they "planned" 18A as a customer focused node while their own internal premium chips were planned for TMSC. Are we going to hear the same tune for 14A?
So somehow Outsourcing only the Compute tile to TSMC and keeping majority of the product in-house is not the right thing am I hearing that correct cause I would see a problem if DMR/WCL/Xe3P dGPU and many other stuff are outsources. That would confirm that 18A is 🗑️.
 

eek2121

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Spinning off IFS into a jointly held independent company would actually be a smart idea, which is why I suspect they won't do it.

Maybe it should be a joint partnership with the government.
 

511

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Why would they let someone else milk the 18A cow if they have invested 100 Billion $ ?
They would rather give up leading edge logic development
 

eek2121

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Why would they let someone else milk the 18A cow if they have invested 100 Billion $ ?
They would rather give up leading edge logic development
To not lose another 100 billion. They can still have a minority stake, of course.
 

coercitiv

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So somehow Outsourcing only the Compute tile to TSMC and keeping majority of the product in-house is not the right thing
Using TSMC for the compute tile is the right thing for the design group (given the circumstances), but a bad thing for IFS. That's the catch 22 for Intel, they can't make a move with one arm without tipping their hand in the other.
 
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511

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It is still savable though. Tan is killing it.
He is not killing it though the guys trying to kill the company has been on board for more than a decade. Tan is trying to save it by cutting stuff that he thinks is unnecessary but he went too far in cutting staff imo.
He has been CEO of a Company that makes tools necessary for foundry he knows Foundry stuff better than anyone at Intel.

Using TSMC for the compute tile is the right thing for the design group (given the circumstances), but a bad thing for IFS. That's the catch 22 for Intel, they can't make a move with one arm without tipping their hand in the other.
They want flexibility as well in terms of their schedule 18AP is later launch than N2 for Volume. Initial volume will go to DMR
 
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Josh128

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Then how would it be ever profitable? Then what's the point of external customers? It's the same stupid question. If they cannot serve themselves, which are big but not as big as TSMC, then they are done.

No, the question I'm asking is why people are missing the obvious - Intel is still huge user of silicon so why is 90% of Novalake compute on TSMC, while having schizo thinking of "muh external customers!!!" when mostly likely those external orders are for a short time a fraction of losses from Intel itself.

If we're going to force anything, let's force INTEL to use their own foundries!

Maybe, MAYBE the reason behind this schizophrenic thinking is simpler than thought. Actions rather than words right? Maybe Intel's plan is that Foundry is going to die or the company split and everything else is a distraction.
Fantastic point, actually. Its very hard to argue against this logic. Forcing Nvidia, Apple, AMD, or anyone else to use at least a percentage of Intel fabs while allowing Intel themselves to not fully utilize their own fabs for their own products is completely retarded, I agree. Even before that, government forcing any public or private company to conduct their business contrary to how they see fit, as long as its within the law, is how authoritarian communist countries do. The USA is a free market.

But it seems that we are already moving in that direction with Trumps shakedown of Nvidia and AMD. Make no mistake, it is a mafia style shakedown. "We will allow you to conduct this so called "against national security business" as long as we get our cut". Economists and market professionals across the country are universally calling this out as unprecedented in the USA, and rightly so.
 

511

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can anyone give me the proof that Intel is not utilizing 18A to the fullest?
3 freaking tiles at TSMC of about 100mm2-125mm2 doesn't mean Intel is not using IFS
 
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MoistOintment

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Did you miss the discussion?

We're arguing about forcing Apple/Nvidia to use Intel or bailing them out.

How about we do something simpler and more obvious instead? Like having Intel use their own foundries? If 18A or 14A is so good to go through the hassle of moving to Intel, why isn't Intel themselves using it?

The original intention behind Intel using external is to streamline their roadmap. But apparently the company is in such a desperate situation that we're talking about potential bailouts or heck, forcing others to use Intel. How about we force Intel to use Intel? We had crappy Intel designs propped up by superior Intel process right? How about we force superior Intel design propping up crappy Intel process? For the sake of "national security" or whatever other insane reason?
Wouldn't it also really depend on *why* Intel is outsourcing most NVL-S's compute tile?

If the issue with 18AP is an uncompetitive fMax with N2, but that fMax still exceeds 5Ghz, then what market besides Intel and AMD desktop CPUs does this limitation impact? 18AP could theoretically be perfectly fine for every application except for high clocking desktop parts.
 

oak8292

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It seems like Intel design is handicapped by the foundry. PPA are important metrics for design, the number of transistors or budget and their performance are really important for fundamental decisions like decode width or pipeline depth. ‘Moore’s Law’ was more about industry alignment for equipment and design. Fabs and designs take years to complete and results need to align. Designers need to ‘know’ what the fab will produce in terms of cost and performance.

If 10 nm had met frequency and yield targets only a year late versus what actually happened this whole conversation could be on its head. AMD may be dead as a result of being squeezed between Intel still holding the high ground and ARM products from below. Optane would still be a product. Aurora supercomputer wouldn’t have forced Intel to TSMC and Intel may have had a bigger presence in AI.

Fixing foundry is head and shoulders Intels biggest priority. If Intel goes fabless there isn’t a spin off. The fab just needs to be shut down and sold for parts.

Intel’s fabs is what put them in the dominant position they held for years. The failure of the fabs is astounding. (Was the near fatal decision cobalt for m0 in 10 nm?)
 

511

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It seems like Intel design is handicapped by the foundry. PPA are important metrics for design, the number of transistors or budget and their performance are really important for fundamental decisions like decode width or pipeline depth. ‘Moore’s Law’ was more about industry alignment for equipment and design. Fabs and designs take years to complete and results need to align. Designers need to ‘know’ what the fab will produce in terms of cost and performance.
Design is not doing good except for few stuff have you seen the PPA of the P cores/ NPU/dGPU etc they were really carried by the foundry like @DavidC1 said it's the duty of design now to carry Foundry
If 10 nm had met frequency and yield targets only a year late versus what actually happened this whole conversation could be on its head. AMD may be dead as a result of being squeezed between Intel still holding the high ground and ARM products from below. Optane would still be a product. Aurora supercomputer wouldn’t have forced Intel to TSMC and Intel may have had a bigger presence in AI.

Fixing foundry is head and shoulders Intels biggest priority. If Intel goes fabless there isn’t a spin off. The fab just needs to be shut down and sold for parts.

Intel’s fabs is what put them in the dominant position they held for years. The failure of the fabs is astounding. (Was the near fatal decision cobalt for m0 in 10 nm?)
i agree Cobalt really screwed them along with their late EUV timing
 

Geddagod

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Wouldn't it also really depend on *why* Intel is outsourcing most NVL-S's compute tile?

If the issue with 18AP is an uncompetitive fMax with N2, but that fMax still exceeds 5Ghz, then what market besides Intel and AMD desktop CPUs does this limitation impact? 18AP could theoretically be perfectly fine for every application except for high clocking desktop parts.
What's especially interesting is the 4+8 cpu tile would have likely competed with the AMD N3P? N3E part of Medusa - the "IOD" having 4+4+2 cores. So making the 18A tiles now only be 4+0 (+4 on the IOD), meaning not even the highest end -H parts, competing against N3 parts, would be on 18A.
 

Kepler_L2

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Intel’s fabs is what put them in the dominant position they held for years. The failure of the fabs is astounding. (Was the near fatal decision cobalt for m0 in 10 nm?)
Every Intel node in the last 10 years has faced delays, yield issues and had subpar PPA, you can't blame it all on a single decision.
 

511

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Every Intel node in the last 10 years has faced delays, yield issues and had subpar PPA, you can't blame it all on a single decision.
12 years lol 14nm has delay as well it's not an easy task to fix this mess that was created
 

dangerman1337

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They want flexibility as well in terms of their schedule 18AP is later launch than N2 for Volume. Initial volume will go to DMR
Problem is per rumour is that even 4+8 Compute tile is going to TSMC N2P which doesn't look good... I mean 18AP being behind N2P is one thing because with Zen 6 being N2P/N2X (suspect N2X is possibly a Zen 6+). I mean the rumour AFAIK (I saw it last few days, can't recall it) is that 18AP yields are fine if you clock it at 5.1Ghz for PTL or so for example which gives 70% yields.

Thing is 18A was concieved as a N2 class node when Zen 6 is rumoured to be clocking above 6Ghz, potentially 7Ghz if they can hit it on one of TSMC's N2 derivatives.
 

511

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Problem is per rumour is that even 4+8 Compute tile is going to TSMC N2P which doesn't look good... I mean 18AP being behind N2P is one thing because with Zen 6 being N2P/N2X (suspect N2X is possibly a Zen 6+). I mean the rumour AFAIK (I saw it last few days, can't recall it) is that 18AP yields are fine if you clock it at 5.1Ghz for PTL or so for example which gives 70% yields.
N2X is not happening befor Zen 7 see TSMC roadmap those are rumors
Thing is 18A was concieved as a N2 class node when Zen 6 is rumoured to be clocking above 6Ghz, potentially 7Ghz if they can hit it on one of TSMC's N2 derivatives.
7GHz is a no show i expect 6.2-6.5Ghz and Zen6 is vanilla N2 despite it saying N2P simple fact N2P shares the PDK with N2 they have a common PDK even if it is labeled as N2P it's only N2 for the 2026 launch
 
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DrMrLordX

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They want flexibility as well in terms of their schedule 18AP is later launch than N2 for Volume. Initial volume will go to DMR
Is it actually confirmed that Diamond Rapids will use 18AP? That's gonna bring with it some delays.
 

dangerman1337

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7GHz is a no show i expect 6.2-6.5Ghz and Zen6 is vanilla N2 despite it saying N2P simple fact N2P shares the PDK with N2 they have a common PDK even if it is labeled as N2P it's only N2 for the 2026 launch
I think N2P will be for Zen 6 for next year for sure, I just think N2X for a Zen 6+ Vs RZL in 2027 is plausible.
Is it actually confirmed that Diamond Rapids will use 18AP? That's gonna bring with it some delays.
I think it has to be because otherwise it'd be an embarrassment. I think DMR using chiplets and it being for Server where CPUs tend to clock lower (helps with yields which seem the case with 18A) Vs lower core count desktops that clock high for e-peen which Intel needs Vs high clocking Zen 6 rumours.
 
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