Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[Magio]

That 12Xe GPU SKU better not be for Ultra 9. If it is then it’s only for show. Those laptops will be expensive.

It might not be Ultra 9 only but it won't be cheap. It's the biggest iGPU Intel has ever had, it's gonna be a premium SKU.

 

[511]

Ultra 7 variant as well the clock speed should be around 2.45-2.5 GHz for the 12Xe3 SKU

 

[DavidC1]

I am not saying about penalty but the time and resources it take to maintain it here is the comment from one of Intel employees who worked on it.

Yet the E core keeps putting out significant advancements like clockwork. So whatever the differences are, execution trumps all.

The belief that things need to be constantly overhauled and have user foot the bill with extra resources and time is flawed. Backwards compatibility IS a good thing.

The ideal world would have been where Intel never got to be successful at all, and IBM gave the deal to another company based on RISC architecture.

It might not be Ultra 9 only but it won't be cheap. It's the biggest iGPU Intel has ever had, it's gonna be a premium SKU.

It's not that big in a relative sense though. The 12 Xe3 version's performance will likely be matched by AMD's non-Halo version in that timeframe, so it's needed just to keep up with competition. Just like 8 Xe2 is peak today.

The thing is without the real push provided by the dGPUs, Intel won't be incentivized to put out anything other than minimum effort on drivers and even the hardware side. It was only with their first real dGPU venture they started trying on the driver side.

That's why if the dGPU is cut, it's just another blow in the long term benefit they would have got. I don't see how constantly replacing CEOs and abandoning new projects at a whim is going to get them anymore. Abandoning means you don't learn from the mistakes, so you keep repeating them, just in another fashion.

Lip-Bu Tan is just another in the Otellini/Kraznich/Swan/Gelsinger decline.

 

[Doug S]

No lol it won't Intel will be just another fabless without a big strategic advantage

Intel hasn't had a strategic advantage in almost a decade thanks to their fab issues, so what's the difference?

 

[poke01]

It might not be Ultra 9 only but it won't be cheap. It's the biggest iGPU Intel has ever had, it's gonna be a premium SKU.

I only say this cause the other SKUs have 4 GPU cores. That’s a big difference compared to 12. It’s strange, I’m surprised no pointed this out yet

There is no middle ground

 

[adroc_thurston]

There is no middle ground

Middle ground sucks.

 

[poke01]

Middle ground sucks.

well 4 core Ultra 5 and maybe some ultra 7 SKUs will get beaten by Strix Point refresh.

 

[adroc_thurston]

well 4 core Ultra 5 and maybe some ultra 7 SKUs will get beaten by Strix Point refresh.

Well, Strix Point is also R9-only.
Everything below is an 8CU KRK.

 

[DavidC1]

I only say this cause the other SKUs have 4 GPU cores. That’s a big difference compared to 12. It’s strange, I’m surprised no pointed this out yet

There is no middle ground

Which leaks say that only Ultra 9 is 12 Xe3? Do we have more than that only -H versions will be 12 Xe3 and rest is 4 Xe3?

Well, Strix Point is also R9-only.
Everything below is an 8CU KRK.

Is a PTL competitor still Strix Point by that time?

 

[adroc_thurston]

Is a PTL competitor still Strix Point by that time?

Aye

 

[511]

Which leaks say that only Ultra 9 is 12 Xe3? Do we have more than that only -H versions will be 12 Xe3 and rest is 4 Xe3?

Is a PTL competitor still Strix Point by that time?

Yes It will have 6-9 months of time approx if strix launches H2 2026

 

[DavidC1]

Yes It will have 6-9 months of time approx if strix launches H2 2026

You mean mainstream Strix? Is that going to replace Kraken Point in H2 2026?

I don't think there's a roadmap beyond that point is there?

Does 4 Xe3 look competitive against 8 RDNA3.5?

 

[Hulk]

Are Intel's fabs running right now and producing wafers for products they are selling?

Just noticed 3247 is max factorial function on calculator app. I remember in college the max on our TI calcs was 69.

 

[lightisgood]

What is beautiful about it?

Didn't you see MTL's tile?
PTL looks like a monolithic die.
It probably uses next gen Foveros (25um bump-pitch) or Foveros direct...

P.S.
CWF uses Foveros direct on Intel 3-T and looks like a monolithic die in compute tile.

 

[511]

You mean mainstream Strix? Is that going to replace Kraken Point in H2 2026?

I don't think there's a roadmap beyond that point is there?

Does 4 Xe3 look competitive against 8 RDNA3.5?

I meant Zen 6 Medusa point 🥲 btw they are using RDNA 3.5 with Medusa Point

 

[lightisgood]

It's show time!

Intel reaches 'exciting milestone' for 18A 1.8nm-class wafers with first run at Arizona fab

For now, its only test wafers

www.tomshardware.com

 

[Markfw]

It's show time!

Intel reaches 'exciting milestone' for 18A 1.8nm-class wafers with first run at Arizona fab

For now, its only test wafers

www.tomshardware.com

"only test wafers", remember that.

 

[lightisgood]

"only test wafers", remember that.

This is the typical case of sour grapes.
i18A is clearly established and entering HVM phase.

 

[Markfw]

This is the typical case of sour grapes.
i18A is clearly established and entering HVM.

Its not sour grapes, I am just pointing out that they need to finish testing before going into production. Is that a pretty fixed period ? or it it based on yield ? What is the current yield ? That will determine the real progress.

 

[lightisgood]

Its not sour grapes, I am just pointing out that they need to finish testing before going into production. Is that a pretty fixed period ? or it it based on yield ? What is the current yield ? That will determine the real progress.

As if you knew nothing about intel's manufacturing pipeline, right?

i18A's test wafer is running at Arizona, namely Intel starts i18A HVM at Oregon.
Probably, by end of 3Q25, Intel starts i18A HVM at Arizona.

P.S.
In a word, Intel wins the race of GAA/BSPDN/sub-2nm process node.

 

[igor_kavinski]

In a word, Intel wins the race of GAA/BSPDN/sub-2nm process node.

You are just getting a little too excited. Let the first 18A product hit the shelves. Let the reviewers test it. Until then, nothing is certain. I'm tired of Intel's hype. It's like looking at a boring clown that you want to boot off the stage but he keeps saying, wait! wait! I have one more joke that will make you laugh really hard!

 

[jdubs03]

PTL better be a significant step in performance efficiency. There will be no excuse for them to be putting out as much power (at same performance) as an equivalent ARL SKU, while using the 18A process.

This, plus releasing on time while getting sufficient and sustained volumes will go a long way toward winning more customers on the IFS side. At that point maybe one would be able to call leadership all around. Right now maybe one can make a case that on a technical basis, they’ve tied the race.. and maybe nudged slightly ahead.

 

[poke01]

WTF

 

[poke01]

Am I reading Q1 2026 wrong? Does that mean no H2025 Launch

 

[511]

Am I reading Q1 2026 wrong? Does that mean no H2025 Launch

No you are right that is the mass volume launch in Q1 26 and EEP in H2 25 basically a repeat of Lunar Lake