Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E08 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (20A)Arrow Lake (N3B)Arrow Lake Refresh (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop OnlyDesktop & Mobile H&HXDesktop OnlyMobile U OnlyMobile H
Process NodeIntel 4Intel 20ATSMC N3BTSMC N3BTSMC N3BIntel 18A
DateQ4 2023Q1 2025 ?Desktop-Q4-2024
H&HX-Q1-2025
Q4 2025 ?Q4 2024Q1 2026 ?
Full Die6P + 8P6P + 8E ?8P + 16E8P + 32E4P + 4E4P + 8E
LLC24 MB24 MB ?36 MB ??8 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake

INTEL-CORE-100-ULTRA-METEOR-LAKE-OFFCIAL-SLIDE-2.jpg

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

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jpiniero

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And the launch models have been available for purchase since launch - they didn't just have a hand full of units that sold out.

Volume is obviously not very high. Once you get over a thousand bucks, that's pretty much Apple territory.

Raptor is going to be the bulk of Intel volume in 2024 and seemingly 2025 too.
 

SiliconFly

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Why does this say Lunar Lake is on 18A?


Leaks suggested LNL is N3B exclusive!
 

Hitman928

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Why does this say Lunar Lake is on 18A?


Leaks suggested LNL is N3B exclusive!

Because that's the assumption made by the author of the article . . .
 
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FlameTail

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On nbd.ltd there are PTL-P and PTL-UH entries, seems like Panther Lake is a full mobile lineup and not just build for LNL-MX successor.
Yeah, Panther Lake is in the same vein as Tiger Lake or Meteor Lake.

Idk why some people think it's a Lunar Lake successor.
 

Ghostsonplanets

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I'm guessing this is the "flood the channel" SKU for cheap laptops based on Meteor Lake, not unlike how i3 1215U was for ADL.

But 2P + 4E is basically gutting an entire E core cluster. And the GPU tile (Which is already very small at 64EU on N5) is also gutted to 48 EUs.

So it make wonder if it's truly a cheap SKU that Intel plan to mass manufacture to dominate the lower tier price bracket or if it's just something they did to take advantage of faulty tiles and won't be widely available.


https://videocardz.com/newz/the-slowest-meteor-lake-spotted-intel-core-ultra-5-115u-with-8-cores
 

hemedans

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I'm guessing this is the "flood the channel" SKU for cheap laptops based on Meteor Lake, not unlike how i3 1215U was for ADL.

But 2P + 4E is basically gutting an entire E core cluster. And the GPU tile (Which is already very small at 64EU on N5) is also gutted to 48 EUs.

So it make wonder if it's truly a cheap SKU that Intel plan to mass manufacture to dominate the lower tier price bracket or if it's just something they did to take advantage of faulty tiles and won't be widely available.


https://videocardz.com/newz/the-slowest-meteor-lake-spotted-intel-core-ultra-5-115u-with-8-cores
If they price is same as 1215U then it's welcome addition, any idea how 48EU in MTL will perform compare to 64EU in ADL?
 

uzzi38

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On nbd.ltd there are PTL-P and PTL-UH entries, seems like Panther Lake is a full mobile lineup and not just build for LNL-MX successor.
Panther Lake was supposed to be fully across the stack, until it wasn't.

Yay for Arrow Lake Refresh, I guess?
 

Ghostsonplanets

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If they price is same as 1215U then it's welcome addition, any idea how 48EU in MTL will perform compare to 64EU in ADL?
I don't think we have data on the MTL 64 EU GFX performance yet (Unless I missed something), so hard to guess. Considering Intel said there's a 2x improvement from Xe LP to Xe LPG, I guess it will perform close to an 96 EU Iris Xe? But with improved performance in modern games.
Given that it's branded 5, probably not that cheap.
Good call! Being branded Core Ultra 5, sporting both Ultra and 5 name mean there's probably some premium value. But it's such a harvested SKU that I think we might be seeing it in value laptops by the end of the year. Unless this is just a small production special SKU to take advantage of binned tiles.
Panther Lake was supposed to be fully across the stack, until it wasn't.

Yay for Arrow Lake Refresh, I guess?
Oof. So it's ARL this year, ARL-R next year and NVL in late 26? That's just sad from Intel.
 
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jpiniero

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Good call! Being branded Core Ultra 5, sporting both Ultra and 5 name mean there's probably some premium value. But it's such a harvested SKU that I think we might be seeing it in value laptops by the end of the year. Unless this is just a small production special SKU to take advantage of binned tiles.

It's the only SKU so far that has any busted E cores. So that alone should make there be a decent amount of salvage.

There gets a point where it may not make much sense versus the Core Not Ultra products... esp given that 10 nm is a lot cheaper.
 

SiliconFly

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...to distribute the workload uniformly across the three different core types.
Just need a bit more clarity. Initial leaks said Lunar Lake has 4 P cores & 4 LPE cores. Then I remember reading some articles that (incorrectly?) said LNL has 4 P cores & 4 E cores. Recently I came across an article that says LNL has 4 P cores, 2 E cores & 2 LPE cores.

Any thoughts?
 

DavidC1

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Just need a bit more clarity. Initial leaks said Lunar Lake has 4 P cores & 4 LPE cores. Then I remember reading some articles that (incorrectly?) said LNL has 4 P cores & 4 E cores. Recently I came across an article that says LNL has 4 P cores, 2 E cores & 2 LPE cores.

Any thoughts?
The Intel leak is clear that there are only two core types.
Someone here said that silicon able to boost higher is by nature leakier.
Yes, that's why the -H chips always needed less voltage to clock the same as the -U parts for example. The design knobs doesn't just exist for processes, but silicon and design, and even binning.

Process: High VT vs Low VT. Latter is high performance, former is low leakage

Design: P vs E. The E requires higher voltage at the same clocks

Binning: -H vs -U

The -H chips need high clocks without stratospheric clocks and voltage, and the higher leakage matters lot less because it's paired with dGPUs and massive screens anyway.

The -Us need low leakage because battery life during instances of idle and low usage is significantly influenced by how much silicon leakage is there.
 
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Ghostsonplanets

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Just need a bit more clarity. Initial leaks said Lunar Lake has 4 P cores & 4 LPE cores. Then I remember reading some articles that (incorrectly?) said LNL has 4 P cores & 4 E cores. Recently I came across an article that says LNL has 4 P cores, 2 E cores & 2 LPE cores.

Any thoughts?
The slides that Yuuki_N shared and Geddagod archived shows that LNL will have 4 P Cores and 4 Skymont E Cores, all in the same CPU + GPU SoC tile. The IO tile in LNL makes no mention of LPE cores. And the leaked Windows Manager screenshot of a LNL platform device showed it with 8C/8T rather than 8C/10T.

So I think it's fair to assume the LPE cores were discarded for projects after MTL and ARL (Which reuses MTL tiles, sans for CPU and GFX) and will be a thing of the past for the future products. Unless the TGL/MTL team, who supposedly are making PTL, introduce it again.

For what's worth, I think Exist50 alluded to this scenario in the past. That LPE cores were a MTL addition that increased complexity and future tiled designs from Intel, specially LNL, looked into what MTL did wrong to take the learning and improve upon.
 

SiliconFly

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The slides that Yuuki_N shared and Geddagod archived shows that LNL will have 4 P Cores and 4 Skymont E Cores, all in the same CPU + GPU SoC tile. The IO tile in LNL makes no mention of LPE cores. And the leaked Windows Manager screenshot of a LNL platform device showed it with 8C/8T rather than 8C/10T.

So I think it's fair to assume the LPE cores were discarded for projects after MTL and ARL (Which reuses MTL tiles, sans for CPU and GFX) and will be a thing of the past for the future products. Unless the TGL/MTL team, who supposedly are making PTL, introduce it again.

For what's worth, I think Exist50 alluded to this scenario in the past. That LPE cores were a MTL addition that increased complexity and future tiled designs from Intel, specially LNL, looked into what MTL did wrong to take the learning and improve upon.
Of course, no LPE cores on SoC or IO tiles.

This is one of the initial leaked slide which clearly says LNL has 4 LPE cores instead of the 4 regular E cores. What are we missing?

 
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Ghostsonplanets

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Of course, no LPE cores on SoC or IO tiles.

This is one of the initial leaked slide which clearly says LNL has 4 LPE cores instead of the 4 regular E cores. What are we missing?

I think what the slide mean is that the 4 E Core cluster is optimized for low power scenarios rather than they being LPE cores as we know from MTL.

But if Intel actually means 4P cores to handle main worload and the E cores are actually replacing the LPE Cores workload scenario (Idling, watching video, reading text, etc), then It's actually very interesting.
 

mikk

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They are separated from the P-cores ringbus, it's a separate cluster it seems. In that sense it's a low power version of the E-cores. Sure they are even more power optimized than Crestmont. But this won't mean they are disabled under load. With only 4 P cores LNL needs the power of the 4 Skymont cores. Bionic_Squash suggests LNL 17W runs 50% faster in Cinebench R23 than MTL-U which has 2+8 cores, I don't think this is realistic with only 4 P-cores.
 

DavidC1

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Why not? LNC might be that good!
Or Lion Cove is mediocre and Lunarlake implementation is what makes it decent. Also, TSMC's N3 is likely quite a bit better compared to low-volume Intel 4 especially at lower power envelopes. It is likely not a coincidence even Intel admits they will be behind with 20A and won't get ahead until 18A. So 18A is relatively quite a bit better than 20A. Conversely it can also mean 20A is not as good as people are expecting.

Core is just one ingredient in a complex recipe called the SoC.
With only 4 P cores LNL needs the power of the 4 Skymont cores. Bionic_Squash suggests LNL 17W runs 50% faster in Cinebench R23 than MTL-U which has 2+8 cores, I don't think this is realistic with only 4 P-cores.
Not at all. Meteorlake supposedly gets a significant improvement just changing the firmware! That's just sad. Now take a new process from a company used to fabbing smartphone processors, and a brand new SoC design.

The comparison with AMD shows Meteorlake is terrible at that low power envelope. Terrible.
 
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mikk

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Not at all. Meteorlake supposedly gets a significant improvement just changing the firmware! That's just sad. Now take a new process from a company used to fabbing smartphone processors, and a brand new SoC design.

The comparison with AMD shows Meteorlake is terrible at that low power envelope. Terrible.


Now disable 4 cores from AMD and see what happens. With only 4 LNC cores without SMT 50% faster than 2+8 MTL-U? That's 4 threads vs 12 threads! +50% is basically MTL-H 6+8 40-50W level in Cinebench. I say no chance. What LNC IPC increase do they need to make this happen, something like 50%? Why would Intel waste 4 Skymont cores on the same tile and same N3B? Makes no sense to me.
 
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