Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.





Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[Exist50]

Meaning that even if Intel ended up using TSMC, they would still be utilizing their HP cells. That's also (one) of the reasons I called Intel 4 a "pseudo" node.
Wdym using Intel's past as a reference btw?

Ok, so I think we're on the same page about HP libs. But Intel is definitely the exception in their reliance on them. Oh, and I meant that historically, Intel's "dense" libraries weren't huge jumps vs their HP ones (maybe because they didn't use them for much?), but I suppose Intel 3 could be different. Kinda surprised they didn't talk about it alongside Intel 4.

If that is good enough for other tech websites such as anandtech and wikichip to report on and use as a reference, I don't get why it isn't enough for us to use as a handy benchmark.

Tbh, I don't think those sites should be quoting those numbers either. And again, not just an Intel problem. Ask anyone in physical design how N3 is. You need a lot of asterisks on their claims.

The biggest one, imo, being capacity. Their EUV situation should get better, no doubt, but there really is no reason why Intel should be using Intel 3 for arrow lake DESKTOP of all things when they are also using Intel 3 for both granite rapids and sierra forest.

Intel has at least claimed that capacity isn't an issue, and I'd be surprised if desktop compute dies were the deciding factor either way. Though perhaps it's a consideration.

 

[A///]

is lion cove the new royal cove?

 

[Geddagod]

Those numbers can probably be well explained by actually having HD libraries, but even if not, they got similar gains with 10+ (Ice Lake) -> 10++/10SF (Tiger Lake) seemingly without huge changes to the node.

Correct me if I'm wrong, but don't HD libs have lower perf/watt but better density? So if Intel 3 was just adding adding HD libs, it doesn't make sense to have significantly higher perf/watt.
Intel 10nm to 10nm SF was also an ~15% perf/watt gain if I remember. But there were also successive generations of "10nm" nodes between OG 10nm and 10nm superfin, 10nm cannon lake, 10nm+ icelake, 10nm++ (superfin) tiger lake, I'm pretty sure.
I also don't think there were notable changes in transistor density between the "+"s, or even with superfin, but increased density with HP cells was one of the main improvements with Intel 3 over Intel 4 from the Intel slides, right below the perf/watt gain.

By the time Pat joined, they were already past the worst of 10nm, so I don't necessarily think that statement was related.

Either way, it seems like the reason they couldn't push Intel 4 out is because that node was busted as well. Which is why they had to simplify it massively by expanding the use of EUV so much later on. And I also believe that's why they aren't even attempting HD libs until Intel 3, they just want to focus on one aspect at a time.
This is just a bit of head cannon, but I think Intel started work on HD cells, which is why they had granite rapids on Intel 4, but then decided to just improve it and implement it on Intel 3, so they can make sure they get Intel 4 out on time for meteor lake. And it's fine if Intel 4 just has HP cells for meteor lake, because all they are using Intel 4 for there is the cpu tile, while for granite rapids they need HD cells for parts like IO.

 

[Geddagod]

is lion cove the new royal cove?

MLID thinks so ¯\_(ツ)_/¯
But honestly we have so little info on what lion cove might even possibly be, I just feel like the hype is a bit boring. At least AMD gave us something for zen 5 - widening the core, focus on integrating AI IP into the chip, and rumors about including little cores... arrow lake and lion cove just seems to stale in comparison.

 

[Exist50]

Correct me if I'm wrong, but don't HD libs have lower perf/watt but better density?

You know, I'm not quite sure. I don't have much experience on that side of things, and tbh have just been parroting what I hear from others.

Intel 10nm to 10nm SF was also an ~15% perf/watt gain if I remember. But there were also successive generations of "10nm" nodes between OG 10nm and 10nm superfin, 10nm cannon lake, 10nm+ icelake, 10nm++ (superfin) tiger lake, I'm pretty sure.

I think that "15%" was vs the Ice Lake process (10+). Intel renamed that to just "10nm" presumably in an attempt to pretend (or acknowledge) that Cannonlake never really existed as a product.

This is just a bit of head cannon, but I think Intel started work on HD cells, which is why they had granite rapids on Intel 4, but then decided to just improve it and implement it on Intel 3, so they can make sure they get Intel 4 out on time for meteor lake. And it's fine if Intel 4 just has HP cells for meteor lake, because all they are using Intel 4 for there is the cpu tile, while for granite rapids they need HD cells for parts like IO.

Yeah, my thoughts are similar, though I'm approaching it from the direction of "If nothing is actually going to use these libraries, why would we bother with them in the first place?". Though GNR might be...interesting.

 

[Exist50]

is lion cove the new royal cove?

MLID thinks so ¯\_(ツ)_/¯

Lion Cove has nothing to do with Royal, regardless of what MLID says. There should be zero ambiguity when Royal actually makes it to market.

But honestly we have so little info on what lion cove might even possibly be, I just feel like the hype is a bit boring. At least AMD gave us something for zen 5 - widening the core, focus on integrating AI IP into the chip, and rumors about including little cores... arrow lake and lion cove just seems to stale in comparison.

Tbh, AMD didn't give us much info for Zen 5 either. The big.little thing is purely rumors for now, and "widening the core" is pretty much a "no duh" at this point. AI can mean anything as well.

I think Intel might be worried about the Osborne effect harming MTL if they talk too much about Lion Cove. Everyone I've heard says IDC is very excited about it.

 

[Geddagod]

Tbh, AMD didn't give us much info for Zen 5 either. The big.little thing is purely rumors for now, and "widening the core" is pretty much a "no duh" at this point. AI can mean anything as well.

Fair enough

Everyone I've heard says IDC is very excited about it.

Sorry, what/who is IDC?

 

[Exist50]

Sorry, what/who is IDC?

IDC = Israel Development Centre. Intel's Israeli team, basically. They have the client CPU team that did Ice Lake, Alder/Raptor Lake, and is doing Lunar Lake, while the US team (DDG) did/is doing Tiger Lake, Meteor Lake, and Arrow Lake.

IDC also contains Intel's big core (i.e. capital-c Core) team. Atom is part of DDG.

 

[DrMrLordX]

Again, since Raptorlake mobile is not out yet, whatever is going to be introduced in January(?) of next year, we're not going to see a Meteorlake version in June of that same year.

Are we sure that Intel has more 13-series mobile chips in the pipeline? Or that there's going to be any Raptor Lake mobile at all? From the branding it certainly looks like there won't be.

Note how AMD went the other way, sticking to a yearly cadence, at first with chips that weren't competitive in performance nor battery life. That steady cadence resulted in AMD's biggest mobile market share yet within 5 years/gens.

Would kind of be nice if AMD could do that on desktop . . . even little improvements like Cezanne to Rembrandt have improved things for the end user in some way.

@DrMrLordX loves to moan about amd's slower cadence despite evening out with amd or getting ahead of them.

Moaning? Nah, more like flaming AMD. But as goes workstations/server, so goes desktop, so here we are.

 

[coercitiv]

That steady cadence resulted in AMD's biggest mobile market share yet within 5 years/gens.

The steady cadence helped gain OEM favor, but it was the steady improvements that gained media & consumer favor.

I'll give you a counter-example for not releasing products for the sake of cadence: Rocket Lake. It barely improved on the Skylake apex clone, yet I would argue it also had the unfortunate side-effect of cementing AMD as the PC leader in the eyes of the consumer. Intel payed twice for Rocket Lake, first with the poor launch itself, and then with poor Alder Lake sales versus Zen 3, an inferior product from the competition that managed to ride the wind of mind share.

I think @Exist50 has it right here: cadence only works if you bring relevant improvements to the table.

 

[IntelUser2000]

@Exist50 That doesn't matter. My point is whatever chip generation they choose to introduce, that product has to have a 12 month lifecycle. You aren't going to see an XPS 14th Gen coming 6 months after XPS 13th Gen for example.

Are we sure that Intel has more 13-series mobile chips in the pipeline? Or that there's going to be any Raptor Lake mobile at all? From the branding it certainly looks like there won't be.

We don't know how comprehensive it will be but earlier I posted that Intel's Mandy has said there will be U, P and H variants. Also numerous 13th Gen H chips are on Geekbench. There's also the fact that DLVR is nowhere to be found on desktop - meaning it'll be a mobile thing.

@Geddagod If anything, they lost slight bit of density for Intel 7 and Intel 7 Ultra. The performance gains didn't come for free.

New processes, a proper shrink gets you smaller and faster, not trading density for performance.

We all know that Icelake's 10nm was crap hence the lack of clocks for that generation, including the server -SP line.

Oh and I meant that historically, Intel's "dense" libraries weren't huge jumps vs their HP ones (maybe because they didn't use them for much?), but I suppose Intel 3 could be different. Kinda surprised they didn't talk about it alongside Intel 4.

Where do you suppose that they got the massive density gains with Airmont on the 14nm process? It was the only product that achieved the claimed 2.7x density. Also Iris Xe brought nearly twice the density too. I assume both are taking full advantage of HD libraries and standard Core simply ignores it.

I think if they come out with Crestmont on Intel 3, then we'd see the 2x+ shrink as expected in presentations.

 

[jpiniero]

I'll give you a counter-example for not releasing products for the sake of cadence: Rocket Lake.

Yeah but there's two ways to look at it.

The first is that they held back the Comet Lake K parts for some reason, possibly because they knew that Rocket Lake K would not hit the Q4 timing. So Comet Lake K was 15-16 months and Rocket K was only 8. Which put it back on schedule.

The other is that OEMs don't care that much about the K parts and the locked parts went April-March-January.

 

[moinmoin]

Correct me if I'm wrong, but don't HD libs have lower perf/watt but better density?

Primary yes. But higher density literally also gives you more and finer grained space to then optimize for perf/watt which I guess is why AMD keeps preferring it over HP libs for all CPU designs.

Would kind of be nice if AMD could do that on desktop . . . even little improvements like Cezanne to Rembrandt have improved things for the end user in some way.

Many of the mobile chips do come to desktop eventually so in the end desktop does get both.

Regarding timing I feel AMD is intentionally focusing on whole gens for major launches on desktop. Going every little step they do for mobile OEMs on desktop as well would dilute the effect.

The steady cadence helped gain OEM favor, but it was the steady improvements that gained media & consumer favor.

And that's exactly the point: predictability helps building trust. Steady cadence helps OEM plan for future updates. Steady improvements helps gaining media & consumer trust the resulting products to be something exciting to look forward to. Intel essentially randomly launching a new chip because performance only will cement the increasing lack of trust in Intel products in both areas as such an action would not be predictable.

 

[Doug S]

N3 is two full node jumps from N5

Where do you get that idea? N4 is not a node, it is a tweaked version of N5.

 

[Exist50]

Where do you get that idea? N4 is not a node, it is a tweaked version of N5.

Typo. Meant "from N7". Basically, taking N7 == Intel 7 as a starting point, TSMC makes two steps to N3 while Intel only takes one to Intel 3.

 

[nicalandia]

Intel Desktop Meteor Lake-S CPUs To Feature Up To 22 Cores, Arrow Lake-S Up To 24 Cores, Quad Xe iGPU Cores & 125W TDPs

Intel's 14th Gen Meteor Lake-S & 15th Gen Arrow Lake-S Desktop CPU SKUs have been detailed for the next-gen LGA 1851 socket platform.

wccftech.com

Posting images/links without personal commentary, is a violation of the rules.


esquared
Anandtech Forum Director

 

[Hulk]

Intel having it's own fabs will be more of a benefit to them as they move to the chiplet CPU as they only need use the more costly TMSC nodes for the actual CPU's. The rest they can fab in house. And we all know they have tons of 14nm capacity still available if needed

 

[jpiniero]

Intel Desktop Meteor Lake-S CPUs To Feature Up To 22 Cores, Arrow Lake-S Up To 24 Cores, Quad Xe iGPU Cores & 125W TDPs

Intel's 14th Gen Meteor Lake-S & 15th Gen Arrow Lake-S Desktop CPU SKUs have been detailed for the next-gen LGA 1851 socket platform.

wccftech.com

I'd say WTFTech got bamboozled. But making articles out of anything anyone comes up with is what they do.

 

[mikk]

View attachment 70086

Intel Desktop Meteor Lake-S CPUs To Feature Up To 22 Cores, Arrow Lake-S Up To 24 Cores, Quad Xe iGPU Cores & 125W TDPs

Intel's 14th Gen Meteor Lake-S & 15th Gen Arrow Lake-S Desktop CPU SKUs have been detailed for the next-gen LGA 1851 socket platform.

wccftech.com

I'm surprised there is a 6+16 MTL-S variant assuming it's correct, I expected max 6+8 for MTL-S. However even this configuration backs up the earlier rumors from MTL-S being limited for lowend-midrange and ARL-S 8+16 for a highend option on LGA 1851. Earlier rumors indicated 8+32 though. With MTL-S up to 6+16 they could replace the Raptor Lake lineup up to i5-13600K. i7 have 8 big cores, this will be Arrow Lake territory. Between ARL and MTL the cores are likely vastly different, both E-cores and P-cores. There is a big differentiation between i5 and i7 if true.

 

[Henry swagger]

Intel Desktop Meteor Lake-S CPUs To Feature Up To 22 Cores, Arrow Lake-S Up To 24 Cores, Quad Xe iGPU Cores & 125W TDPs

Intel's 14th Gen Meteor Lake-S & 15th Gen Arrow Lake-S Desktop CPU SKUs have been detailed for the next-gen LGA 1851 socket platform.

wccftech.com

Looks like i5 to i9 will have the same core count.. redwood cove must be a huge core

 

[Exist50]

They mention slides, but I don't see them posted anywhere? Or are they keeping them to themselves?

As terrible as wccftech is, I can believe these claims. But 6+16 for MTL-S is an odd decision. Almost seems like they're hedging their bets vs ARL.

 

[nicalandia]

Looks like i5 to i9 will have the same core count.. redwood cove must be a huge core

Not that Huge

Golden Cove on the left and Redwood Cove on the right

 

[SteinFG]

Intel Desktop Meteor Lake-S CPUs To Feature Up To 22 Cores, Arrow Lake-S Up To 24 Cores, Quad Xe iGPU Cores & 125W TDPs

Intel's 14th Gen Meteor Lake-S & 15th Gen Arrow Lake-S Desktop CPU SKUs have been detailed for the next-gen LGA 1851 socket platform.

wccftech.com

Looks like i5 to i9 will have the same core count.. redwood cove must be a huge core

6+16 is max. obviously i9/i7/i5 is going to be tiered. the only logical guess is 6+16 / 6+12 / 6+8, as E-cores are clustered in 4.

 

[mikk]

They mention slides, but I don't see them posted anywhere? Or are they keeping them to themselves?

As terrible as wccftech is, I can believe these claims. But 6+16 for MTL-S is an odd decision. Almost seems like they're hedging their bets vs ARL.

Did you expect 6+8? Assuming it's true they can add +4 E cores to their i5 lineup similar to Raptor. There is no core count increase on ARL-S, I guess they don't have to increase over Raptor because of the expected large IPC gains on both E and P cores.

 

[nicalandia]

Did you expect 6+8? Assuming it's true they can add +4 E cores to their i5 lineup similar to Raptor. There is no core count increase on ARL-S, I guess they don't have to increase over Raptor because of the expected large IPC gains on both E and P cores.

It has to be More Huge Jump of IPC(ISO Speed) because it has to make up for the 33% core deficit on the P core side.

Raptor Lake 8+16 vs MTL 6+16