Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.





Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[BorisTheBlade82]

The OEMs can simply split their product lines between the two. They don't upgrade everything at once, nor do they do so immediately at launch. So something like mainstream business laptops getting Raptor Lake updates in the first half of the year, and more consumer-oriented devices getting Meteor Lake in the latter half. And on desktop, Rocket Lake -> Alder Lake showed they're willing to refresh in <1 year.

N3 is two full node jumps from N5, while Intel 3 is only one full node jump from Intel 7. That's where the divergence comes from. In reality, I expect Intel 4/3 will be competing with N5/N4, and 20A/18A with N3E/N3P/etc. That's not to say that they'll be 100% equivalent, but it's probably the closest comparison.

And again, clearly Intel feels similarly, with Arrow Lake being N3 and 20A. We'll be able to get a really good comparison out of that.

According to David Schor, at least density wise Intel4 should be more leaning to N3 and significantly outperform N5:

To that end, we estimate Intel 4 at 123.4 MTr/mm², 2.04x from 60.5 MTr/mm² in Intel 7. Our data for TSMC N5 is very much incomplete but our rough estimates based on known pitches put their HP library at 94.85 MTr/mm². Based on most of the recent publically available foundry data, Intel 4 HP cells appear denser than TSMC N5 HP and are likely closer to or better than TSMC N3 HP cells and denser than Samsung’s 3GAE.

A Look At Intel 4 Process Technology

A look at Intel's next-generation high-performance process technology, Intel 4.

fuse.wikichip.org

 

[jpiniero]

I'm not sure if it's late compared to their roadmap (not that they've published one in years...), but typically companies want to launch new consumer products in time for holiday shopping. Unless Intel's been shipping them for a while, that's not gonna happen.

Intel's mobile parts have consistently been launching in Q1. The desktop parts also have been Q1, except for the K which has been mostly in Q4. But with Comet Lake they must have delayed the K parts from Q4 19 to Q2 20 to buy some additional time for Rocket Lake.

I guess we will have to see if Intel just rebrands Raptor Lake for K desktop in Q4 23.

 

[IntelUser2000]

And on desktop, Rocket Lake -> Alder Lake showed they're willing to refresh in <1 year.

Yes on desktops, where sockets exist and both are socket compatible.

On laptops they've never done that, because it's sold as a device not as a part.

Whether they'll accept a split approach is something different. It doesn't sound like it: https://www.pcworld.com/article/1073245/intel-13th-gen-core-cpus-raptor-lake-reveal.html

Intel will eventually fill out its processor lineup for the remainder of the desktop space, as well as mobile: U-, P-, H-, and HX-series chips for laptops and 35W and 65W S-series processors for desktops will accompany these new K-series processors in time, Mock said—the 13th-gen family will eventually offer no less than 50 CPUs.

Mandy Mock, the vice president and general manager of desktop, workstation, and channel for Intel.

N3 is two full node jumps from N5, while Intel 3 is only one full node jump from Intel 7. That's where the divergence comes from. In reality, I expect Intel 4/3 will be competing with N5/N4, and 20A/18A with N3E/N3P/etc. That's not to say that they'll be 100% equivalent, but it's probably the closest comparison.

Intel 4 offers 20% improvement and Intel 3 offers 18% improvement. Those are both significantly greater than TSMC nodes. Of course it won't be competing in all metrics but performance-wise I doubt it'll be behind even N3.

 

[Exist50]

According to David Schor, at least density wise Intel4 should be more leaning to N3 and significantly outperform N5:

In HP logic, maybe, but their big deficits are in SRAM and HD logic, and those are far too big to ignore. All said and done, I think N5/N4 is a much more realistic density target. Also, weren't there some early indications from MTL die shots showing pretty low density?

On laptops they've never done that, because it's sold as a device not as a part.

Laptops can also have "socket" compatibility. I fully expect Raptor Lake to be ball compatible with Alder Lake, for example. Meteor Lake is obviously a different story.

Whether they'll accept a split approach is something different. It doesn't sound like it: https://www.pcworld.com/article/1073245/intel-13th-gen-core-cpus-raptor-lake-reveal.html

I meant that OEMs won't necessarily adopt the two equally across their lineups relative to release. But Intel will still want to have as close to a full lineup as possible.

 

[IntelUser2000]

Laptops can also have "socket" compatibility. I fully expect Raptor Lake to be ball compatible with Alder Lake, for example. Meteor Lake is obviously a different story.

Uhh, I see where your facts divulge from your opinion.

They are way different. With sockets it allows the user to upgrade. What are they going to do in laptops? "Hey send your laptop in for a mid-cycle upgrade and we'll ball a new chip in!"

Laptops need to have a selling time pretty much close to 12 months.

I meant that OEMs won't necessarily adopt the two equally across their lineups relative to release. But Intel will still want to have as close to a full lineup as possible.

This is also an opinion I presume. Either Intel will change plans and we won't see certain Raptorlake parts or Meteorlake mobile is mostly Q4. Or we'll see another Broadwell where no one cared to use the Iris Pro GT3 parts except Apple.

 

[Exist50]

They are way different. With sockets it allows the user to upgrade. What are they going to do in laptops?

I'm talking about how OEMs upgrade their laptops designs. Obviously the users can't, but for things like Raptor Lake, that don't need the OEMs to redesign their motherboards or anything, they can do quick product refreshes without any major investment. But that's kinda secondary to my point.

This is also an opinion I presume. Either Intel will change plans and we won't see certain Raptorlake parts or Meteorlake mobile is mostly Q4.

There's no doubt in my mind that Intel will release Meteor Lake the second the silicon is ready, regardless of when or what else is in the market. It's far more important to have competitive products, and also to prove the viability of Intel 4, than it is to have a nice yearly schedule. And from the OEM's perspective, the sooner Intel delivers, the less they miss their promises by.

 

[moinmoin]

It's far more important to have competitive products, (...) than it is to have a nice yearly schedule.

Note how AMD went the other way, sticking to a yearly cadence, at first with chips that weren't competitive in performance nor battery life. That steady cadence resulted in AMD's biggest mobile market share yet within 5 years/gens.

 

[Geddagod]

The OEMs can simply split their product lines between the two. They don't upgrade everything at once, nor do they do so immediately at launch. So something like mainstream business laptops getting Raptor Lake updates in the first half of the year, and more consumer-oriented devices getting Meteor Lake in the latter half. And on desktop, Rocket Lake -> Alder Lake showed they're willing to refresh in <1 year.

N3 is two full node jumps from N5, while Intel 3 is only one full node jump from Intel 7. That's where the divergence comes from. In reality, I expect Intel 4/3 will be competing with N5/N4, and 20A/18A with N3E/N3P/etc. That's not to say that they'll be 100% equivalent, but it's probably the closest comparison.

And again, clearly Intel feels similarly, with Arrow Lake being N3 and 20A. We'll be able to get a really good comparison out of that.

Density wise, Intel 4 is closer to TSMC 3nm in HP cell density than TSMC 5nm, according to wiki chip. Performance wise, depending on if you think Intel 10nm SF is as good as TSMC 7nm or if TSMC 7nm perf equivalent is Intel 7, Intel 4 would either be performing similar to N3 or N5/4. But by Intel 3 comes out, even if Intel 4 performs on par with TSMC 5/4nm, the 18% gain in perf/watt should place it above TSMC 3nm in perf.
If not Intel 4, Intel 3 is competing with N3 in perf and density, not N4. Intel 4 seems to be much more of a pseudo 3nm node than a 5nm class node.

 

[Exist50]

Note how AMD went the other way, sticking to a yearly cadence, at first with chips that weren't competitive in performance nor battery life. That steady cadence resulted in AMD's biggest mobile market share yet within 5 years/gens.

AMD doesn't pretend to have a yearly IP schedule. Instead they plan for a yearly product schedule that intercepts new CPU or GPU IP along the way. Intel pretends they're going to have new cores and new SoCs every year, then when they inevitably miss they backfill with refreshes like Raptor Lake.

Density wise, Intel 4 is closer to TSMC 3nm in HP cell density than TSMC 5nm

Perhaps it is, but real designs aren't just a perfect array of HP cells. SRAM alone matters far more, and Intel's way behind there, not to mention HD or any reality from routing constraints.

But by Intel 3 comes out, even if Intel 4 performs on par with TSMC 5/4nm, the 18% gain in perf/watt should place it above TSMC 3nm in perf.

By what math? You seem to be basically cherry picking the best possible interpretation of Intel's numbers and hoping they hold up to the reality TSMC's delivering today. That's just not a great way to analyze node claims.

If not Intel 4, Intel 3 is competing with N3 in perf and density

Clearly Intel themselves don't seem to think so, since they're using N3 over Intel 3, and even will be comparing it directly to 20A.

 

[jpiniero]

Clearly Intel themselves don't seem to think so, since they're using N3 over Intel 3, and even will be comparing it directly to 20A.

I'm assuming the reason for using TSMC over internal nodes with Meteor or Arrow was because of (fears of bad) yields more than quality or density. For any of the chiplets, not just the CPU.

 

[Exist50]

I'm assuming the reason for using TSMC over internal nodes with Meteor or Arrow was because of (fears of bad) yields more than quality or density. For any of the chiplets, not just the CPU.

I don't think that really makes sense for Arrow Lake. It's 2024 product, and intel 3 is a derivative of Intel 4, so it should be comparatively low risk. If they can't reliably ship Intel 3 in let's say mid-2024, then that means:

1. Intel 4 and Meteor Lake have both failed.
2. Sierra Forest and Granite Rapids can't ship, so server's dead.
3. 20A/18A are delayed as well, so IFS is dead.

In light of all that, I think any yield issues with ARL would be negligible in the big picture. If they're that worried about yield, then they should have Sierra Forest on N3 instead.

 

[Geddagod]

Perhaps it is, but real designs aren't just a perfect array of HP cells. SRAM alone matters far more, and Intel's way behind there, not to mention HD or any reality from routing constraints.

I wouldn't say SRAM matters far more, but even then Intel 4 is around TSMC 5nm in that regards. (My thoughts are SRAM is more important, but not far more, considering logic still constitutes a large part of dies and also sram is getting moved off the logic dies - something that even you were arguing for I think in the Zen 5 discussion thread? If I recall correctly...) But Intel also is pretty much focusing on performance more than density with Intel 4, to the extent that they don't even HAVE high density cell libs with Intel 4! Which is why I couldn't mention that lmao.

By what math? You seem to be basically cherry picking the best possible interpretation of Intel's numbers and hoping they hold up to the reality TSMC's delivering today. That's just not a great way to analyze node claims

I'm literarily using TSMCs own first party data not "the reality TSMC is delivering today" along with Intel's own performance claims. I'm not "cherry picking" anything considering I gave you both options on whether to estimate Intel 10nm SF OR Intel 7 being ~ TSMC 7 performance, if I was cherry picking, I would have just said Intel 4 is around TSMC 3nm perf because Intel 10 SF is ~7nm perf. Either way, what is the "better way" to analyze node claims, since we have little to no way to find out performance claims between foundry nodes since we don't have the same architectures being used across the different nodes?

Clearly Intel themselves don't seem to think so, since they're using N3 over Intel 3, and even will be comparing it directly to 20A.

I really... don't think that's a valid argument, I mean do you really want to me to argue why this has little to no relevance?

 

[Geddagod]

I don't think that really makes sense for Arrow Lake. It's 2024 product, and intel 3 is a derivative of Intel 4, so it should be comparatively low risk. If they can't reliably ship Intel 3 in let's say mid-2024, then that means:

1. Intel 4 and Meteor Lake have both failed.
2. Sierra Forest and Granite Rapids can't ship, so server's dead.
3. 20A/18A are delayed as well, so IFS is dead.

In light of all that, I think any yield issues with ARL would be negligible in the big picture. If they're that worried about yield, then they should have Sierra Forest on N3 instead.

1. Intel 3 might have problems that Intel 4 don't face, such as issues with their high density libraries.
2. That's true
3.20/A and 18/A are supposed to be pretty different from Intel 3 either way (ribbon fet) and also have different node teams, a delay with one node doesn't necessarily mean a delay in another. Also IFS being dead is certainly a stretch, at the very least the US gov is probably still going to utilize it or prop it up, for the sake of national security.

 

[jpiniero]

Keep in mind the Arrow Lake CPU chiplet is presumably much bigger than the Meteor Lake M die. I have doubts you will see anything other than the 2+8 Meteor die actually make it to market, but they could certainly try.

If they're that worried about yield, then they should have Sierra Forest on N3 instead.

They should, and maybe they will eventually. I'm sure it got serious pushback internally over even doing client parts at TSMC... Server is a whole another story. Yeah there's political implications and would likely be the end of IFS at the leading edge.

 

[Exist50]

I wouldn't say SRAM matters far more, but even then Intel 4 is around TSMC 5nm in that regards.

IIRC, Intel 4 is actually a bit worst than N5 there, or at the very least worse than N4.

My thoughts are SRAM is more important, but not far more, considering logic still constitutes a large part of dies and also sram is getting moved off the logic dies - something that even you were arguing for I think in the Zen 5 discussion thread? If I recall correctly...

Well it's not just SRAM. HD libraries are more important than HP these days. But regarding stacking, I agree that's an interesting argument to make in terms of how we evaluate nodes...but Intel doesn't look to be stacking cache anytime soon, and by the time they do, Intel 3 would probably be the cache die.

But Intel also is pretty much focusing on performance more than density with Intel 4, to the extent that they don't even HAVE high density cell libs with Intel 4! Which is why I couldn't mention that lmao.

Well yeah, but not even having them at all is an even stronger argument against Intel 4 than merely being behind. But even a theoretical HD library, using Intel's past as reference, would be very far from N3. Though N3 has its own issues that complicate the comparison.

Either way, what is the "better way" to analyze node claims, since we have little to no way to find out performance claims between foundry nodes since we don't have the same architectures being used across the different nodes?

When the fabs quote node gains, usually they cite the best possible numbers across the VF curve (and even across cell types, on occasion). For example, for "up to" efficiency numbers, those are often done Vmin to Vmin, or at an iso-frequency number at low voltage. Likewise for performance gains. For a typical node shrink (with constant or a reduction in Vmax), it's usually a smaller gap at high-V. Honestly, it's usually best to throw out their marketing entirely, and that applies to Intel, TSMC, and Samsung. They contort the data so much it's useless to a layman.

I really... don't think that's a valid argument, I mean do you really want to me to argue why this has little to no relevance?

Sure, go ahead.

 

[Exist50]

1. Intel 3 might have problems that Intel 4 don't face, such as issues with their high density libraries.

While possible, derivative nodes are much lower risk. I think it's safe to say that if they get Intel 4 working, Intel 3 is high confidence. But even if something like the HD libraries are broken, they could still easily make an Intel 3 CPU tile using only the HP libraries, so they could still ship products.

3.20/A and 18/A are supposed to be pretty different from Intel 3 either way (ribbon fet) and also have different node teams, a delay with one node doesn't necessarily mean a delay in another.

I really doubt skipping a node is possible. We heard much the same about 10nm, right? That it was going to be short lived and low volume while they quickly transition to then-7nm? Clearly didn't pan out.

And as you point out, 20A/18A are much more complicated compared to 4/3, so if they can't get the latter working, I have zero hope for the former.

Also IFS being dead is certainly a stretch, at the very least the US gov is probably still going to utilize it or prop it up, for the sake of national security.

If Intel has to significantly delay 18A, then who on Earth would trust them in the future? It's surprising they haven't reached that point already, tbh. The US government isn't enough to save Intel's foundries if they consistently fail to deliver.

 

[Exist50]

Keep in mind the Arrow Lake CPU chiplet is presumably much bigger than the Meteor Lake M die. I have doubts you will see anything other than the 2+8 Meteor die actually make it to market, but they could certainly try.

I think you might be surprised, both with MTL-P and with Arrow Lake. I think MTL will be high volume once they actually manage to ship it, and Arrow Lake probably won't balloon the die too much, especially with the node shrink. Though I am assuming the core count rumors hold.

They should, and maybe they will eventually.

IIRC, Sierra Forest was originally (long ago) planned to use TSMC, but what node and when/why they changed, I don't know.

 

[jpiniero]

I think you might be surprised, both with MTL-P and with Arrow Lake.

If Arrow is using TSMC then they shouldn't have any problems bringing it to market.

 

[Geddagod]

IIRC, Intel 4 is actually a bit worst than N5 there, or at the very least worse than N4.

You're right

Well yeah, but not even having them at all is an even stronger argument against Intel 4 than merely being behind. But even a theoretical HD library, using Intel's past as reference, would be very far from N3. Though N3 has its own issues that complicate the comparison.

Intel uses a higher proportion of HP cells to HD cells in their architectures, which is presumably why the lack of HD cells in Intel 4 still makes it fine to use for meteor lake cpu tile. That's also one reason why, despite both being on '7nm' class nodes, Intel core architectures tend to be much bigger than AMDs, according to Locuza. Meaning that even if Intel ended up using TSMC, they would still be utilizing their HP cells. That's also (one) of the reasons I called Intel 4 a "pseudo" node.
Wdym using Intel's past as a reference btw?

Honestly, it's usually best to throw out their marketing entirely, and that applies to Intel, TSMC, and Samsung.

Without that marketing we don't really have much data. There aren't exactly bunches of third party companies that custom orders wafers from all vendors using the same architecture and then compare clock speed. The marketing is based on actual numbers, yes they are the best case scenario, but they still all apply the same methods to get that data, which you already mentioned above. If that is good enough for other tech websites such as anandtech and wikichip to report on and use as a reference, I don't get why it isn't enough for us to use as a handy benchmark. Afterall, we are using them comparatively not with hard numbers to calculate exact percentages.

Sure, go ahead.

There are a plethora of reasons why Intel might end up using TSMC 3nm over Intel 3 for arrow lake. The biggest one, imo, being capacity. Their EUV situation should get better, no doubt, but there really is no reason why Intel should be using Intel 3 for arrow lake DESKTOP of all things when they are also using Intel 3 for both granite rapids and sierra forest.

 

[IntelUser2000]

I really doubt skipping a node is possible. We heard much the same about 10nm, right? That it was going to be short lived and low volume while they quickly transition to then-7nm? Clearly didn't pan out.

Yup, because in cutting edge you are learning from the previous generation to apply to the newer one. You cannot hope to run before you walk, and even before that learn to crawl.

If Intel has to significantly delay 18A, then who on Earth would trust them in the future? It's surprising they haven't reached that point already, tbh. The US government isn't enough to save Intel's foundries if they consistently fail to deliver.

Volume is the KEY. That's why the top tech is in commercial entities, not military. Otherwise the military would use their own fab and based on layman's imagination they'd have 1A process or something by now.

But that's kinda secondary to my point.

The yearly schedule isn't to make their partners merely feel good, it's there because that's the lifespan of laptops to make money and it's the bloodline of the business.

Sure, technically you can do it earlier, but if you spent all that time and money(which is both massive) then you choose one or the other. Big brands like Dell XPS laptops don't get a mid-cycle refresh, it's insane! It takes 3 months or so to build and optimize the thing and even that's still too quick and it has all sorts of issues software and firmware that take long time, or in lots of cases never get resolved. Like Haswell's "C10" feature not becoming a realistic one until Broadwell or Skylake generation.

 

[Geddagod]

While possible, derivative nodes are much lower risk. I think it's safe to say that if they get Intel 4 working, Intel 3 is high confidence. But even if something like the HD libraries are broken, they could still easily make an Intel 3 CPU tile using only the HP libraries, so they could still ship products.

I'm still not so sure to what extent Intel 3 is only a derivative node of Intel 4 - HPC wire
"Next on the new roadmap is Intel 3, set to debut in the second half of 2023. Intel 3 will deliver around an 18 percent transistor performance-per-watt increase over Intel 4, according to the company, thanks to improvements in power and area. It’s a higher level of improvement than a standard full node improvement, noted Kelleher, citing early modeling and test chip data. "

I really doubt skipping a node is possible. We heard much the same about 10nm, right? That it was going to be short lived and low volume while they quickly transition to then-7nm? Clearly didn't pan out.

I believe Pat Gelsinger said that Intel 4 (formerly 7nm) was majorly simplified by expanding the use of EUV by more than a 100%. I would also not be surprised if more resources got drawn out of Intel 4 development to aid Intel 10 when it delayed for way longer than expected. A similar occurrence might not happen to Intel 3 delays if it a smaller scale, timewise.

 

[Geddagod]

IIRC, Sierra Forest was originally (long ago) planned to use TSMC, but what node and when/why they changed, I don't know.

Just curious, where did you hear that rumor? I try following leaks pretty well (for fun) but never heard of that. Sierra Forest leaks are insanely rare I think.

 

[A///]

there's a lot of discussion in the last page about intel's transistor denisty and performance vs tsmc at more advanced nodes 2-3 years from now but intel needs to produce those parts in volume. If they can get it but not quite it'll be like their 10nm volume woes which were complicated by more than design issues. Their upcoming fabs won't be online anytime soon in the next 2 years and producing at volume. it'll be a slow ramp to volume production.

Note how AMD went the other way, sticking to a yearly cadence, at first with chips that weren't competitive in performance nor battery life. That steady cadence resulted in AMD's biggest mobile market share yet within 5 years/gens.

@DrMrLordX loves to moan about amd's slower cadence despite evening out with amd or getting ahead of them.

 

[Exist50]

If Arrow is using TSMC then they shouldn't have any problems bringing it to market.

That, I wouldn't be so sure of. Their biggest problems in client have been with design lately, and Lion Cove is supposed to be a big change. There was an old roadmap saying N3 Arrow Lake was supposed to come in 2023, but it looks like that was pushed back.

The yearly schedule isn't to make their partners merely feel good, it's there because that's the lifespan of laptops to make money and it's the bloodline of the business.

That's why I mention the affect of refresh gens like Raptor Lake. If it shares the same PCB, same cooling, most of the same firmware, etc, it's way less effort than an actual new gen. So some of the more ambitious OEMs may reuse their ADL designs for RPL and then still be able to pull off new designs with MTL. It would still be a bit of a logistics headache, but doable.

 

[Exist50]

I'm still not so sure to what extent Intel 3 is only a derivative node of Intel 4 - HPC wire
"Next on the new roadmap is Intel 3, set to debut in the second half of 2023. Intel 3 will deliver around an 18 percent transistor performance-per-watt increase over Intel 4 <snip>

Those numbers can probably be well explained by actually having HD libraries, but even if not, they got similar gains with 10+ (Ice Lake) -> 10++/10SF (Tiger Lake) seemingly without huge changes to the node.

I believe Pat Gelsinger said that Intel 4 (formerly 7nm) was majorly simplified by expanding the use of EUV by more than a 100%.

By the time Pat joined, they were already past the worst of 10nm, so I don't necessarily think that statement was related. But I do agree that there's some fundability at play between generations.

Just curious, where did you hear that rumor? I try following leaks pretty well (for fun) but never heard of that. Sierra Forest leaks are insanely rare I think.

I might be the primary (or technically secondary) source for it, but I heard that a long time ago, so I don't really have any more light to shed. I think it makes sense though. Would be easier for them to port Atom cores, and TSMC's historically been better at low voltage/power per core.