Intel Investor Meeting 2015: November 19

[witeken]

Intel Investor Meeting 2015

Following the 2014 IM edition. This Thursday will be Intel's annual investor meeting. There is little information of course, but expect updates on the information that was given last year, including on Intel's $800M mobile reduction effort which they succeeded in and their plans for next year; William Holt's and Brian Krzanich's update on 10nm; updates for datacenter; the 3D NAND that was announced in 2014 IM but still not available; financial information and a new Haiku from Stacy Smith; and a host of other things.

I don't know but I might make summaries again from each presentation like a year ago.

This is the program which you can find in the link above. I will update the thread with the PDFs and webcasts once they come available.

Intel Investor Meeting

11/19/15 -8:00 AM PT
Speaker: Brian Krzanich, Stacy Smith, CEO, CFO and various Executives
Intel invites you to attend our 2015 Investor Meeting via our live webcast. A webcast link will be made available on this page as the event date approaches.

Our executive keynotes will begin at 8:00am Pacific Time. Agenda is below.

8:00 am Agenda - Mark Henninger
8:10 am Opening Remarks - Andy Bryant
8:20 am Corporate Strategy - Brian Krzanich
9:00 am Advancing Moore's Law - Bill Holt
10:00 am Financials - Stacy Smith
10:40 am Q&A Session - Brian Krzanich, Stacy Smith and Bill Holt
11:00 am Data Center Group business update - Diane Bryant
11:25 am Client Computing Group business update - Kirk Skaugen
11:50 am Q&A session - Diane Bryant and Kirk Skaugen

Don't expect too much on 10nm, though. Probably more updates of their infamous comparison with TSMC and a rehearsal of 14nm. We'll see.

:thumbsup: Brian Krzanich keynote: http://forums.anandtech.com/showpost.php?p=37846683&postcount=18
:thumbsup: Bill Holt's keynote with comparison of BDW/SKL and A8/A9: http://forums.anandtech.com/showpost.php?p=37846740&postcount=19
:thumbsup: 2016 outlook: http://forums.anandtech.com/showpost.php?p=37846809&postcount=23
:thumbsup: Stacy Smith: http://forums.anandtech.com/showpost.php?p=37846969&postcount=29
:thumbsup: William Holt slides: http://intelstudios.edgesuite.net/im/2015/pdf/2015_InvestorMeeting_Bill_Holt_WEB2.pdf

 

[Arachnotronic]

Thanks for posting this, witeken. Looking forward to it & the following discussion. Bill Holt is going to have to explain himself

 

[witeken]

Thanks for posting this, witeken. Looking forward to it & the following discussion. Bill Holt is going to have to explain himself

Yeah, at the moment 10nm looks more like 3.5 years than 2.5, if I may exaggerate a bit. Moore's Law is very hard.

But here's something I found today:

At 7nm, TSMC may only have SiGe or at most Ge, if anything. ROFL. TSMC's 5nm might be a strange mix of Intel's 7nm and 10nm or something.

Intel is still gaining momentum with its transistor lead (see the SRAM comparison), and they will give another blow to the competition with III-V and Ge and maybe QWFFET, proving to be many, many years ahead of the industry. Intel's materials science lead is downright impressive. (If true.)

Source:

TSMC has made a working SRAM at 7nm, Sun reported. The node should deliver 40-45% less area and either 10-15% higher speeds or 25-30% lower power than the 10nm node, he said.

http://www.eetimes.com/document.asp?doc_id=1327725&page_number=2

Given TSMC's massive claims of >40% for BOTH 16nm and 10nm, 25-30% seems like very little. It seems like nothing more but squeezing the last bit out of FinFET and Si or SiGe before moving on to the real post-silicon stuff. Certainly given that III-V improves mobility.

 

[Arachnotronic]

Yeah, at the moment 10nm looks more like 3.5 years than 2.5, if I may exaggerate a bit. Moore's Law is very hard.

But here's something I found today:

At 7nm, TSMC may only have SiGe or at most Ge, if anything. ROFL. TSMC's 5nm might be a strange mix of Intel's 7nm and 10nm or something.

Intel is still gaining momentum with its transistor lead (see the SRAM comparison), and they will give another blow to the competition with III-V and Ge and maybe QWFFET, proving to be many, many years ahead of the industry. Intel's materials science lead is downright impressive. (If true.)

10nm should be a straightforward finFET device without any of the novel/exotic materials you mention. 7nm is where you should expect to see cool stuff happen.

 

[jpiniero]

I was thinking that Intel's 10 nm was going to be some sort of "True 3D" layered FinFet using only silicon. Yeah, it'd be hellish on heat density, but who needs 4+ Ghz anyway?

 

[ClockHound]

I was thinking that Intel's 10 nm was going to be some sort of "True 3D" layered FinFet using only silicon. Yeah, it'd be hellish on heat density, but who needs 4+ Ghz anyway?

I do.

 

[witeken]

10nm should be a straightforward finFET device without any of the novel/exotic materials you mention. 7nm is where you should expect to see cool stuff happen.

And your source is what?

http://apcmag.com/intel-looks-beyond-silicon-for-processors-past-2017.htm/

Here,

Speaking at San Francisco’s Web 2.0 Summit last week Intel CEO Paul Otellini said that silicon was in its last decade as the base material of the CPU.

Otellini forecast that Intel would produce “three more generations” of silicon processors before shifting to a new semiconductor material.

Given that Intel’s ‘tick-tock’ model sees a new microarchitecture every two years – and starting at the current 45nm ‘Nehalem’ silicon microachitecture which will be followed by 32nm (‘Sandy Bridge&#8217 in 2011 then 22nm (Haswell&#8217 in 2013 and 16nm (codename unknown) in 2015 – then Otellini’s talking about the first wave of non-silicon processors kicking off by 2017.

45nm + 3 generations = 14nm = last generation of silicon.

Not enough? How about Mark Bohr and William Holt's comments? How about ASML and Intel presentations? How about Brian Krzanich's comments? How about David Kanter's prediction? You think Intel's can't do a new innovation every second node? You see the beautiful regularity in this?

History and facts both point that the dot below 14nm will get something new next to it, while it's more likely 7nm will be an improvement of what comes next at 10nm.

“That still is 3 and a half years that we have built and experience and also shipping. I'm not going to tell you what the next innovations are, but our roadmap is full, because to continue to improve transistors, you have to make substantial improvements. And we plan to do that, while other people are working on perfecting their FinFET devices, and we're gonna be moving on to looking at what comes next.”

So the heck with FinFET. Intel's 10nm should be well worth the wait. This is what an >$10B R&D army can do for you.

"The mission is to really utilize Moore's Law. We have it. We believe we lead at it. We drive it. We define Moore's Law as a company.” --Brian Krzanich, CEO Intel, IM’14

“We will not take the foot off the [Moore's law] pedal here.” --Brian Krzanich, CEO Intel, IM’14

EDIT: While this is foundry roadmap:

 

[Arachnotronic]

And your source is what?

http://apcmag.com/intel-looks-beyond-silicon-for-processors-past-2017.htm/

Here,



45nm + 3 generations = 14nm = last generation of silicon.

Not enough? How about Mark Bohr and William Holt's comments? How about ASML and Intel presentations? How about Brian Krzanich's comments? How about David Kanter's prediction? You think Intel's can't do a new innovation every second node? You see the beautiful regularity in this?

History and facts both point that the dot below 14nm will get something new next to it, while it's more likely 7nm will be an improvement of what comes next at 10nm.



So the heck with FinFET. Intel's 10nm should be well worth the wait. This is what an >$10B R&D army can do for you.



EDIT: While this is foundry roadmap:

Hope so. I just remember Idontcare said on these forums that 10nm will be a finFET process, something that I confirmed via LinkedIn with multiple employees referring to it as "10nm finFET".

 

[witeken]

Hope so. I just remember Idontcare said on these forums that 10nm will be a finFET process, something that I confirmed via LinkedIn with multiple employees referring to it as "10nm finFET".

III-V and Ge don't contradict finFET. Even quantum well doesn't contradict FinFET, just like SOI 14nm doesn't contradict FinFET. Even BK said 10nm will be their 3rd gen FF.

Sure, maybe it is "just" finFET, but in the IEDM paper I think 14nm is described as 4th gen HKMG. Whatever floats your boat.

But it surely won't be "just" FF. First, if we note that other companies 10nm is similar to Intel 14nm, then 7nm will be similar to Intel 10nm. If we then take the IBM 7nm test chip: it has a SiGe channel. But Intel will probably do better than that.

 

[carop]

III-V and Ge don't contradict finFET.

Higher performance transistors built with III-V materials is one of the smaller pieces of the problem. Even though they would most probably require different materials, co-integration of nFET and pFET is also relatively easy compared to real challenge.

The real challenge is how to process these materials with different thermal budget requirements. On any CMOS chip you need a range of devices (transistors and passives) with different voltage requirement, and your I/O devices need a band-gap considerably higher than InGaAs. It just does not look as though there is enough time for Intel to put these materials in manufacturing at its N10.

Direct high mobility channel materials 50% SiGe to 100% Ge look more likely.

 

[witeken]

The link for the webcast: http://intelstudios.edgesuite.net/im/2015/

It starts over 22 hours.

 

[Thala]

. First, if we note that other companies 10nm is similar to Intel 14nm, then 7nm will be similar to Intel 10nm.

Why do you think other companies 10nm is similar to Intel 14nm?
I would assume that other companies 10nm is similar to Intel 10nm, aside from the fact that they don't have as dense grid pitch.
III-V materials will be introduced not before 7nm for both Intel and other companies - that's at least my prediction.

 

[dealcorn]

Why do you think other companies 10nm is similar to Intel 14nm?
I would assume that other companies 10nm is similar to Intel 10nm, aside from the fact that they don't have as dense grid pitch.

It is really hard to make a decent quality copy when you have no access to the original.

 

[witeken]

It is really hard to make a decent quality copy when you have no access to the original.

LOL!

 

[stingerman]

You think Intel's can't do a new innovation every second node? You see the beautiful regularity in this?

Intel was able to get to the 14NM node faster than anyone else because they made the decision that their doped Silicon material had longer legs and kept using it from their pre-finfet process. But, as you can see, while they got to 14NM faster, their transistor speeds did not match expectations nor the rate of acceleration as it did in the early part of the transition. Intel hit a transistor performance wall as they approached 14NM.

The other Fabs where stuck at larger nodes because they chose to first develop newer materials to achieve higher performance as they moved to smaller nodes. So they did the work earlier on, and are now enjoying the benefits. IBM's SiGe work is now being used by in Samsung's and GF's 14NM node. And, I think TSMC is also using SiGe. Intel is using the older doped Silicon.

So can Intel just switch to SiGe? Of course but the transition will take longer because they can't easily convert their Fabs. And, they have to go through the whole debugging iteration that they skipped 5 years ago.

 

[Arachnotronic]

The other Fabs where stuck at larger nodes because they chose to first develop newer materials to achieve higher performance as they moved to smaller nodes. So they did the work earlier on, and are now enjoying the benefits. IBM's SiGe work is now being used by in Samsung's and GF's 14NM node. And, I think TSMC is also using SiGe. Intel is using the older doped Silicon.

Proof?

 

[witeken]

Proof?

If IBM or some other foundry used SiGe channels, then they would be making loads of noise about it. But they aren't; they're making noise about it at the 7nm node (IBM 7nm test chip).

Instead it's the other way around:

First introduction of

1. strained silicon
Intel: 90nm
Others: 65nm

2. HKMG
Intel: 45nm
Others: 32/28nm

3. FinFET
Intel: 22m
Others: 14/16nm

4. Air gaps
Intel: 14nm
Rest: who knows

 

[witeken]

Chairman of the Board

* Tech company --> innnovation --> business return for shareholder value
* Investing more in profitable businesses
* Data center

CEO

*Feeling good about Moore's Law, 14nm; even though there's skepticism/criticism
"Skylake = best processor ever" -- if that's what 5% IPC gets you...

2015 results
* $55.2B, 62%, profit of $13.5B

Corporate strategy
* Moore's Law, integration and shared IP
* Moore's Law: alive, but now 2.5 years. It has moved up and down in last 25 years; 10nm not different. But goal is 2 years because it's most profitable. Faster = always better.

Foundation
* Client is stable, Intel no longer PC company (dependent on PC for revenue growth)
* Somewhere in 30M tablet units; tablet market overall down, but profitability improved by >$800M
* Phone: build partnership with Rockchip/Spreadtrum
* Everything except PC: 40% of revenue, ~65% of operating margin

Growth engines
* Data center, IoT, memory: all three feeding each other
* People oriented cloud --> Things oriented cloud (much more data things than people) / 2016 cloud will be bigger than enterprise
* Networking: <10% market share and growing very fast
* IoT: needs connectivity for cloud
* Memory: double digit enterprise / 3D NAND and 3D XPoint (working on for 10+ years), products next year, not replacement of NAND or DRAM but new class / investment in 3D NAND factory (up to $5.5B) with possibility for XPoint

Future investments (Altera, wireless)
* Altera: Feeds the memory/IoT/big data cycle; speeds up algorithms and/or lowers power; feeds on Moore's Law
* Wireless: 5G

Summary
* Points listed above
* Transforming Intel

Next up: Bill Holt on Moore's Law and 14nm!

 

[witeken]

Progress: 14nm update + cost per transistor
* Goals not achieved, yields behind
* Will match in middle '16? --> confidence
* Long-term optimistic
* 7nm: wafer cost again up quite a bit (because of lithography), transistor density trend below trend, just like 14 and 10nm => cost per transistor will be at or below line

Economics of Moore's Law
* Discussing theoretical model which shows why advancing technology is profitable in terms of money; without increasing node, 10 year costs would be ~260B instead of ~110B.
* 25% decrease in demand per year needed to offset economic benefit of ML
* R&D about 30% up per generation; needs 190% to offset ...
* Historically cost per transistor is 0.69x and somewhat better on 14nm and 10nm; need to be on 0.86x to offset
* Conclusion: None of these factors will cause problems

Competitiveness
* Chart from last year (year of production on x-axis; transistor x metal pitch on y-axis)
* Chart from 2013! Adjusted for both SS and TSMC
* Comparison of Apple products A8 and A9, both SS and TSMC!!!! LOL .
* A9 hardly denser than A8!
* BDW and SKL worse than A8 and A9! (Like 0.7x as dense) (Note: this is before normalization, so don't draw your conclusions yet )
=> composition of die: most is SRAM, then reg files, logic short cell, IO and tall cell logic
* Comparison of compositions (in terms of % of full die for each of the 4 products)
* Normalized (for die composition) comparison: BDW and SKL 1.4x better than SS A9
* Updated comparison of 2013 chart! SS slightly better than TSMC, but still worse than Intel by a lot, basically the slide doesn't change even with the real product numbers from Apple A8/A8 substituted
* Update on 10nm numbers with available information => lead will continue (competition's 10nm will be sligtly below Intel 14nm)

Forward looking options: Pipeline
* Lot of things in research
* x-axis: scaling; y-axis: function
* x: RRAM/ SSTM, nanowire, TFET, III-V, Ge
* y: quantum computing, 2D materials, high voltage (GaN),
* x + y: DSA, etc.
=> Future: robust

Summary: 14nm maturing, cost/transistor, economics = solid, view of competition unchanged, research pipeline = full

 

[dionasaur]

Thank you for the summaries!

 

[coercitiv]

witeken, thx for the summary. Greatly appreciated!

 

[Nothingness]

Thanks for the summary, very much appreciated :thumbsup:

* Comparison of Apple products A8 and A9, both SS and TSMC!!!! LOL .
* A9 hardly denser than A8!
* BDW and SKL worse than A8 and A9! (Like 0.7x as dense)
* => composition of die; most is SRAM, then reg files, logic short cell, IO and tall cell logic

Hmm does that mean that the density of A8 20nm TSMC is better than the one of Intel 14 nm? And that this is due to Apple chips having lots of SRAM?

* Normalized (for die composition) comparison: BDW and SKL 1.4x better than SS A9

So BDW and SKL have so much less SRAM than A9 that the density factor goes from 0.7 to 1.4?

Do you know if slides are available?

 

[witeken]

2016 outlook

* Revenue growth in mid-single digits (I guess because of data center 15% CAGR)
* Gross margin at +- 62%
* Spending (R&D + MG&A) as % of reveune down 0.5%
* Captital spending at $10B, +- 0.5B / Includes ~1.5B for memory)
* Dividend up 8%

Next up: CFO Stacy Smith.

 

[witeken]

Hmm does that mean that the density of A8 20nm TSMC is better than the one of Intel 14 nm? And that this is due to Apple chips having lots of SRAM?

Yeah, I can't really describe a whole slide, let alone in a few seconds.

But no. This 0.7x is the naive density comparison. The whole point of these foils from Holt is to show that you are not comparing apples to apples. You have to normalize the die composition.

If you do that, you'll see that Intel is 1.4x denser than 20nm BEOL. Just like theoretically predicted in 2013!

(Anyone remember the A8 and Core m comparison of 2B transistors vs 1.3B? It naively suggests Apple's 20nm is vastly denser, but in fact it's the 1.4x number as bad.)

So BDW and SKL have so much less SRAM than A9 that the density factor goes from 0.7 to 1.4?

Do you know if slides are available?

I dunno.

You should really look at the slides when they become available.

 

[NTMBK]

Thanks for the write up! I think describing themselves as not a PC company is a little premature when it makes up 60% of their revenue...