Revolution 11
Senior member
- Jun 2, 2011
- 952
- 79
- 91
" Core size can't be increased much more without hitting diminishing returns."
But luckily transistors are still shrinking so we can have more powerful execution units in each die shrink? Except all these components being integrated onto the die and separate dies in the package (NB, memory controller, GPU, VRM, SB) are slowing this growth.
Maybe you could help me understand something. Why can't they take all the execution units from a quad core die, and put them into 2 larger cores. Yes, you might have problems keeping all the execution units busy but then each core would be much more powerful.
Am I right that they have increased cores in order to keep execution units more fully utilitized when cpu usage is at 100%, along with hyperthreading to help?
The reason why they don't make dual cores that are as powerful as quad cores is because there is a lack of efficiency?
Because I wouldn't mind giving up a few cores for much better single threaded performance.
Besides what VirtualLarry pointed out, there is the matter of economics to point out. Currently, users who want a more budget CPU will get a dual-core chip. This saves them money but it also saves Intel money since the die area is smaller so the production cost is lower. I am sure Intel could make a gigantic dual core die but why would they spend all that R&D and production money. Users who want less performance get less cores, users who need more performance get more cores (and HT if you continue to move up). Unless you are offering like several hundred million dollars for such a die, no one will make it.
Transistor shrinks do allow more density per mm. But all the semiconductor companies use these shrinks to lower the production cost (increase number of chips per wafer) as a way to compensate for the ever-increasing R&D costs associated with die shrinks. We seem to be approaching a point where decreased die sizes may not be enough to pay for the next process node. Hence the decreased value from Intel CPUs: no solder, no TSX on overclocking chips, very expensive GT3e, stagnation of clocks/IPC/cores.