Discussion Intel current and future Lakes & Rapids thread

[A///]

Thanks for the tip. I've never blocked anyone on these forums but perhaps it's time to start.

Me neither, but I won't. it's like that one drunk uncle eight times removed at that once a decade family shindig whom you've never heard of or talked about but is plastered and talking about random events of their lives and then plays like a bull with his equally bizarre son. extended family is so overrated.

 

[SiliconFly]

Wtf is up with this blind faith to Intel? Especially a desire to return to a long gone era of stagnation. Are you an Intel shareholder or have friends/family who work for them?

Kindly avoid personal attacks.

 

[igor_kavinski]

Are you an Intel shareholder or have friends/family who work for them?

More like, he is getting something from dumpster diving outside the Intel HQ

 

[igor_kavinski]

intel blow up doll?

Silicon you can trust to blow your mind!

 

[coercitiv]

Kindly avoid personal attacks.

In your ryzen dreams lol

 

[Thunder 57]

You still don't realize that he's just trolling you, lol. I know him from other places; he's not an Intel fan at all, just a troll. That's his entertainment.

I've learned not to take the bait. Seems most others have as well. I thought trolls were supposed to be funny? If that is the case, he isn't doing a good job.

 

[A///]

Didn't think he was a troll. I figure some of you drop acid like it's the 80s again.

 

[Shmee]

Please everyone, stay on topic, and kindly avoid accusations and fighting. If you see something that doesn't belong, report it, and move along. If we cannot have a reasonable technical discussion about these Intel platforms, then the thread may be locked and/or infractions issued. Thanks, -AT Moderator Shmee

 

[S'renne]

Is there any leaks on the Crestmont E cores? Everyone seems to be focused entirely on the P cores, and didn't someone say that it's impressive and nothing more (I forgot their name). Also, even though the pushback against Gelsinger's probably unintentional wordings on saying he's trying to get Intel back on track is understandable, wouldn't it be a lot more reasonable to just want both Intel and AMD compete against each other instead of one sided dominance again?

 

[A///]

Is there any leaks on the Crestmont E cores? Everyone seems to be focused entirely on the P cores, and didn't someone say that it's impressive and nothing more (I forgot their name). Also, even though the pushback against Gelsinger's probably unintentional wordings on saying he's trying to get Intel back on track is understandable, wouldn't it be a lot more reasonable to just want both Intel and AMD compete against each other instead of one sided dominance again?

earlier rumours last year pointed at them being a major improvement but the last leaks I saw quietly stated they're nothing worth gushing over. although opinion does seem to sway depending on who you ask. so far I'm not terribly impressed with what's happening and based on the earlier es leak from a few weeks ago but it the processor release being more than a year away any discussion about the nature of the crestmont cores would be too nuanced for anything to matter discussing.

 

[SiliconFly]

Didn't think he was a troll. I figure some of you drop acid like it's the 80s again.

I don't think he's a troll either. Looks more like a fan.


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[SiliconFly]

In your ryzen dreams lol

Thats extremely funny lol


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[DrMrLordX]

I'm also eager to learn more about the 6C/12T Coffee Lake-S processors.

Oh dear, looks like someone's AI broke.

 

[A///]

either that or someone ate their kid's brownies.

 

[Henry swagger]

https://twitter.com/x/status/1694057347285688832

Intel teasing what arrow lake and clear water forrest are gonna look like😄😃.. arrow lake is 20a .. interesting clear water forrest has 6 tiles 300+ cores ?🤔🤔

 

[Shmee]

What do 20a and 18a mean? That isn't nm, but something different? Angstroms?

 

[Doug S]

What do 20a and 18a mean? That isn't nm, but something different? Angstroms?

Yes theoretically, but they are even more of a fantasy than the nanometer names for processes. The actual gate widths are more than an order of magnitude larger. Basically since transistors started going vertical once further horizontal shrinking became too difficult, the industry kept up the names as if they were still shrinking the gate width like before to reflect increased transistor density. As they approached 1nm they had to replace it with angstroms or picometers I guess.

They should just start iterating the process names like iPhone and Galaxy S model numbers for all the meaning they have now lol

 

[DrMrLordX]

Yes theoretically, but they are even more of a fantasy than the nanometer names for processes.

Also keep in mind that Intel moved 20a and 18a off High-NA EUV and made them standard EUV processes. Given the hyper-aggressive release schedule for both nodes, it certainly looks like 20a and 18a may not be big leaps in density or performance over Intel 3. Which might also partially explain the disappointing slide leaks for Arrow Lake-S.

 

[dullard]

Yes theoretically, but they are even more of a fantasy than the nanometer names for processes. The actual gate widths are more than an order of magnitude larger. Basically since transistors started going vertical once further horizontal shrinking became too difficult, the industry kept up the names as if they were still shrinking the gate width like before to reflect increased transistor density. As they approached 1nm they had to replace it with angstroms or picometers I guess.

They should just start iterating the process names like iPhone and Galaxy S model numbers for all the meaning they have now lol

While you are correct that nodes no longer have much relevance to nm sizes, Intel ditched using "nm" a while ago. It isn't "Intel 4 nm", it is "Intel 4". Their naming is far closer to model numbers than your post makes them out to be. To make myself too much of a geek, it isn't "Intel 18Å" which would be Angstroms. Instead it is "Intel 18A".

 

[FangBLade]

Can we expect MTL laptops by the end of the year?

 

[Saylick]

Can we expect MTL laptops by the end of the year?

I think you can, but likely at low quantities and you'll likely pay a premium.

 

[Dayman1225]

Can we expect MTL laptops by the end of the year?

Yes, but not a lot of models, expect a much more healthy amount to be available in H1’24

 

[Doug S]

Also keep in mind that Intel moved 20a and 18a off High-NA EUV and made them standard EUV processes. Given the hyper-aggressive release schedule for both nodes, it certainly looks like 20a and 18a may not be big leaps in density or performance over Intel 3. Which might also partially explain the disappointing slide leaks for Arrow Lake-S.

Well that would be like what TSMC has indicated we should expect density wise with at least the initial version of N2, and perhaps for the same reason. Maybe we need high NA to go beyond where the N3/Intel 3 generation takes us. Though I guess the big difference is that Intel will have BPR in their first cut of 20A while TSMC is holding off on that until N2P. Doesn't sound like that will make all that big of a difference though, but it was always more of a "you have to do this to continue down the density path" rather than a major advance in its own right I guess.

 

[A///]

Well that would be like what TSMC has indicated we should expect density wise with at least the initial version of N2, and perhaps for the same reason. Maybe we need high NA to go beyond where the N3/Intel 3 generation takes us. Though I guess the big difference is that Intel will have BPR in their first cut of 20A while TSMC is holding off on that until N2P. Doesn't sound like that will make all that big of a difference though, but it was always more of a "you have to do this to continue down the density path" rather than a major advance in its own right I guess.

For anyone who was wondering what this new acronym means, it's buried power rails. It goes hand in hand with BSPD or backside power delivery.

 

[Doug S]

For anyone who was wondering what this new acronym means, it's buried power rails. It goes hand in hand with BSPD or backside power delivery.

This made me recall something I saw (maybe at semiwiki?) last year claiming that Intel was only doing BSPD and not BPR with 20A AND 18A. I'm pretty sure I heard that TSMC was going for both with N2P but they obviously haven't announced anything officially about that so its all based on rumors. Given the nearly non existent shrink they have already claimed for N2, plus the rumors that would be addressed the following year, it would seem they'd have to be doing BPR with N2P.

If Intel has already successfully tested BSPD with Intel 3 the wafer handling concerns would appear to be addressed. Well, at least for one off tests, that doesn't necessarily imply it is feasible at production quantities yet but I have to believe the vendors of wafer handling equipment are or will be ready. BPR is the big piece as far as scaling as I understand it, as the width of power vias has become an effective limiter on further reductions in cell size.