Discussion Intel current and future Lakes & Rapids thread

[Andrei.]

No. ARM took a pass on power gating (to the extent that Intel pushes it) and just went big.LITTLE. Intel tries to have one core (or a small set of cores) in their low-power chips scale from boosted 3 GHz+ states chewing up higher-than-TDP power ratings to ultra-low clockspeeds with sub-4.5W power usage. And to their credit, it almost worked. But they have never been able to make Core suitable for tablets or phones, and it will never work. Atom didn't work out there either, nor will it ever. Which is why they punted on those markets, at least for awhile.

Lakefield may (eventually) change that.

Intel doesn't power gate functional blocks within the core and it's not possible to even do it in any reasonable way because of the latencies required.

If you're referring to core power gating, Arm cores also have considerable advantages to Intel's cores.

 

[DrMrLordX]

If you're referring to core power gating, Arm cores also have considerable advantages to Intel's cores.

If that were really true, big.LITTLE wouldn't even be a thing. But it is, and now Intel is doing it, too.

 

[Andrei.]

If that were really true, big.LITTLE wouldn't even be a thing. But it is, and now Intel is doing it, too.

.. you don't understand it. Even having perfect cycle perfect power gating doesn't achieve the benefits of shifting over to a smaller core. big.LITTLE not only solves the issue of high leakage at low performance requirements, but at the same time of solving this also allows the bigger cores to not care about it and to allow a higher frequency physical implementation (less dynamic power) just because they don't have to care about the power and the low-end of the dynamic range. Power gating here does absolutely nothing to the issue.

 

[jpiniero]

One issue is that Tremont appears to not support AVX, so Intel is going to have to do something about that if an thread requests an instruction that the Big Cores have that the Small don't.

 

[Dayman1225]

One issue is that Tremont appears to not support AVX, so Intel is going to have to do something about that if an thread requests an instruction that the Big Cores have that the Small don't.

Icelake has support for RDPID which does this:

Quickly reads processor ID to discover its feature set and apply optimizations/use specific code path if possible.

Goldmont+ and Tremont also supports this

I imagine this is to help them do big.little with cores that don't support the same extensions

 

[DrMrLordX]

.. you don't understand it. Even having perfect cycle perfect power gating doesn't achieve the benefits of shifting over to a smaller core. big.LITTLE not only solves the issue of high leakage at low performance requirements, but at the same time of solving this also allows the bigger cores to not care about it and to allow a higher frequency physical implementation (less dynamic power) just because they don't have to care about the power and the low-end of the dynamic range. Power gating here does absolutely nothing to the issue.

Thanks for making my point for me? As I said, Intel tried to avoid big.LITTLE and produced some impressive technology in the process. In the end, it just makes more sense (I guess) to go with big.LITTLE assuming the die real estate is there for a smaller core.

If you actually look at what Intel has achieved with their Core-y chips, you will see that they are extremely sophisticated in how they manage power. But even Intel has to admit that having a little Atom core onboard is easier than trying to use cTDP states exclusively.

 

[Dayman1225]

https://twitter.com/david_schor/status/1052536266418413568?s=19

Looks like heads at TMG are starting to roll, I've personally heard that Sohail Ahmed, SVP and GM of TMG is "retiring" in November

 

[Dayman1225]

Intel shakes up manufacturing group amid production delays

TMG is being split into 3 pieces:

Technology Development - Led by Mike Mayberry

Manufacturing and Operations - Led by Ann Kelleher

Supply Chain - Led by Randhir Thakur

All reporting to Murthy

Sohail is retiring.

Murthy also reiterates 10nm products on shelves by holiday 2019

 

[DrMrLordX]

Well that's nice of Murthy to say that, since technically 10nm products are on shelves right now.

Otherwise interesting that they're continuing with the bloodletting despite Krzanich's departure.

 

[IntelUser2000]

So Ashraf asked TechInsights for the die size of the XMM 7560 modem being used in new iPhones.

I thought it would be considerably small at ~30mm2. He's saying the XMM 7560 is at 57mm2! The XMM 7480 based on TSMC 28nm was 70mm2. So it must have added a lot of features.

So at 120 million units shipped, it'd increase Intel's 14nm wafer requirements by an amazing 20%. Their chipsets are somewhat bigger, so it might add another 25% for a total of 50%.

There's conflicting rumors on what the 7660 will be with S|A saying 10nm, and other sources saying 14nm. Honestly, Charlie has been wrong with his rumors recently, and I don't think they'll be able to ramp up majority of their product lines plus 7660 all on the first year of 10nm. So I'd lean on the 7660 being on 14nm. That means they'll need to ship 200 million 60-70mm2 14nm dies in 2019.

At least next year lot of their consumer chips should move to 10nm, relieving pressure on 14nm fabs.

Otherwise interesting that they're continuing with the bloodletting despite Krzanich's departure.

It makes sense that a crazy, incompetent CEO would also hire equally incompetent lower managers. Change is good at the state Intel is in.

 

[IntelUser2000]

If that were really true, big.LITTLE wouldn't even be a thing. But it is, and now Intel is doing it, too.

Intel actually had this in mind a long time ago.

They called it "Platform 2015". 2005 was 65nm, so if you assumed 2 year schedule for Moore's Law was maintained, 2015 should have been the time 10nm chips were available. It starts to make sense why Lakefield is 10nm. Of course, delays and difficulties changed this, but the overall picture should not have changed.

The Goldmont cores are extremely small. In the space of a single Skylake core, you can fit 4 Goldmont cores, its caches, and System Agent equivalent. If you look at cores only you can probably fit 6-7. Goldmont Plus is likely a lot bigger but you might still get 4 in one Skylake core. So no problem with size.

It's not just about dynamic power as Andrei puts it. It's about power efficient performance in an era where Moore's Law is faltering. On the Windows space, its a lot harder to achieve than on mobile OSes like Android and iOS because tiny little changes can mess up scheduling and make things worse. With mobile OSes, every platform is closed source(even though the OS itself may not be), since Smartphones and Tablets have their own proprietary extensions and optimizations. It makes things easier to deal with just as Consoles are easier to optimize because its a single platform that doesn't change for years.

 

[jpiniero]

So at 120 million units shipped, it'd increase Intel's 14nm wafer requirements by an amazing 20%. Their chipsets are somewhat bigger, so it might add another 25% for a total of 50%.

Pretty sure only the Xs and Xs Max are using the 7560.

 

[IntelUser2000]

Pretty sure only the Xs and Xs Max are using the 7560.

And the Xr. Intel took it completely. First year iPhone shipments reach 50-60%. It'll exceed 100 million easily.

 

[jpiniero]

And the Xr. Intel took it completely. First year iPhone shipments reach 50-60%. It'll exceed 100 million easily.

The Xr has something else, most likely the 7480.

 

[Arachnotronic]

The Xr has something else, most likely the 7480.

7480 doesn’t support CDMA, so, no.

 

[IntelUser2000]

The Xr has something else, most likely the 7480.

The 7480 doesn't support CDMA. The Xr does. If its running an Intel modem it'd likely have to be the 7560 generation. They could be supplying a cheaper version.

 

[DrMrLordX]

It makes sense that a crazy, incompetent CEO would also hire equally incompetent lower managers. Change is good at the state Intel is in.

I coulda been crazy and incompetent for half the price. Intel, sign me up! Heck I won't even hire any incompetent lower managers. Er, not deliberately.

And the Xr. Intel took it completely. First year iPhone shipments reach 50-60%. It'll exceed 100 million easily.

So how much does Intel get to charge Apple on a per-modem basis?

 

[IntelUser2000]

So how much does Intel get to charge Apple on a per-modem basis?

Probably $15-20. BOM estimations put it at $17.

 

[TheGiant]

why are we discussing about a modem? is it integrated to new desktop/mobile chips?

 

[french toast]

why are we discussing about a modem? is it integrated to new desktop/mobile chips?

Fab capacity.

 

[Dayman1225]

I thought it would be considerably small at ~30mm2. He's saying the XMM 7560 is at 57mm2! The XMM 7480 based on TSMC 28nm was 70mm2. So it must have added a lot of features.

Yeah, working CDMA finally, Dual SIM Dual Standby, 4x4 MiMO support (unsure if supported before), bunch of new bands and support for 1Gbps down and 150up

Also yeah I believe 7660 will be 14nm and then they'll begin ramping the 8060 in late 2019 on 10nm for smaller volume customers.

 

[IntelUser2000]

why are we discussing about a modem? is it integrated to new desktop/mobile chips?

It's also on package with Amberlake-Y model used in the new HP detachable.

 

[DrMrLordX]

Probably $15-20. BOM estimations put it at $17.

Okay, Intel is pulling down ~$17 per modem, and the modem eats 57mm2 from the wafer. So revenue of ~$.33 per mm2 of wafer area.

In contrast a 9900k is, according to the estimates in the AT review, a 177mm2 chip. I think Intel gets retail margins of ~60% on their desktop chips? So a $488 i9-9900k should generate $292.80, or $1.65/mm2 of wafer area.

I realize that Intel is trying to profit on volume in the short term with their modems and will (presumably) try to increase prices on their products in the future (or try to drive revenue upward with process shrinks). Assuming 100 million modems sold to Apple, Intel will pull in $1.7 billion (or more) just from modems alone. I doubt that Intel could sell the ~5.8 million 9900ks it would need to sell to make that kind of money on the desktop.

Nevertheless, it still means there are problems with

Fab capacity.

Intel has made some significant sacrifices to feed Apple. Gonna need that 10nm stat, or the core business will suffer. It's suffering right now.

they'll begin ramping the 8060 in late 2019 on 10nm for smaller volume customers.

I wonder, can Intel use the existing "bad" 10nm process for that product? Or will it need to share wafer space with chips like IceLake that will presumably be on 10nm+?

 

[beginner99]

Okay, Intel is pulling down ~$17 per modem, and the modem eats 57mm2 from the wafer. So revenue of ~$.33 per mm2 of wafer area.

In contrast a 9900k is, according to the estimates in the AT review, a 177mm2 chip. I think Intel gets retail margins of ~60% on their desktop chips? So a $488 i9-9900k should generate $292.80, or $1.65/mm2 of wafer area.

I realize that Intel is trying to profit on volume in the short term with their modems and will (presumably) try to increase prices on their products in the future (or try to drive revenue upward with process shrinks). Assuming 100 million modems sold to Apple, Intel will pull in $1.7 billion (or more) just from modems alone. I doubt that Intel could sell the ~5.8 million 9900ks it would need to sell to make that kind of money on the desktop.

Nevertheless, it still means there are problems with fab capacity

It would make sense if intel as planned would be on 10nm with their CPUs. Hence they could use the "old" fabs for low margin modems to further amortize their existence.

 

[DrMrLordX]

It would make sense if intel as planned would be on 10nm with their CPUs. Hence they could use the "old" fabs for low margin modems to further amortize their existence.

Exactly. Kind of makes me wonder whether 10nm/10nm+ CPUs are going to have to fight for wafer space in the same fashion.