Discussion Intel current and future Lakes & Rapids thread

[moinmoin]

What I'm struggling to reconcile here is the optimism I've heard from so many seasoned engineers vs the seemingly dismal reality I see as a 3rd party. Maybe people's opinions have changed over the past few months (not like I send out surveys, lol), or maybe my sample is biased (very likely), but something isn't quite sitting right with me. I guess it's ultimately on Gelsinger to prove that he's not just more of the same, but it'll take many years to see the end result.

If you are mostly in contact with people in R&D that seeming disconnect is actually pretty normal. Essentially you wouldn't want to work on something you are pessimistic about to begin with. Productization of R&D work is the crucial part though, the industry is full of cases where promising developments were either never brought to market or positioning (like missing the right time to launch, Intel is getting good at that...) was so mismatched that they were pretty much DOA.

 

[Geddagod]

If you are mostly in contact with people in R&D that seeming disconnect is actually pretty normal. Essentially you wouldn't want to work on something you are pessimistic about to begin with. Productization of R&D work is the crucial part though, the industry is full of cases where promising developments were either never brought to market or positioning (like missing the right time to launch, Intel is getting good at that...) was so mismatched that they were pretty much DOA.

I did wonder, Intel seemed to be hiring a lot of 'top talent' back to the company, but I'm assuming those always filled out the roles of the high end management positions, or the people who plan and design on a high level- not the further development of the designs and getting them into actual products. They essentially hurt their 'execution' by slashing jobs away from engineers who 'productize' the designs.
I wonder if this is part of the problem where Intel always has these great designs on paper, but always struggle to implement it into actual products. Partly because they are too ambitious, but also because Intel is kneecapping themselves by hiring back many great designers, but also firing bunches of regular engineers.
Final disclaimer, this is just my speculation of course haha

 

[eek2121]

I don't think that's the case. That hasn't been how things work at my employer and I doubt they're breaking US labor laws.

Employment related historical case law and EEOC related stuff suggest otherwise, but what do I know?

On Topic: MTL-S appeared in Linux 6.5 patch notes and Videocardz got excited. Probably a typo, but if not, I can see Intel releasing some rebadged “P” parts as Ultra variants of next gen. Possibly OEM only.

 

[DrMrLordX]

On Topic: MTL-S appeared in Linux 6.5 patch notes and Videocardz got excited. Probably a typo, but if not, I can see Intel releasing some rebadged “P” parts as Ultra variants of next gen. Possibly OEM only.

Could be that they'll just rebadge some 6+8 parts as -S for NUCs and similar.

 

[Hitman928]

Also this is a bit unrelated to this thread, but this chart (power breakdown of Intel Haswell) in Chips and Cheese did intrigue me
View attachment 82391
Is Core Static essentially the core 'leakage' while Cache dynamic, Micro-op Execution, Instruction Decoders, etc etc is all the core dynamic power loss (where parts of the CPU are actually being used)?
And has the Core static ratio increased with newer cores as they use newer nodes, and newer nodes have more leakage power? (I'm assuming better power gating can only do so much).
View attachment 82392

The top chart actually comes from a paper that C&C cited in their article. If you read the paper, what they list as, "static," power is the power that stays constant between their benchmark runs based upon their formulaic power model. They say that it should roughly represent the actual static power of the CPU. I'm not sure what kind of margin they mean by, rough, but I would say it is definitely overestimating the static power as the clock is still running the whole time and I don't know how much of the Haswell design is clock/power gated.

With that said, the static power on bulk, planar (most everything down to 20 nm except for a few SOI processes) CMOS processes was getting increasingly unmanageable as the gate feature sizes continued to decrease. One of the main benefits of FinFETs was that it got this static power back under control. The most advanced planar processes from GF (22 nm and at some point 12 nm) use FD-SOI which also greatly helps in reducing static power at small feature sizes.

 

[Exist50]

If you are mostly in contact with people in R&D that seeming disconnect is actually pretty normal. Essentially you wouldn't want to work on something you are pessimistic about to begin with. Productization of R&D work is the crucial part though, the industry is full of cases where promising developments were either never brought to market or positioning (like missing the right time to launch, Intel is getting good at that...) was so mismatched that they were pretty much DOA.

While all of the people I've spoken to are in R&D, I don't think that's quite it. Plenty of people spend time in their career working on something they aren't super passionate about. Some days, a job is just a job. That said, most people do get attached to their work. I know a couple former Optane folk who're quite sad about that cancelation.

I think is this case, it's just a combination of old folk who've been through this kind of situation before, and selection bias. The ones still at Intel would naturally have a very different impression than those laid off.

 

[H433x0n]

What I'm struggling to reconcile here is the optimism I've heard from so many seasoned engineers vs the seemingly dismal reality I see as a 3rd party. Maybe people's opinions have changed over the past few months (not like I send out surveys, lol), or maybe my sample is biased (very likely), but something isn't quite sitting right with me. I guess it's ultimately on Gelsinger to prove that he's not just more of the same, but it'll take many years to see the end result.

I know 2 people working at Intel with one of them working directly on a server project. They don’t feed me sensitive information nor do I ask but the feedback I’ve gotten is that Gelsinger is well respected and a lot of the execution problems will start to fade as the projects that began in 2020 and earlier finally cross the finish line.

The one thing that’s been unanimous is that the fabs are no longer a roadblock.

 

[Exist50]

I know 2 people working at Intel with one of them working directly on a server project. They don’t feed me sensitive information nor do I ask but the feedback I’ve gotten is that Gelsinger is well respected and a lot of the execution problems will start to fade as the projects that began in 2020 and earlier finally cross the finish line.

The one thing that’s been unanimous is that the fabs are no longer a roadblock.

We shall see. The scenario I fear the most is a repeat of Alder Lake. A decent single generation, but lacking followthrough. As for the fabs, they need to deliver a node on time. The design teams being delayed so long they happen to match the fabs' delays is not a success story.

 

[coercitiv]

[Later Edit] Just realized this was posted already yesterday. Guess I have some reading to catch up to

Another delay for SPR. Intel is downplaying it, but even if we believe them 100% the fact still remains that shipments were halted.

Bug Forces Intel to Halt Some Xeon Sapphire Rapids Shipments

Sapphire Rapids hits another roadblock, the resumption date is unknown.

www.tomshardware.com

I hope the Forest products are better managed.

 

[uzzi38]

[Later Edit] Just realized this was posted already yesterday. Guess I have some reading to catch up to

Another delay for SPR. Intel is downplaying it, but even if we believe them 100% the fact still remains that shipments were halted.

Bug Forces Intel to Halt Some Xeon Sapphire Rapids Shipments

Sapphire Rapids hits another roadblock, the resumption date is unknown.

www.tomshardware.com

I hope the Forest products are better managed.

Actually in this case the issue does seem relatively minor. I mean, it impacts a core feature, but as they say in the article it should be correctable with firmware so it's not the end of the world.

 

[coercitiv]

they say in the article it should be correctable with firmware so it's not the end of the world.

Yes, read that part, that's why I said the issue is not the severity of the bug, but the additional delay.

 

[LightningZ71]

While all of the people I've spoken to are in R&D, I don't think that's quite it. Plenty of people spend time in their career working on something they aren't super passionate about. Some days, a job is just a job. That said, most people do get attached to their work. I know a couple former Optane folk who're quite sad about that cancelation.

Optane had such promise, but, it was employed (in my opinion) in a very bone-headed way. If they could have managed to reduce the package size a bit, a few modules could have functioned as a replacement for the SLC cache on a traditional SSD. Optane excells at write endurance and small ops volume. Having Optane front for a traditional NAND package set would have seen regular SSDs with massive write endurance and stupid high iOPS numbers, but with the bulk storage ability of a regular SSD. They were very close to this with their last hybrid products, but they left it up to the OS to manage and cut the lanes in half to do so. Designing a bespoke on card controller that could keep up with the overhead and throughput would have been the missing link.

 

[Exist50]

Optane had such promise, but, it was employed (in my opinion) in a very bone-headed way. If they could have managed to reduce the package size a bit, a few modules could have functioned as a replacement for the SLC cache on a traditional SSD. Optane excells at write endurance and small ops volume. Having Optane front for a traditional NAND package set would have seen regular SSDs with massive write endurance and stupid high iOPS numbers, but with the bulk storage ability of a regular SSD. They were very close to this with their last hybrid products, but they left it up to the OS to manage and cut the lanes in half to do so. Designing a bespoke on card controller that could keep up with the overhead and throughput would have been the missing link.

That was a nice incidental market, but the holy grail for new memory technology today is to find something cheaper than DRAM, but fast enough to displace it. If you look at the actual cost of the hardware that goes into a modern server, it's dominated by DRAM, not the CPU. There is immense financial pressure to find some way to get comparable capacity and performance without just throwing more DIMMs at the problem.

https://www.src.org/about/decadal-plan/decadal-plan-full-report.pdf

This is the market Intel hoped to slot Optane into, but they could never get the cost and volume to where they needed it to be. CXL memory expansion might have helped that a lot, but I guess they just didn't want to double down.

P.S. I do suggest giving that full article a skim. Lots of interesting stuff in there.

 

[Geddagod]

Saw this on hardware times, and like what??? (2025)

 

[Kepler_L2]

View attachment 82498 Saw this on hardware times, and like what??? (2025)

That doesn't look like a legit roadmap.

 

[Geddagod]

That doesn't look like a legit roadmap.

Hardware Times is a totally legit and reputable source. How dare you.

 

[Geddagod]

Slightly of topic, but posted this over at reddit too. Any thoughts/ missing info?
I already know I forgot to add lakefield and also MTL taping out 2H 2022.

 

[aigomorla]

Cinebench - R23 Multi Core with BenchMate overclocking records @ HWBOT

Overclocking records

hwbot.org

Top 3 places are now Intel.
They have displaced dual Genoa even.
Im starting to see a different picture on Saphire Rapids, if you can keep the beast in check.

https://twitter.com/x/status/1628467798858145792

Absolute Beast....

 

[igor_kavinski]

Absolute Beast....

Except they stay mum on the power consumption. Must be 1.2 kW.

 

[itsmydamnation]

Cinebench - R23 Multi Core with BenchMate overclocking records @ HWBOT

Overclocking records

hwbot.org

Top 3 places are now Intel.
They have displaced dual Genoa even.
Im starting to see a different picture on Saphire Rapids, if you can keep the beast in check.

https://twitter.com/x/status/1628467798858145792

Absolute Beast....

that pretty copium , like what happens when AMD get around/care to releasing a Zen4 TR, 96 cores @ 5.4ghz+.

 

[Saylick]

View attachment 82498 Saw this on hardware times, and like what??? (2025)

HWT is like Walmart/Dollar Store WCCFTech...

 

[H433x0n]

Cinebench - R23 Multi Core with BenchMate overclocking records @ HWBOT

Overclocking records

hwbot.org

Top 3 places are now Intel.
They have displaced dual Genoa even.
Im starting to see a different picture on Saphire Rapids, if you can keep the beast in check.

https://twitter.com/x/status/1628467798858145792

Absolute Beast....

Source


I’ve got a theory that the Sapphire Rapids is well below initial design goals.

There’s the w7-2495x, that will compete against the 24 core 5965WX pretty well (even accounting for perf/watt). It trades blows with it in every metric.

There’s something funky going on with the non monolithic Xeons the higher you go up the stack. A 28 core non monolithic Xeon uses disproportionately more power.

 

[Hulk]

Cinebench - R23 Multi Core with BenchMate overclocking records @ HWBOT

Overclocking records

hwbot.org

Top 3 places are now Intel.
They have displaced dual Genoa even.
Im starting to see a different picture on Saphire Rapids, if you can keep the beast in check.

https://twitter.com/x/status/1628467798858145792

Absolute Beast....

Those 56 cores at 5.2GHz are performing like 56 GC's in Raptor at 4.5GHz.

 

[aigomorla]

that pretty copium , like what happens when AMD get around/care to releasing a Zen4 TR, 96 cores @ 5.4ghz+.

Its traded blows with a 96core AMD Epyc 9474F.
It displaced it with a little over half the cores.

I don't think AMD TR will even be able to clock that high with that many cores.
It gets exponentially more difficult to get higher clocks when you have that many cores.

Those 56 cores at 5.2GHz are performing like 56 GC's in Raptor at 4.5GHz.

Raptor doesn't even have 56 cores, so your pulling theoretical as we don't even know if Raptor can do 4.5ghz @ 56 cores. Which i highly doubt, as there is just no way you can get that much power to the socket even if there was one.

The 3495 was recorded to pull 1kw.
Which is absolutely insane.

And if you scale SPR down, i don't think you can do a core to core comparison even.

But i would really like to see what a 13900K can do vs a 3435X.
Here is some scores for a overclocked 3435x

SkatterBencher #61: Intel Xeon w5-3435X Overclocked to 5200 MHz - SkatterBencher

We overclock the Intel Xeon w5-3435X up to 5200 MHz with the ASUS Pro WS W790E-Sage SE motherboard and EK-Pro water cooling.

skatterbencher.com

Its really annoying how there is very little coverage on this cpu from more reputable sources.
Its like they are afraid to show it.

Except they stay mum on the power consumption. Must be 1.2 kW.

1KW! lol... it was stated somewhere else.
Your going to need a 240V 30amp socket if you have a 4090 along with it, and did some massive benching.

 

[Geddagod]

Source


I’ve got a theory that the Sapphire Rapids is well below initial design goals.

There’s the w7-2495x, that will compete against the 24 core 5965WX pretty well (even accounting for perf/watt). It trades blows with it in every metric.

There’s something funky going on with the non monolithic Xeons the higher you go up the stack. A 28 core non monolithic Xeon uses disproportionately more power.

I think that's just MCM power tax, and maybe mesh scaling
I think GLC is underperforming Intel's expectations tbh. In SPR, GLC to SNC was a smaller IPC uplift (15%) is smaller than SNC vs SKL. Plus, while I don't have GLC vs ICL frequency comparisons iso power, GLC is way more power hungry for a similar amount of frequency compared to Zen 3. Which is fine ig when your IPC can compensate, but I think at lower frequencies, the power gap is larger than the IPC uplift GLC has.

Also if anyone has any info on this it would be much appreciated, but I would guess Zen 3's frequency sweet spot is lower than GLC's.