Discussion Intel current and future Lakes & Rapids thread

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Exist50

Platinum Member
Aug 18, 2016
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I'll argue this point, because that was only the assumption for pretty much everyone on the internet who doesn't understand silicon production timelines. Volume production was always slated for the second half of 2022, in other words, too late for Apple to use it for that year's iPhones.
The first article you quote was about the completion of a new factory, while the second is from well into 2020. And Q3 volume production might still be enough to squeak out a Mac chip for late in the year. TSMC has been very consistent about their public communications, which is commendable, but that doesn't mean their partners don't have their own expectations.
 

Exist50

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Aug 18, 2016
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Wonder if this has anything to do with hubris of the manufacturing team, being on leadership position for over a decade. Now they will have to compete on merit as their own product team might want to use external manufacturing.
Supposedly they actually commissioned a study comparing Intel vs TSMC/Samsung processes. They queried both an external consultant as well as their internal design teams, and both agreed that it took a staggering amount more effort to design on Intel processes, with the internal team even rating them worse than the consulting company. Supposedly this is something they actually improved on a great deal with 4/3 and especially 20A/18A, but I guess the proof will be from IFS customers.
 

pakotlar

Senior member
Aug 22, 2003
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He might have confused "Manufacturing Ready" H2 2022

View attachment 64286

But it has become apparent that it will not be Ready for Manufacturing until 2023


Edit.

Also a good article on Alder Lake’s Caching and Power Efficiency,


Interesting how Gracemont Core's L2 is on the opposite side of the L3(I noticed that long ago but never made a comment on it)

View attachment 64288

Had it become clear it the production stepping won’t be ready by December?
 
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pakotlar

Senior member
Aug 22, 2003
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So far he has called like 3 or 4 different members, liars, including me for pointing out the obvious, Intel being late on promises. I will just wait until he gives up, or too many members point out his flaws for him to keep being in denial.

Probably won't happen.

You’re an angry guy. You respond to Intel announcements and actual timelines with denials, MLID rumors, and personal attacks. You post ridiculous performance/watt comparisons (Alder lake perf/watt 1/4 Zen 3). Childish stuff.
 
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nicalandia

Diamond Member
Jan 10, 2019
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Had it become clear it the production stepping won’t be ready by December?
If the rumors are true(Intel CEO flying to Taiwan to ask TSMC for leniency because TSMC is scheduled to be full production on SOC tiles while Intel struggles with the Compute tile on Intel4). Then yeah..
 

Exist50

Platinum Member
Aug 18, 2016
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If the rumors are true(Intel CEO flying to Taiwan to ask TSMC for leniency because TSMC is scheduled to be full production on SOC tiles while Intel struggles with the Compute tile on Intel4). Then yeah..
That's not the rumor though. The rumor is that Intel faces financial penalties for missing their production window with TSMC, and is trying to negotiate a way out.
 

jpiniero

Lifer
Oct 1, 2010
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That's not the rumor though. The rumor is that Intel faces financial penalties for missing their production window with TSMC, and is trying to negotiate a way out.

Negotiating a way out means cancelling Meteor Lake entirely. I don't know Intel wants to do that, although obviously with no CPU tile they don't have a product to sell.
 

nicalandia

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That's not the rumor though. The rumor is that Intel faces financial penalties for missing their production window with TSMC, and is trying to negotiate a way out.
Isn't that some form of "Leniency"? Trying to negotiate a way out without.
 

Exist50

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Aug 18, 2016
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Isn't that some form of "Leniency"? Trying to negotiate a way out without.
Sure, but it's leniency regarding Intel missing their commitment to TSMC, not them needing TSMC because of Intel 4 troubles. That simply wasn't a part of the rumor. Taking it all at face value, of course.
 

IntelUser2000

Elite Member
Oct 14, 2003
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Supposedly they actually commissioned a study comparing Intel vs TSMC/Samsung processes. They queried both an external consultant as well as their internal design teams, and both agreed that it took a staggering amount more effort to design on Intel processes, with the internal team even rating them worse than the consulting company. Supposedly this is something they actually improved on a great deal with 4/3 and especially 20A/18A, but I guess the proof will be from IFS customers.

Yea so because the problems were deeper, even if Intel came with 10nm in 2016 and 7 nm in 2018-2019, Apple and others still wouldn't have used their processes and it would have delayed the inevitable - needing sweeping management changes and falling behind competition.

Mass production is the name of the game so if it's harder to design when we're already at very diminishing returns and harder at the process level as well saying your transistors are better is one step forward, one step back.

But it has become apparent that it will not be Ready for Manufacturing until 2023

Intel 4 might be manufacturing ready in 2022 but that doesn't mean that's when the product is ready. Also even with stellar execution it still takes a quarter or so to ramp, and get it to customers.
 
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Doug S

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Feb 8, 2020
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I don't think Apple would have ever used Intel foundry even if 10nm went as exactly as they planned. It wasn't that their process characteristics was bad that they had no foundry customers, it was that their process and the way it worked wasn't conducive to external manufacturing at all. If you want to be successful in any area, you make sure to appease the particular customer base. Up until the IDM 2.0 announcement, their fab efforts still only revolved around their needs.


Intel would not have been able to supply the volume of wafers Apple required even if things had gone well and Apple ran into no roadblocks dealing with Intel's design tools (since back then you had to use theirs) They had shortage on and off at 14nm for a couple years before 10nm was originally supposed to arrive simply from making modems for Apple.

Imagine if Intel had made a similar deal basically guaranteeing Apple all the wafers they needed for their SoCs. Since Intel could sell wafers of x86 chips for more money than they could sell Axx wafers to Apple, they'd have lost billions on that deal. The only way a deal like that pays off for them is if they have excess capacity (whether due to poor forecasting or because they built more capacity expecting to get foundry customers) If it displaces any x86 wafers, Intel loses.

They could have never taken on a customer Apple's size. Even with their new nodes, they are unlikely have enough EUV scanners to handle all their own needs (hence TSMC making some of their CPUs) let alone Apple's. They would need several years working with smaller customers before they were ready to tackle a really big customer, and would have to have the capacity guaranteed to be in place.
 
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jpiniero

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Even with their new nodes, they are unlikely have enough EUV scanners to handle all their own needs

Allegedly that's because they either cancelled or didn't pursue EUV orders, presumably because they were hesitating as to whether to continue with 7 nm, knowing that if that flopped they'd be out tens of billions of dollars. Then they got the bright idea to try to get the Government to pay for it.
 

Doug S

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Feb 8, 2020
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Allegedly that's because they either cancelled or didn't pursue EUV orders, presumably because they were hesitating as to whether to continue with 7 nm, knowing that if that flopped they'd be out tens of billions of dollars. Then they got the bright idea to try to get the Government to pay for it.

My theory at the time Intel's TSMC orders were announced (and soon after a rumor sourced from Digitimes or similar was making the rounds so I'm thinking I was right) was that to get the large TSMC order they had to offer some of their pending ASML orders to TSMC (both because it was necessary to expand their capacity and as partial payment of something worth more to TSMC than the equivalent amount of money)

That type of arrangement would be a win/win for both at the time, though comes at a cost down the road in terms of Intel's capacity on EUV nodes.
 
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uzzi38

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Oct 16, 2019
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Yes, it does. Their roadmap has been consistent, and as we get closer to release, they reiterate those timeframes, suggesting either they are confident in them or are deceiving shareholders. It is not the latter. The evidence to the contrary is MLID, a far less reliable source.
I haven't seen it myself, but I know someone that works at Lenovo and according to what they say from their perspective it has been anything but consistent. So please don't make up nonsense.
 

IntelUser2000

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Oct 14, 2003
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Intel would not have been able to supply the volume of wafers Apple required even if things had gone well and Apple ran into no roadblocks dealing with Intel's design tools (since back then you had to use theirs) They had shortage on and off at 14nm for a couple years before 10nm was originally supposed to arrive simply from making modems for Apple.

What you are saying is "difficult" compared to "no chance" which is what I am implying. If we look at things that's going on at Intel right now, it would have made little difference in the long run even if 10nm and after that went swimmingly. Actually in the long term they might have worsened the scenario because the success of 10/7 would have further bolstered their erroneous resolve.

10nm fiasco wasn't the reason for Intel's failure rather the result of problems that have been brewing for some time. An Intel led by management with stellar execution and vision wouldn't have needed to worry about these things in the first place. Shrink offered by relentless execution of Moore's Law leads naturally into not just better performance but ever smaller devices as well.

Their chips should have been a natural fit for Smartphones and Tablets, waiting for the right manufacturer to use it. Medfield was the first chip that showed such a promise - too bad it took them so long. If it came out just 2 years earlier they'd have been a leading contender fiercely competing with Qualcomm.

Instead, they were mucking with MID efforts which while commendable was hampered by the very fact that 3-chip solution made idle power of the Atom platform no better than Core. They made so little progress in that regard that it created people who were absolutely adamant it was entirely due to the ISA.

You can see their "revolutions" such as Pentium M and Core were all reactive, not pro-active the former which is indicative of a follower and latter of a leader.

Such problems are caused by bureaucratic levels and top-level decisions that look little beyond short term revenue gain.

Unfortunately such alternate reality might be a fantasy of my own since history shows that nearly all, if not all large organizations(government being the ultimate example) fall into such traps.
 
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Jul 27, 2020
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So 7% ST improvement of which roughly 5.7% is due to clockspeed increase and 37% MT improvement of which around 33% is due to extra GM cores. Almost no architectural IPC increase. Just an ADL with increased cache and more GM cores.
 

pakotlar

Senior member
Aug 22, 2003
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Raptor lake Geekbench drop:


Result isn’t valid, but it appears the clockspeed rumors may have been correct.

Stock 5950x for comparison: https://browser.geekbench.com/v5/cpu/compare/15949494?baseline=15909424

With PBO results are ~16,500-17,000 for multi, same 1700 for single core. IIRC my air cooled 5950x with PBO tuned, and -20 to -30 curve optimizer, on air (NH-D15) gets around 1700/17,000.

If this were representative of the average benchmark result it would be enough to beat 7950x, though I’m guessing things will be much closer than this on MT, with PPW advantage for 7950x of course. Still, a nice improvement for Intel.
 
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nicalandia

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So 7% ST improvement of which roughly 5.7% is due to clockspeed increase and 37% MT improvement of which around 33% is due to extra GM cores. Almost no architectural IPC increase. Just an ADL with increased cache and more GM cores.

How does that compare to this?

1657549099066.png