Discussion Intel current and future Lakes & Rapids thread

[Zucker2k]

This is problematic not just from a consumer perspective, but an ecosystem one as well. Now you can't just assume that SPR will support those ISA features, further fracturing the codebase.

This is the kind of stuff that sales folk drool over, but creates real headaches for the customers in the short term and the business in the long. And Intel is in no position to be so callous.

I think this is simple really, If you want SPR with HBM2e you buy it right away, yeah? You have no unlocks in your future. It's no different from buying a top tier server cpu from Intel today. Only thing is, if you can only afford a cpu with limited features, Intel gives you the ability to unlock more features in the future. This is smart segmentation, instead of fusing things off forever; a loss to Intel, and a hassle for the consumer to change a perfectly working chip. Only problem I see here is if intel charges more than the difference between a feature-limited chip, and a full-fledged one, or the next tier, whatever.

 

[Thunder 57]

I think this is simple really, If you want SPR with HBM2e you buy it right away, yeah? You have no unlocks in your future. It's no different from buying a top tier server cpu from Intel today. Only thing is, if you can only afford a cpu with limited features, Intel gives you the ability to unlock more features in the future. This is smart segmentation, instead of fusing things off forever; a loss to Intel, and a hassle for the consumer to change a perfectly working chip. Only problem I see here is if intel charges more than the difference between a feature-limited chip, and a full-fledged one, or the next tier, whatever.

I sort of like the idea but I don't like the rabbit hole we are going down, where heated seats or enabling the full use of the battery in your EV costs more or worse, becomes a subscription. The last time Intel did this with the $50 upgrade cards they cost more than buying the upgraded CPU.

 

[IntelUser2000]

Personally I think none of these power scaling results are anything to write home about. 11800H and 12700H manage the best power scaling in the group, achieving ~1.5 times the performance with 2.7 times the power.

Well... yea!

That's the nature of things. If you want it efficient you can clock it to 800MHz and use single digit W.

His point was that earlier indications that ADL-H was mediocre compared to AMD and the predecessor chip is wrong clearly shown by the HWUnboxed review.

Not performing as expected? Boosting to 3.3 Ghz the CB R23 ST numbers match for Golden Cove IPC. These will not boost to 5 Ghz and neither Epyc cpus. MT CB R23 numbers match with Golden Cove IPC performance plus the known scalability of CB R23

I agree with the other poster. It falls far below expectations. The previous leaks actually showed Sapphire Rapids clocking quite a bit higher than Icelake. In fact Icelake-SP had low clocks just like it's smaller brother Icelake mobile.

The 48 core should end up roughly 30-40% faster than the top 8380 Xeon.

Also about the Upgrade Service: One word = Bad

 

[moinmoin]

His point was that earlier indications that ADL-H was mediocre compared to AMD and the predecessor chip is wrong clearly shown by the HWUnboxed review.

It's not even really clear if the 12700H curve is actually an improvement over the 11800H one. I was waiting for the written version, but it doesn't mention the actual numbers used. Just says "The Alder Lake Core i7-12700H shows much the same power scaling behavior as the Core i7-11800H" which going by the graph is actually a problem, since with the significant higher start of 12700H at 35W with the scaling being the same it should rise significantly higher relative to 11800H. Instead the delta seems to be similar in the rise of both, meaning 11800H starting from a lower base actually shows better scaling there!

 

[IntelUser2000]

It's not even really clear if the 12700H curve is actually an improvement over the 11800H one. I was waiting for the written version, but it doesn't mention the actual numbers used. Just says "The Alder Lake Core i7-12700H shows much the same power scaling behavior as the Core i7-11800H" which going by the graph is actually a problem, since with the significant higher start of 12700H at 35W with the scaling being the same it should rise significantly higher relative to 11800H. Instead the delta seems to be similar in the rise of both, meaning 11800H starting from a lower base actually shows better scaling there!

The 12700H is better in every power level shown. At 35W it's nearly twice as fast. At 55W it's similar. At 95W it's 40% faster.

My original point was that others were saying that Cezanne will be lot better at perf/watt or that Tigerlake-H will be only 20% behind. These numbers clearly show it's much better than anything else.

You are right about the difference becoming smaller on the higher end. It's also true if you look at Ryzen for example.

Generally, the steepness of the curve is a sacrifice. Most of the time, the process curve is made so it benefits low power, increasingly so. By doing that they sacrifice being able to scale efficiently at higher frequencies. Like the Ryzen example.

With Tigerlake and Alderlake you can see Intel optimized it to benefit the higher frequencies better, at a sacrifice of lower end efficiency. In certain aspects Alderlake being closer to Ryzen is not a bad thing, because the even lower power chips like P and U will potentially show even bigger gaps. And I bet you the curve will be steeper on the P and U.

You can see from this page: https://www.anandtech.com/show/1596...0-st-performance-over-zen-2-for-only-33-power

The graph clearly indicates newer processes have a steeper curve that favors lower power more and more and higher frequency/higher power less and less.

 

[eek2121]

Wanted to know how eek2121 is privy to the knowledge of AVX-512 and AMX being impacted by this feature.

Yeah I doubt it. More because I think OEMs would be upset. Need to think more obscure. Remember that Intel has historically put super secret instructions for specific customers in the Big Xeons. I don't know how they are locked out today but this could be a replacement for that if it means getting rid of customer specific fused chips.

That being said, being Intel you shouldn't rule anything out completely.

Others provided a few sources. There have been some tweets from reliable folks on twitter. AVX-512 and AMX were mentioned by 2 different folks. Whether it actually happens is another story. Intel has pulled stunts like this before.

 

[uzzi38]

HUB have got the best ADL-H results I've seen so far.

View attachment 56954

The power scaling results are also significantly better than those we've seen so far. These are definitely much more positive results for ADL-H overall. I'm surprised by the level of difference, but knowing it's there is neat.

More results, this time from Jarrod. Interestingly, his 12900H in the same chassis is worse than HUB's 12700H for pretty much the entire curve. Man ADL-P binning is totally whack lmao.

 

[coercitiv]

More results, this time from Jarrod. Interestingly, his 12900H in the same chassis is worse than HUB's 12700H for pretty much the entire curve. Man ADL-P binning is totally whack lmao.

Something is seriously weird with many of these results from ADL-P. Here's some CB23 scores I collected a while ago with my 12700K running PL1=PL2=95W and various number of cores disabled via UEFI:

• 6+4 17050 (spot on equal to 12900HK with a 6+8 config)
• 7+2 17250
• 7+4 18700
• 8+4 19300
• 8+0 16700

The 7+4 result is sort of an anomaly, if I ever have the time and mood I'll get back to that and double-check + write down average clocks and Vcore.

 

[IntelUser2000]

Something is seriously weird with many of these results from ADL-P.

What's weird? That it scores same with 4 less E cores?

It's understandable, even though I don't know why they would do that with the H. Lower leakage but sacrifices in the high end of the clock frequency. It was observed with previous generations when comparing U chips to the H. The H was noticeably better at reaching higher clocks.

Maybe they are indeed using the same for P and H, and maybe even the U?

@uzzi38 Inconsistency often points to immaturity. Not saying it might be the case but it could explain it.

 

[coercitiv]

What's weird? That it scores same with 4 less E cores?

It's understandable, even though I don't know why they would do that with the H. Lower leakage but sacrifices in the high end of the clock frequency.

Here's another test with PL1=PL2=25W in 6+4 configuration. The HWInfo screenshot is taken while the benchmark is running, so it's only showing clocks/power/voltage while under load. The previous score on the left was obtained without HWInfo running.

Spoiler: 6P4E @ 25W

So desktop chip running 6+4 config gets ~8500 score, laptop config running 6+8 gets ~7300. Now we're talking about clocks around 2Ghz for both core types, and the "leaky" desktop chip is scoring a clear win where I was merely hoping for a draw. It's getting worse instead of better.

 

[jpiniero]

How much do you think the on die PCH draws on the H parts?

 

[coercitiv]

How much do you think the on die PCH draws on the H parts?

For safety you can take into account 5W for the PCH, that still puts the 25W 6+4 desktop experiment very too close to the 30W 6+8 laptop config.

 

[mikk]

Something is seriously weird with many of these results from ADL-P. Here's some CB23 scores I collected a while ago with my 12700K running PL1=PL2=95W and various number of cores disabled via UEFI:

• 6+4 17050 (spot on equal to 12900HK with a 6+8 config)
• 7+2 17250
• 7+4 18700
• 8+4 19300
• 8+0 16700

The 7+4 result is sort of an anomaly, if I ever have the time and mood I'll get back to that and double-check + write down average clocks and Vcore.

Maybe your temperatures are much lower? This could have a big effect on the power consumption.

 

[nicalandia]

Okay, Hunting down Locuza Die annotations on Golden Cove Client and Golden Cove Server, which adds an additional AMX Unit(Advanced Matrix Extension) and an Extra 512b FMA on Port 5 on Sapphire Rapids.

I put this together with known die shots and Locuza's die annotations(made possible by the help of YuuKi_AnS who took the shots of the die) no L3$ Cache included

 

[IntelUser2000]

Maybe your temperatures are much lower? This could have a big effect on the power consumption.

Ok, that's a good point. @coercitiv chip is running at under 45C, when laptops typically run at 70C+.

Idontcare did a very good test with his Ivy Bridge chip back in the day.

@uzzi38 Temperature differences could also account for the differences in the two review systems. This isn't just about normalizing systems, but normalizing the environment as well, such as temperature and humidity, since we're trying to see how Alderlake behaves.

Since reviewers haven't done such tests on previous generations, we don't know how the effect is with them compared to Alderlake.

i7-3770K vs. i7-2600K: Temperature, Voltage, GHz and Power-Consumption Analysis

It has been just a little over a year now since I posted my deep-dive analysis of the dependence of power-consumption with temperature, clockspeed, and cpu voltage for my 32nm i7-2600K cpu (sandy bridge) and I felt like it would be a nice evolution to perform a similar analysis of my 22nm...

forums.anandtech.com

By varying the temperature from 35C to 115C the power consumption of an otherwise identical chip goes from:
~37W to 53W
~103W to 143W

You can see in one example the static power consumption going from 8W to 35W just by temperature increase.

How much do you think the on die PCH draws on the H parts?

The mobile 500 series chipset only had a 2.9W TDP.

 

[nicalandia]

Guys we are getting some numbers from Sapphire Rapids with and without HBM memory.

Intel Claims Sapphire Rapids-SP Supercharged HBM Xeon CPUs Over 2x Faster Than AMD EPYC Milan & Milan-X Chips

Intel has revealed new benchmarks of its upcoming data center products including the HBM-Supercharged Sapphire Rapids-SP Xeon CPUs.

wccftech.com

But those numbers don't add up according to Microsoft test on the same Benchmark OpenFOAM Motorbike 28M cells

 

[mikk]

https://twitter.com/x/status/1494432860383715331

No Arrow Lake in H2 2023. Because of that I can't rule out a desktop version of Meteor Lake. Actually they have to release a desktop version, otherwise they have no chance.

https://twitter.com/x/status/1494448784440496137

20A for Arrow Lake?

 

[IntelUser2000]

So this is how Intel is delivering "5 nodes in 4 years".

Intel 7: Alderlake
Intel 4: Meteorlake and Custom networking ASIC in 2023
Intel 3: Granite Rapids and Sierra Forest in 2024
Intel 20A: Arrowlake in 2024, Diamonds Rapids in 2025
Intel 18A: Lunar Lake, Future server and Foundry Customer

Intel 3 and 18A are half nodes, or plusses. The server skips Intel 4 because PC will use them. PCs skip Intel 3, and is pretty much a server node.

My guesses for timelines:
-They can meet the H1 schedule for Meteorlake by releasing a category that does not exist and is not bound to schedules. Such as the 5W model in say April. Another possibility is that 9W and maybe 15W isn't coming to Raptorlake, thus opening Meteorlake versions in H1. The rest will likely be late 2023/early 2024.
-Server is pretty much middle of the year
-Arrowlake may be able to combine all the releases(desktop, notebook, ultra low power such as tablets) because Intel 3 is essentially skipped. So late 2024/early 2025 for Intel 20A Arrowlake parts.
-Looks like the 20A is the short lived node. Interesting to see how they will speed that portion up to get 18A faster.

 

[IntelUser2000]

Pat Gelsinger about Granite Rapids: "10-12%" with the new cores. So they must be porting forward the newer cores in as well.

Anyone care to take a guess about the 4th chiplet for MTL?

Now we know.

-Compute
-I/O
-SoC
-GPU

 

[Exist50]

Pat Gelsinger about Granite Rapids: "10-12%" with the new cores. So they must be porting forward the newer cores in as well.

Yeah, it seems more like they canceled Granite Rapids and renamed its successor. They're going to be in a pretty terrible position until it comes out.

Now we know.

-Compute
-I/O
-SoC
-GPU

Yes

Yes. 40-ish mm2 one is 2+8 compute. Big central one is SoC. Small one next to compute is also SoC/IO. Narrow one on the end is GPU.

 

[IntelUser2000]

@Exist50 Ahh, I tried to find that quote but couldn't.

If it's only 10-12% gain over the Redwood Cove core that was to be in the original Granite Rapids, it sounds like a half step before the massive step called Lion Cove that would be in the Lunar Lake chips. Redwood Cove is supposed to be a big step as well, so can't complain about 10% on top of that in the same chip.

It doesn't sound like a full Diamond Rapids pull in. Still it's good news.

Emerald Rapids is akin to Rocketlake in competitive position to how bad it is.

Some are concerned about Lunar Lake in 2025 but with Arrowlake being on 20A I am not worried at all. Lunar Lake will likely be using 18A.

 

[Exist50]

@Exist50 Ahh, I tried to find that quote but couldn't.

If it's only 10-12% gain over the Redwood Cove core that was to be in the original Granite Rapids, it sounds like a half step before the massive step called Lion Cove that would be in the Lunar Lake chips.

It doesn't sound like a full Diamond Rapids pull in. Still it's good news.

Emerald Rapids is akin to Rocketlake in competitive position how bad it is.

Sounds to me like Lion Cove simply isn't meeting expectations. That, or they had to cut some performance to meet an earlier schedule. And of course, always some overhead with schedule and process changes.

 

[IntelUser2000]

Sounds to me like Lion Cove simply isn't meeting expectations. That, or they had to cut some performance to meet an earlier schedule. And of course, always some overhead with schedule and process changes.

Not necessarily. Reminds me of the MLID video that quoted the source saying some were aiming for even more spectacular gains but Pat reminded them to focus on execution and consistent delivery. Since zero delivery = zero performance. Even 1% is better than that. Delivery is especially critical in server because of how behind they are.

Also, Intel 3: 18%, Intel 20AWTFBBQ: 15%, Intel 18A: 10%

Continues on the modern process trends of much more work, and smaller gains.

 

[Exist50]

Not necessarily. Reminds me of the MLID video that quoted the source saying some were aiming for even more spectacular gains but Pat reminded them to focus on execution and consistent delivery. Since zero delivery = zero performance. Even 1% is better than that. Delivery is especially critical in server because of how behind they are.

Also, Intel 3: 18%, Intel 20AWTFBBQ: 15%, Intel 18A: 10%

Continues on the modern process trends of much more work, and smaller gains.

Can't say I'm convinced of these "spectacular gains", especially concerning RWC. Seems like on the Core side they're making improvements, but not meaningfully changing their position vs AMD or Apple.

 

[DrMrLordX]

Guys we are getting some numbers from Sapphire Rapids with and without HBM memory.

As usual, all vendor-provided benchmarks should be taken with a grain of salt. Especially from unreleased hardware.

But those numbers don't add up according to Microsoft test on the same Benchmark OpenFOAM Motorbike 28M cells

Pretty sure 3rd Gen Xeon Scalable is IceLake-SP. That MS benchmark features either Skylake-SP or Cascade Lake-SP.

No Arrow Lake in H2 2023. Because of that I can't rule out a desktop version of Meteor Lake. Actually they have to release a desktop version, otherwise they have no chance.

Intel won't have enough volume on Intel 4 to serve the mobile and desktop market. Canning Granite Rapids in 2023 and moving it to 2024 will open up some wafer supply, but still. The old rumour was Arrow Lake on TSMC N3. We may see Meteor Lake on TSMC N3 instead.