Makaveli
Diamond Member
I think he was referring to GDDR5 which you are correct is not DDR5.
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Discussion Intel current and future Lakes & Rapids thread
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I think he was referring to GDDR5 which you are correct is not DDR5.
Hulk
Diamond Member
Using the Cinebench 20 data below I isolated Golden Cove and Gracemont MT and "Single Core" scores. Used simultaneous equations with 12700K and 12900K data. Then used other data to calculate the numbers below. Take with a grain of salt of course.
UPDATE - I calculated IPC increase incorrectly. New chart is correct.
www.forbes.com
UPDATE - I calculated IPC increase incorrectly. New chart is correct.
New Benchmark Leak Reveals Impressive Performance Of Intel's 12900K, 12700K And 12600K Alder Lake Processors
Faster than AMD's Ryzen 9 5950X and Core i5 could be a mid-range killer
www.forbes.com
| Cinebench 20 | Theoretical | ||||||
| Single Thread | Single Core | Single Core | |||||
| Score | Score | Score | |||||
| Core | Cinebench 20 ST | At MT speed | MT Score | At MT speed | SMT Increase | MT Speed | at 5GHz |
| Golden Cove | 817 | 771 | 11600 | 918 | 19.1% | 5000 | 918 |
| Rocket Lake | 649 | 612 | 5963 | 745 | 21.7% | 5000 | 745 |
| Gracemont | - | - | - | 532 | N/A | 3700 | 718 |
| Skylake | 532 | 492 | 6355 | 636 | 29.2% | 4900 | 648 |
| Haswell | 361 | - | 1769 | 442 | 22.5% | 3900 | 567 |
| IPC Calcs | based on | single | core | score | during | MT | bench |
| Golden Cove over Cypress | 23.2% | ||||||
| Cypress Cove over Skylake | 14.9% | ||||||
| Gracemont over Skylake | 10.8% | ||||||
| Cypress Cove over Gracemont | 3.7% | ||||||
| Golden Cove over Skylake | 41.6% | ||||||
| Golden Cove over Haswell | 62.0% | ||||||
| Skylake over Haswell | 14.4% |
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11900 in ST has 5.3GHz and the same clock speed reaches 12900 so if both systems reached 5.3GHz then GoldenCove has IPC higher by 26% in CB 20.
on the other hand, 20-25% higher IPCs are nothing extraordinary considering the fact that Golden can decode 6 x86 instructions versus 4 in CypressCove. Additionally, two new, more extensive FADD units.
on the other hand, 20-25% higher IPCs are nothing extraordinary considering the fact that Golden can decode 6 x86 instructions versus 4 in CypressCove. Additionally, two new, more extensive FADD units.
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Hulk
Diamond Member
Very true. My calcs are based on single core throughput on MT test, not single thread test. But more importantly I calculated IPC increase incorrectly! My chart post is updated. Now ADL shows 23.2% better than Cypress Cove. Much closer to the ST value you posted. Cypress could have more unused resources going to SMT during the MT test?
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BorisTheBlade82
Senior member
Definitely. The architecture is wider which also increases the potential for SMT.
As a sidenote: This is why I wonder why Apple did not apply SMT to the M1.
As a sidenote: This is why I wonder why Apple did not apply SMT to the M1.
If you can get enough throughput in relation to the core's execution resources without it, then it's no benefit. Looking at the perf/clock Apple are able to achieve, I'd say that's probably the case.
BorisTheBlade82
Senior member
That is indeed very probable. I also suspect that the answer can be found in this document. Sadly I only progressed until page 50 by now.
Probably better to keep it simple when starting out. They can always add it later if they think it's worth doing.
While I doubt Apple will pursue SMT, just because the M1 doesn't have it enabled doesn't necessarily mean it isn't in there. That's not easy to get right given all the security issues that have been found with it over the past few years, so even if they wanted to do it they might need an iteration or two before they would announce/enable it.
BorisTheBlade82
Senior member
The "lack of knowledge" was a reason I omitted. Those people over there at Apple know about CPU design - and in a big way.
The M1 is far wider than basically everything else out there. The ROB size basically is a good indication because a large ROB without vast resources and queues wouldn't make any sense. So far I'll be sticking with "let's keep that for later on".
165W came from CPUz which is wrong says Raichu. ES1 PL1 was at 125W, confirmed by several sources. And furthermore all the more credible 12900K benchmarks came from QS samples and not from the old and lower clocked ES, it isn't representative because of the lower clock speeds. And what trick? They could easily just increase the PL2 Tau timer to boost the performance. But what is the goal for tricking ES samples when all the review samples are not based on this? Doesn't make any sense to me, this is another conspiracy theory.
Granted that there s no AVX512 but for sure something was done in CB R23 in respect of CB R20.
R23 came shortly after R20 while using the same scene, usually there is several years between each revision, R 11.5 was in 2008, R15 in 2013 and R20 in 2017.
You can compare the single scores of R20 and R23 here :
Intel Core i9-11900K & i5-11600K „Rocket Lake-S“ im Test: Benchmarks in Anwendungen
Core i9-11900K und i5-11600K im Test: Benchmarks in Anwendungen / Multi-Core-Szenarien / Single-Core-Szenarien
Seems that R20 wasnt "optimised" enough for Intel s taste, hence a "revison" that came at speedlight..
Asterox
Golden Member
Granted that there s no AVX512 but for sure something was done in CB R23 in respect of CB R20.
R23 came shortly after R20 while using the same scene, usually there is several years between each revision, R 11.5 was in 2008, R15 in 2013 and R20 in 2017.
You can compare the single scores of R20 and R23 here :
Intel Core i9-11900K & i5-11600K „Rocket Lake-S“ im Test: Benchmarks in Anwendungen
Core i9-11900K und i5-11600K im Test: Benchmarks in Anwendungen / Multi-Core-Szenarien / Single-Core-Szenarienwww.computerbase.de
Seems that R20 wasnt "optimised" enough for Intel s taste, hence a "revison" that came at speedlight..
Today Intel claims that Cinebench is useless, or it is not useful real world bench.
If we now, that Cinebench dont care about system memory performanse+dont care about big L3 Cache.Hm, what has changed from R20 to R23.
Pricing....
Kinda high, but you gotta price it against the competition. When AMD brought down an HEDT chip into the desktop space and priced it for $800 some here thought it was the coolest thing. Now Intel, by virtue of matching it is charging same. It's a race to $1,000 from here on out, though, to be fair the 5950x already exceeded that sometime in the near past.
Kinda high, but you gotta price it against the competition. When AMD brought down an HEDT chip into the desktop space and priced it for $800 some here thought it was the coolest thing. Now Intel, by virtue of matching it is charging same. It's a race to $1,000 from here on out, though, to be fair the 5950x already exceeded that sometime in the near past.
Quit posting 10 year old videos to back up your conspiracy theories. I got more recent videos of AMD partnering with Maxon to deliver better performance to their customers. Care to see them?Today Intel claims that Cinebench is useless, or it is not useful real world bench.
If we now, that Cinebench dont care about system memory performanse+dont care about big L3 Cache.Hm, what has changed from R20 to R23.
TESKATLIPOKA
Platinum Member
Yes. In Europe prices include VAT.
Schmide
Diamond Member
Newegg marketplace!!! Comparing retail vs scalper is taxing to the argument.
IntelUser2000
Elite Member
Cinebench never cared about AVX. Maybe including the original AVX benefits it by few single digit % but that's about it. That's why it's a relatively good benchmark showing off architecture changes. Sure you can optimize it but doesn't change it in a huge way.
Oh boy. Back to $1000 CPUs. So it's pretty much Euro price that includes VAT = US price. Can't believe 12700K is $550 that isn't even top of the line when we used to have $350 CPUs.
Oh boy. Back to $1000 CPUs. So it's pretty much Euro price that includes VAT = US price. Can't believe 12700K is $550 that isn't even top of the line when we used to have $350 CPUs.
Today Intel claims that Cinebench is useless, or it is not useful real world bench.
It is possible to be simultaneously true that "Intel says Cinebench is useless" and "Intel tries to improve their scores on Cinebench", if Intel believes that despite saying it is useless they believe plenty of people are going to refer to it anyway.
F5, F5, F5.
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