It could be related to Ponte Vecchio and Aurora, which Intel is having the hardest time to complete.
It could be related to Ponte Vecchio and Aurora, which Intel is having the hardest time to complete.
No it's not. It's way too late. Said it earlier, it needs to start by April at the absolute latest.
I think Adore got the AMD Bergamo speculation right and was first to get it. Other sources have aligned with him.
It seems that he is talking about a later client product that would be a higher end notebook with good graphics performance without using dGPU chips.
There is just so much contradictory information out there, hard to make any conclusions...
No that's simply wrong. If TSMC is delivering 20k or more wafers per month starting in July, that's in time. Why do you think it is way too late? Foxconn's production lines for the new iPhone typically ramp in August, it isn't like it takes months from start to finish to assemble an iPhone.
JasonLD
Senior member
- Aug 22, 2017
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No, because it will probably take 3-4 months from ramp-up to finished SoC ready to be manufactured. If they don't start it by April, they won't have the SoC ready by August.
They aren't delivering in July. They are starting. Intel and Apple wouldn't be getting the chips until October.
2022 iPhones and Macs May Feature 3nm Chips
The 2022 iPhones and Macs may feature chips built on the 3nm process, as Apple's leading chip supplier, TSMC, is planning to begin mass...
www.macrumors.com
"TSMC is on track to move its 3nm process technology to volume production in the second half of 2022 for Apple's devices, either iPhones or Mac computers, according to industry sources."
DrMrLordX
Lifer
- Apr 27, 2000
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Oh I know. ODM channels should see Sapphire Rapids in January 2022. If that rumour is true, something on N3 (Granite Rapids?) could be available for ODM channels in limited quantity (10kwpm, after all; this is in addition to Intel 7nm/Intel 4 assuming it's ready) before 2022 is out. That would be a very complicated product stack for Intel's DCG.
Sort of puts to rest the idea that Intel is pushing others off N3.
This gets back to the imprecision of language when talking about "mass production". Do they mean July is when the first mass production wafers hit the line, or is it when the first mass production customer shipments begin?
They are running 30k wpm for risk production, which is far more than is necessary for running test shuttles to address yield issues etc. before entering what they consider mass production. Why run so many if you're going to scrap them all? If Intel will be taking deliveries beginning in May, they are taking delivery of risk production wafers - but their needs are only 1/3 of the risk production run.
Mass production isn't about volume - not they are already producing 30k wpm for months before mass production. It is about yield, which starts out low and reaches whatever target they've set for wafers deemed "mass production". i.e. that's the point where they contractually commit "defect rates will be below x" to their customers.
If they already know what month "mass production" will be deemed to start, and already plan to ship Intel finished product in May, they obviously feel extremely confident of their model for the yield curve from now until next July when they see it exceeding their mass production target yield. Presumably their models were proven pretty accurate for N5, N7 etc. if they feel they can nail it down to a single month nearly a year in advance.
With "mass production" just a line in the sand based on yield, there are arguments that it could mean "this is when the first wafers enter the line that will have production worthy yields when they exit the line" or it could mean "this is when the first wafers exit the line that will have production worthy yields".
Even if you take the former view, and the first wafers with "mass production" qualifying yields enter the line in July and won't ship until October, TSMC will be running a massive amount of risk production wafers for months before that with decent but not "mass production" qualifying yields. More than enough that if Apple also began taking deliveries in May like Intel, they would have more than enough A16s for their typical September launch, even after accounting for lesser yield.
You are right about the mass production line being more about guaranteed yield/performance and it's not just like a switch they flick on and off. But, just a note, the wpm numbers are capacity, not necessarily production. I doubt they are actually producing 30k wpm during risk production (maybe in the latter half if they have customers wanting it). Even if they had no customers they will run a certain amount of wafers as completely shutting down and starting back up is actually very costly from what I understand, but you don't have to be running full capacity either.
Intel Alder Lake P/M mobile power limits detailed in Coreboot patch - VideoCardz.com
Top ADL-P is about 20 watts lower than the TGL-H processor. PL1 remains the same, PL4 however is increased up to 215 watts. What do you all think about this?
Top ADL-P is about 20 watts lower than the TGL-H processor. PL1 remains the same, PL4 however is increased up to 215 watts. What do you all think about this?
PL4 never was a relevant metric when it comes to power consumption because it's only a 10ms spike. OEMs have to make sure the power supply is strong enough for these higher spikes if they are using Intels default. PL1, PL2, PL4 is up to the OEM in the end, every device is different. The Chromeboock there has lower PL2+PL4 values than Intels default. These PL default numbers are not that meaningful.
dullard
Elite Member
- May 21, 2001
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Exactly. What actually matters for users is total energy used (power * time to get the job done), not peak power.
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I think this whole PL4 drama is well overblown and probably has no connection to actual chip power consumption levels. Intel could be simply tightening requirements for power delivery in transient load regime. ADL could be waking up from idle and going to full throttle much faster and that creates nasty power spike? 10ms is for MB caps and VRM stages to handle and will show up on BOM for lower end mobos more than actual PSU demands?
One thing is clear those - for sure plenty people so worried about PL4 are already rocking rocking Z590 motherboards like Unify, Heroes whatevers that can sustain PL2 of 350W+ and transient above 500w already. Does not make any Lake more or less efficient.
One thing is clear those - for sure plenty people so worried about PL4 are already rocking rocking Z590 motherboards like Unify, Heroes whatevers that can sustain PL2 of 350W+ and transient above 500w already. Does not make any Lake more or less efficient.
dullard
Elite Member
- May 21, 2001
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I'm confused, the highest PL2 in that leak was 115 W. Even if you were talking about PL4 spike power, the highest still was not 225 W. A $1.60 capacitor can supply a 225 W power for 10 milliseconds at typical CPU voltages. https://www.mouser.com/ProductDetail/Cornell-Dubilier-CDE/DSF255Q6R0JBE?qs=TiOZkKH1s2THpEdzti9BAw==
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Hulk
Diamond Member
- Oct 9, 1999
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Yes, the Big Golden Cove cores might require the juice to get up and go from a dead stop.
DrMrLordX
Lifer
- Apr 27, 2000
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Basically it s right that a relatively little capacitor can provide this power for 10ms but that s not as simple overall, and is not a capacitor issue only.
They are talking of the peak power available from the capacitors that are just after the main voltage rectifier, generaly those have a value of 220-330uF in off the shelves PSUs.
FTR US main voltage (110-120V) require capacitances 4 time bigger than with european voltage (230V).
A quick calculation show that 225W/10ms (2.25 Joule) require about 100uF with US voltage and 25uF at european voltage, but that s at full discharge of the capacitor, wich is not possible, so in practice 3-4x more capacitance is necessary, hence the values i pointed above.
Real problem appear after those capacitors, in the DC/DC converter wich will have to pass those 225W through the hashing Mosfets, then through the high frequency transformer and high current rectifiers for the 12V line,.
In low cost or low power PSUs (450W and less) those parts are to be somewhat overhauled to accomodate those peaks.
Harry_Wild
Senior member
- Dec 14, 2012
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Looks like all the major high end box PC manufacturers are waiting patiently for Alder Lake aka 12th gen CPU to be release. Might be my holiday gift for myself, a Lenovo ThinkStation P350 Tower? Supposedly the Alder Lake desktop CPU is to be release in October in line with Windows 11 roll out!
Intel Core i7-12700K Alder Lake-S Desktop CPU Sample Spotted, 12 Cores & 20 Threads With 25 MB Cache
wccftech.com
Still there's no QS but ES spotted.
Intel Core i7-12700K Alder Lake-S Desktop CPU Sample Spotted, 12 Cores & 20 Threads With 25 MB Cache
An entry of Intel's Alder Lake-S based Core i7-12700K CPU has presumably been discovered within the SiSoftware Sandra database.
wccftech.com
Still there's no QS but ES spotted.
Interesting power requirements for Raptor Lake-S. Credits: igor's LAB
Dealing with a nasty head cold. Can someone kind enough please give me the cliff notes of the last 1-2 weeks of Intel Alderlake info? Are we still A GO for a October launch?
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