Discussion Intel current and future Lakes & Rapids thread

[dmens]

I really shouldn't feed the trolls any further, but Intel showed the VF curve.

Intel details the Willow Cove architecture in Tiger Lake: SuperFin transistors and better VF curves along with an official introduction to Alder Lake

On the occasion of Architecture Day, Intel delved into the underpinnings of the Willow Cove architecture that is set to debut with the Tiger Lake CPUs next month. Willow Cove will use Intel's new SuperFin process technology and will offer a much higher dynamic range in the voltage-frequency...

www.notebookcheck.net

It's actually more significant at lower voltages.

And where do you think the transistors are operating at when Atom is clocked over 3ghz? Stop trolling yourself LOL

 

[Exist50]

And where do you think the transistors are operating at when Atom is clocked over 3ghz? Stop trolling yourself LOL

Try actually opening the link.

 

[dmens]

Try actually opening the link.

Actually try figuring out Atom design gate depth and its likely operating voltage at 3ghz+.

 

[Exist50]

Actually try figuring out Atom design gate depth and its likely operating voltage at 3ghz+.

For the third time, the entire VF curve was shown, and we have a reference point with Tremont. At this point you're just throwing out technobabble in the hope people will ignore real data.

And that's enough feeding the trolls from me.

 

[dmens]

The funny thing here is you consider actual silicon design considerations to be "technobabble". But hey, have it your way.

 

[IntelUser2000]

Unless they can reach 20% increased ST with only 4.6 Ghz which I doubt.

Why not? That 20% is an "up to" figure.

Although I think it'll clock higher than 4.6GHz.

That Far Cry New Dawn figure in particular has me worried, because that's a game where CML-H demolishes Cezanne already. And when I say demolish, I literally mean 20%-higher-performance-demolish.

They only used the 11400H in their comparisons though. What CML and what Cezanne chips are used in your comparison?

Personally, from either Intel OR AMD I would like to see:

1. Weight 2-3.5 lbs
2. 8 cores
3. 4K screen
4. Mobile 3060, 3070, 3080 or AMD equivalent.
5. Full keyboard (backlit)
6. 15” (better: 16” using thin bezels)
7. Decent battery life for non-gaming stuff

You are not going to see 3.5lbs with TGL-H and RTX 3060 graphics while having a 15-inch screen. Heck lots of the iGPU ones have difficult time reaching under 3.5lbs!

 

[moinmoin]

I really shouldn't feed the trolls any further, but Intel showed the VF curve.

Intel details the Willow Cove architecture in Tiger Lake: SuperFin transistors and better VF curves along with an official introduction to Alder Lake

On the occasion of Architecture Day, Intel delved into the underpinnings of the Willow Cove architecture that is set to debut with the Tiger Lake CPUs next month. Willow Cove will use Intel's new SuperFin process technology and will offer a much higher dynamic range in the voltage-frequency...

www.notebookcheck.net

It's actually more significant at lower voltages.

Honestly I wouldn't use those curves for any discussion, they look idealized and lack the values for voltage. So they are little more than illustrations of the generic statements made on the slides.

 

[IntelUser2000]

Actually try figuring out Atom design gate depth and its likely operating voltage at 3ghz+.

So your belief is that Core @ 5.3GHz = Atom @ 3.4GHz?

Because Core reaches 5.3GHz by completely eating into any overclocking headroom. They probably haven't changed the fundamentals since Sandy Bridge, but despite having only a 3.8GHz Turbo, you can clock a 2600K @ 4.5GHz with nearly all samples and sometimes go 4.7-4.8GHz.

The OC clocks regressed with Ivy Bridge and Haswell and it took Skylake to get it back. Then a few more Skylake iterations to get it higher.

I don't believe that's anything fundamental. The motherboard power management circuitry is made more robust, and so is the CPU. Intel had 5 years to refine 14nm process and Skylake, which never happened for cutting edge CPUs.

For all we know 3.3GHz on Tremont is like a 2600K @ 3.8GHz.

Honestly I wouldn't use those curves for any discussion, they look idealized and lack the values for voltage. So they are little more than illustrations of the generic statements made on the slides.

coercitiv made a good point that increased frequencies also contribute to power use so the lower voltage curve isn't ideal, unless we're talking frequencies under 1.5GHz where it can run at 0.8V.

The gain is probably 15% regardless of whether we're talking 3GHz Atom or 5GHz Core.

I don't know why Intel would do this. These are, I thought, supposed to be low power cores.

If it indeed works higher than 3.4GHz, they'll contribute to overall MT performance.

 

[dullard]

I don't know why Intel would do this. These are, I thought, supposed to be low power cores.

That is the misconception. Alder Lake is more Big.Middle than Big.Little.

 

[Exist50]

Honestly I wouldn't use those curves for any discussion, they look idealized and lack the values for voltage. So they are little more than illustrations of the generic statements made on the slides.

They include frequency, so I'm not sure what is supposed to be unclear. +1GHz at a mid-low voltage, and about the same Vmax to Vmax. And again, we have the silicon to show it. None of this is theoretical.

 

[itsmydamnation]

So your belief is that Core @ 5.3GHz = Atom @ 3.4GHz?

Because Core reaches 5.3GHz by completely eating into any overclocking headroom. They probably haven't changed the fundamentals since Sandy Bridge, but despite having only a 3.8GHz Turbo, you can clock a 2600K @ 4.5GHz with nearly all samples and sometimes go 4.7-4.8GHz.

but they have , the perfect example is the L1D cache cycle access time.

edit: the other thing to consider is the clock stagnation of "low stage count" ARM cores as well.

 

[dmens]

They include frequency, so I'm not sure what is supposed to be unclear. +1GHz at a mid-low voltage, and about the same Vmax to Vmax. And again, we have the silicon to show it. None of this is theoretical.

Way to go, confusing the reduction of silicon variation as some kind of general transistor performance increase. Which by the way was one of the severe problems faced by early Intel 10nm, resulting in huge variation in binning at a sane power target, but half decent OC if you are willing to just pump power into the chip. Which is apparently what Intel is now officially doing, by ignoring any semblance of concern on power efficiency.

Then again, if you actually knew enough technobabble to figure out the reason for low Icelake base frequencies you wouldn't be quoting Intel marketing graphs with one axis unlabeled.

 

[Zucker2k]

Iris Xe retested.

Six months later, Iris Xe is looking to be exactly what Intel needed in its fight against AMD Ryzen

Iris Xe Max did little to impress, but the same can't be said about the regular Iris Xe 96 EUs GPU. With more than thirty 11th gen laptops under our belt, we can now paint a broader picture of how Iris Xe performs when compared to all the mobile Ryzen Radeon Vega GPUs currently available.

www.notebookcheck.net

 

[dmens]

For all we know 3.3GHz on Tremont is like a 2600K @ 3.8GHz.

First off, CPU designers do not time their designs at the voltages that overclockers use. It is not a design corner that anyone cares about. In addition, some of OC headroom is actually a bug being spun as a feature, specifically, system frequency guard-banding due to ATPG testing holes. So, if overclockers can get some CPU to run at some frequency above the spec, great for them. It is not indicative of any effort on the designers' part, nor does it say anything about the process or the architecture. It is pure happenstance.

Secondly, operating frequency is primarily a function of gate depth in the CPU pipeline stages. I guarantee you Atom was not designed to 3.3ghz. It is just the boost clock Intel can hit by shoving unlimited power into the part. On the other hand, the big cores are designed to run at 4ghz up front. So extrapolating OC gains from one architecture and applying to another architecture is nonsense. It doesn't work like that.

 

[Exist50]

Way to go, confusing the reduction of silicon variation as some kind of general transistor performance increase.

There is literally zero indication that the gains are only from a decrease in variation. Nor, for that matter, would it make a difference. +1GHz is +1GHz, no matter how you try to deny it.

That I have to explain so basic a concept as intra-node performance gains is utterly absurd. And all the more so when there's real silicon to prove it. It makes it all the more laughable when you claim to know anything about this industry.

And why am I unsurprised that you don't understand how graphs work... Hint. Same point on the x-axis (labeled voltage), means the same voltage. They teach this in elementary school.

This reminds me a lot of Piednoel.

 

[dmens]

There is literally zero indication that the gains are only from a decrease in variation. Nor, for that matter, would it make a difference. +1GHz is +1GHz, no matter how you try to deny it.

That I have to explain so basic a concept as intra-node performance gains is utterly absurd. And all the more so when there's real silicon to prove it. It makes it all the more laughable when you claim to know anything about this industry.

And why am I unsurprised that you don't understand how graphs work... Hint. Same point on the x-axis (labeled voltage), means the same voltage. They teach this in elementary school.

This reminds me a lot of Piednoel.

The sad thing is, Francois still knows more than you. So don't flatter yourself.

 

[Gideon]

People here seem to be forgetting that small and medium cores often tend to trade area and power efficiency for rather low frequency walls that just can't be breached no matter how much voltage you push through them.

There are plenty of examples:

1. One such example is the Jaguar core, which had a 2.2 Ghz turbo clock on netbook processors (using GloFo 28nm process). It still had the same 2.2 - 2.3 max clock even in the rather generous console TDP environment on TSMC's 16nm finfet process. Some people also managed to enable overclocking on the chip, but the wall was real.
2. Another example are pretty much all the ARM chips, up to and including V1 and N2 (according to this Anandtech's article) tend to have same freqency targets that top out at around ~ 3 Ghz.
3. Apple's M1 also fits into here. A14 has a turbo speed of 3.1 Ghz. M1, even in an Apple Mini (chassis that can dissipate 54W) only goes up to 3.2 Ghz. The wide architecture is not designed to work on faster freuqencies.
4. And finally Intel's own Tremont which caps out @ 3.3 GHz single-core turbo even on a 10W TDP desktop product. There is plenty of power headroom there for a single core (For reference AMD needs less than 10W to get a single Zen 3 core to 4 Ghz).

Don't forget A cluster of 4 Atom cores takes about the same are as one Intel's big core (and also about the same power, when running @ optimized frequencies) And Gracemont is rumored to be at around Skylake's performance.

I mean something's got to give. If Gracemont is indeed around Skylake IPC and can reach 4Ghz, Intel is a bunch of imbecilles for not designing a SKU with 32 Gracemont cores and 2 Golden Cove cores (it would take up similar area and fit on the ring due to gracemont 4 core "clusters"). It would be similar in size to Alder Lake and It would absolutely beat 5950X in throughput oriented tasks (e.g. rendering) and even give 3960X a run of it's money when bandwidth or I/O is not the limit.

Why isn't this the case? Because in all likelyhood the gracemont cores are not these super wonder 4 Ghz pseudo-skylake cores with that transistor budget.

I might be wrong, but IMO even getting 3.5 Ghz out of cores so "tight" would be an unprecedented achievement.

 

[DrMrLordX]

We will also likely see full blown desktop parts in some of the higher end design.

Unless you're talking BGA -R parts, I doubt it. Intel hasn't mentioned TigerLake-H being on LGA1700.

People here seem to be forgetting that small and medium cores often tend to trade area and power efficiency for rather low frequency walls that just can't be breached no matter how much voltage you push through them.

Carrizo was bad about that. So was Kaveri in its own way.

 

[Thala]

People here seem to be forgetting that small and medium cores often tend to trade area and power efficiency for rather low frequency walls that just can't be breached no matter how much voltage you push through them.

There are plenty of examples:

1. One such example is the Jaguar core, which had a 2.2 Ghz turbo clock on netbook processors (using GloFo 28nm process). It still had the same 2.2 - 2.3 max clock even in the rather generous console TDP environment on TSMC's 16nm finfet process. Some people also managed to enable overclocking on the chip, but the wall was real.
2. Another example are pretty much all the ARM chips, up to and including V1 and N2 (according to this Anandtech's article) tend to have same freqency targets that top out at around ~ 3 Ghz.
3. Apple's M1 also fits into here. A14 has a turbo speed of 3.1 Ghz. M1, even in an Apple Mini (chassis that can dissipate 54W) only goes up to 3.2 Ghz. The wide architecture is not designed to work on faster freuqencies.
4. And finally Intel's own Tremont which caps out @ 3.3 GHz single-core turbo even on a 10W TDP desktop product. There is plenty of power headroom there for a single core (For reference AMD needs less than 10W to get a single Zen 3 core to 4 Ghz).

This is a much too simplified view. As example, in order to clock say a modern ARM core to 4GHz+ you would need a physical design sign-off for voltages, which are way outside the efficiency range. Of course if you want to, you could do it. For example, when upping the voltage, you can resolve your setup-violations (e.g. making you critical path faster) but at the same time you can run into hold-violations (e.g. your fastest pathes become too fast).
Potentially you can make such a decision for a desktop part, but you need to define such requirements before physical design.

 

[JoeRambo]

People here seem to be forgetting that small and medium cores often tend to trade area and power efficiency for rather low frequency walls that just can't be breached no matter how much voltage you push through them.

There are plenty of examples:

1. One such example is the Jaguar core, which had a 2.2 Ghz turbo clock on netbook processors (using GloFo 28nm process). It still had the same 2.2 - 2.3 max clock even in the rather generous console TDP environment on TSMC's 16nm finfet process. Some people also managed to enable overclocking on the chip, but the wall was real.
2. Another example are pretty much all the ARM chips, up to and including V1 and N2 (according to this Anandtech's article) tend to have same freqency targets that top out at around ~ 3 Ghz.
3. Apple's M1 also fits into here. A14 has a turbo speed of 3.1 Ghz. M1, even in an Apple Mini (chassis that can dissipate 54W) only goes up to 3.2 Ghz. The wide architecture is not designed to work on faster freuqencies.

Good points, but too black and white i think. TSMC clocked A72 that was designed for 2Ghz operation in phone, moving from 16nm to 7nm at 4ghz. So it is definitely possible to increase freq of same design ( tweaked for 7nm sure, but same A72) when moving to different process.
Since Intel is changing both design and using new iteration of 10nm process, they can target clocks that are different from Tremont on previous iteration of 10nm.

 

[jpiniero]

Don't know if people noticed this, but the 6 core Tiger Lake H45 has the L3 cache cut in half to 12 MB instead of 18 MB.

 

[eek2121]

The closest is MSI Prestige 15 A10SC-014 which is slightly over 3.5 lbs, has only 6 cores and a GTX 1650 so a little outdated.
What's really notable when filtering on Geizhals is how there are no AMD laptops with 4K screens at all (just 3 with 2560x1600 as the highest resolution screen available). I guess that'll change in due time.

I would settle for a screen lower than 4K as long as it is higher than 1080p. MSI is doing a refresh with TGL-H that I plan on looking into.

I don't know why Intel would do this. These are, I thought, supposed to be low power cores.

big.little does not necessarily mean saving power. Quite a bit of the time it is about saving die space. Intel can use it to increase core counts while not eating into margin. 14 cores in a laptop…

For the third time, the entire VF curve was shown, and we have a reference point with Tremont. At this point you're just throwing out technobabble in the hope people will ignore real data.

And that's enough feeding the trolls from me.

🤣

 

[jpiniero]

Kingston Technology announces its overclockable DDR5 modules will ship in Q3 2021 - VideoCardz.com

Kingston Technology DDR5 Overclockable Modules One Step Closer to Reaching Market Kingston Technology Company, Inc., a world leader in memory products and technology solutions, today announced it has sent overclockable DDR5 modules to its motherboard partners to begin qualification on the...

videocardz.com

Kingston says it plans to ship DDR5 in Q3. So it might be available, just really really expensive.

 

[moinmoin]

I would settle for a screen lower than 4K as long as it is higher than 1080p. MSI is doing a refresh with TGL-H that I plan on looking into.

Ok, filtering for up to 15.9", 1920x1200 or higher, 8 or more cores, dGPU, up to 1.6kg currently results in ASUS ROG Flow X13 GV301QH-K6034T and -K5232T which have a 5800HS/5980HS, GTX 1650, 13.4" 1920x1200/3840x2400, 1.3kg. Will be interesting to see how availability and variety changes with the next round of notebook refreshes including TGL-H.

 

[RTX]

Honestly I wouldn't use those curves for any discussion, they look idealized and lack the values for voltage. So they are little more than illustrations of the generic statements made on the slides.

What's exactly problematic about it? It shows 3.9Ghz vs 4.5Ghz in the curve. 4.8 is from increasing the voltage beyond the 1065G7.