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Discussion Intel current and future Lakes & Rapids thread

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FriedMoose

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Dec 14, 2019
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So Alder Lake does support AVX-512 but it gets disabled when running in hybrid mode.
It will be interesting to see if the small cores are another architecture or just Golden Cove without AVX-512 and TSX. If they're the latter then this would effectively be a 16C/32T CPU in the vast majority of workloads.
 
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TheGiant

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Jun 12, 2017
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I like that approach
it has only benefits
for gaming/tough workloads that don't scale linearly you have more first few powerful cores than everything equal and for the flow workloads you lose nothing, one part is faster and one not
but the windows scheduler waves hello !
 
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IntelUser2000

Elite Member
Oct 14, 2003
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It will be interesting to see if the small cores are another architecture or just Golden Cove without AVX-512 and TSX. If they're the latter then this would effectively be a 16C/32T CPU in the vast majority of workloads.
LOL, they are trying TSX again?
 

mikk

Platinum Member
May 15, 2012
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ADL -S(881/601) -P(282/682) -M(282)


2 and 6 big core mobile variants, why not 4 big cores. They must be confident they can beat 4x Willow Cove with a 2+8 config unless 6+8+2 is also a low power variant. I mean it could be because it comes with GT2 graphics, TGL-H only comes with GT1 graphics.
 

uzzi38

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Oct 16, 2019
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2 and 6 big core mobile variants, why not 4 big cores. They must be confident they can beat 4x Willow Cove with a 2+8 config unless 6+8+2 is also a low power variant. I mean it could be because it comes with GT2 graphics, TGL-H only comes with GT1 graphics.
Personally I'm hoping that both varients will be used for -U honestly. Both the 6+8+2 and the 2+8+2 configs.
 

mikk

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Finally a confirmation for the launch date, even though I was hoping for August. Also there is Hotchips and GDC with TGL/Xe sessions in August, so we should get more informations by next month.
 
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jpiniero

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Oct 1, 2010
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Personally I'm hoping that both varients will be used for -U honestly. Both the 6+8+2 and the 2+8+2 configs.
That's what P is, H+U. If I had to guess, I would say that M is a replacement for Lakefield. Could also be used for some Atomish products with the big cores disabled.

Surprised that they are doing this in September.
I believe the launch was supposed to be by now.
 

Exist50

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Aug 18, 2016
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2 and 6 big core mobile variants, why not 4 big cores. They must be confident they can beat 4x Willow Cove with a 2+8 config unless 6+8+2 is also a low power variant. I mean it could be because it comes with GT2 graphics, TGL-H only comes with GT1 graphics.
Where are you seeing the ADL configs? Am I missing something on that page?
 

IntelUser2000

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Oct 14, 2003
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2 and 6 big core mobile variants, why not 4 big cores. They must be confident they can beat 4x Willow Cove with a 2+8 config unless 6+8+2 is also a low power variant. I mean it could be because it comes with GT2 graphics, TGL-H only comes with GT1 graphics.
Gracemont is supposed to have performance like Skylake. They'll have to all work in tandem, but that seems plausible.

N5000 R15: 284
+30% for Tremont
+30% for Gracemont
+85% for double the cores

That gets us to ~900, which is probably at the same level as Tigerlake. You add Golden Cove cores working(maybe not always, similar to Lakefield) but it'll get you above it.

The part about 7nm is very disappointing. And with Jim Keller pushing for TSMC. Some said with Icelake-SP we'll see lower-core count variants first with the 38 core count part coming later.

TSMC clearly has better process than Intel looking at the products its using.

I believe the launch was supposed to be by now.
It seems after the lockdowns, and lack of public venues to announce products(such as CES/Computex) they are basically announcing it at the same time as you can buy devices.

Which, I guess is not such a bad thing? Just keeps us waiting for details. :)
 
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IntelUser2000

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Oct 14, 2003
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Can Alderlake 8+8 be competitive?

Well let's see.

This is assuming all 16 cores can work in tandem, Gracemont cores included.

In the U form factor, if you take my simple calculations above, 8 Gracemont cores should get 1600 in Cinebench R20. Perhaps with even higher TDP it can clock 10-15% higher.

1800 for 8 Gracemont

10 Skylake cores get 6300 in R20. Moving to 8 Willow Cove cores, the improved uarch cancels out the 2 extra cores. Assuming 20% further gain from Golden Cove, we get -

7600 for 8 Golden Cove

If you simply add the two, you get ~9400, which is on par with the Ryzen 9 3950X. By that metric it can get quite close. It does need few addendums though.

-If Hyperthreading can be active for Golden Cove for a total of 24 threads. On Lakefield, Sunny Cove's HT is inactive.
-If having two sets of cores work together does not create any contention.*
-If applications/OS support is good enough that combined performance is representative of performance for vast majority of applications.

*Cinebench could be close to the ideal case because it can simply be made to split up workloads into 24 sections. Not all threaded applications are going to be like this.

One could think of the hybrid state as "Hyperthreading 2.0". Where potential gains in perf/watt is there but with further complications in coding and support.
 

jpiniero

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Oct 1, 2010
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The part about 7nm is very disappointing. And with Jim Keller pushing for TSMC. Some said with Icelake-SP we'll see lower-core count variants first with the 38 core count part coming later.
So is Alder Lake a 10 nm CPU and 14 nm GPU or 14 nm CPU and 10 nm GPU? Heh.

Charlie btw has an recent article claiming that the XCC core count isn't 38. I'm sure it's clickbaity in that it's around 38.
 

IntelUser2000

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Oct 14, 2003
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Charlie btw has an recent article claiming that the XCC core count isn't 38. I'm sure it's clickbaity in that it's around 38.
Welcome to news media 2020. Where clickbait is the norm.

I think I saw somewhere that it might have 1-2 cores disabled. So 36 cores.

So is Alder Lake a 10 nm CPU and 14 nm GPU or 14 nm CPU and 10 nm GPU? Heh.
I can't see how the -M version will be Lakefield. First of all, the die size will be ballooned by having twice the amount of cores on the same process.

Second, it pretty much needs the "14nm" section be 22FFL, and be the active interposer aka Foveros.

Third, why would a demanding compute section(CPU or GPU) be on a much larger process?

We know the successor to Lakefield-R has another code name. One is Ryefield.
 

DrMrLordX

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Apr 27, 2000
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I believe the launch was supposed to be by now.
Yup. TigerLake won't be as late as Comet Lake-S but it's still going to be late. What it doesn't tell us is the difference between launch and availability. The previous assumptions I heard had Intel launching in July with widespread availability by Christmas. Now . .. ? Hard to say.
 

jpiniero

Diamond Member
Oct 1, 2010
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I can't see how the -M version will be Lakefield. First of all, the die size will be ballooned by having twice the amount of cores on the same process.
Like I said there's probably some overlap with different segments. The actual details, well we will have to see.

Yup. TigerLake won't be as late as Comet Lake-S but it's still going to be late. What it doesn't tell us is the difference between launch and availability. The previous assumptions I heard had Intel launching in July with widespread availability by Christmas. Now . .. ? Hard to say.
I agree that it probably will be immediate availability.
 

IntelUser2000

Elite Member
Oct 14, 2003
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Like I said there's probably some overlap with different segments. The actual details, well we will have to see.
Intel is incredibly slow. Even AMD has an on-die PCH. Now Intel's PCH has more functionality, but AMD's way seems to be right to me. In mobile you don't need all the features so the one in Renoir will suffice.

Now they want to separate the GPU and CPU too? For mobile devices? Why they need a complex packaging scheme to get it working is beyond me. I'm hoping Alderlake at least has some of the PCH functionality on an active interposer with two compute dies on top.

The root cause is still process, which seems like will continue until 7nm. So the question is, is 7nm bad as initial 14nm was in, or is it worse?

TSMC's way of going in smaller steps seems like a better approach if you just look at end results. 28-20-16-10-7-5-3 are not full node jumps in a historical sense. They are more than a half node, something like a 0.6 node jump.

Intel on the other hand are doing full jumps, with what is increasingly looking like a fix in-between rather than improvements as they call it.
 
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mikk

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The part about 7nm is very disappointing. And with Jim Keller pushing for TSMC. Some said with Icelake-SP we'll see lower-core count variants first with the 38 core count part coming later.

All of this comes from Charlie, so better take it with a grain of salt. He also said that the GPU in ADL will be on 14nm which is nonsense given that TGL-U Xe LP is 10nm based.
 

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