Haswell is 22nm, Broadwell is 14nm, how can you relate the two designs in a parameter where process node plays a pivotal role?
While the TDP will be lower for Broadwell, the actual die will also be much smaller than Haswell, ergo, the heat flux per unit time will increase an thus the temperature will, in all likelihood, be higher for a given clock speed. This is inevitable so long as CPU makers continue with CMOS designs. Now, material changes can mitigate this to some extent, but the ultimate trajectory doesn't look good as far as desktop performance goes. There is a a chart floating around somewhere where Intel graphs out temperature vs. node size and shows it approximating the temperature of the sun (or some such thing, IDC probably has it saved in his vast arsenal of charts, graphs and equations).
If Intel's goal was desktop performance as opposed to lower mobile TDPs, then they could change the die layout somewhat (floor plan) and use a better TIM and even change the electrical properties of the transistors which would result in higher switching speeds at higher voltages (and bump up the TDP to > 100 W). But that's not the direction Intel is taking. Currently Intel is optimizing for faster switching speeds at lower voltages. You can see this visually on page 20 of
This Intel Presentation. Even with servers, they are going for more cores at the same power draw for succeeding generations.
There is another mitigating factor called Dark Silicon and it has been discusses on AT before. There is a paper on it
-> here <- that is not too technical.
I hope I've answered your question, I didn't ask for clarification be posting.