Intel announces Tri-gate "3-D" transistors for upcoming Ivy Bridge based processors

[jimbo75]

They already said Atom at the end of 2012, and server chips first for IB as well. The whole "IB is coming in a few months to beat Bulldozer on desktop" argument has been shattered in one day basically.

And it IS late, albeit not hugely. Intel is 3 months behind schedule with this already. Otellini has changed from "shipping 2nd half 11" to "beginning production before the end of the year".

 

[Idontcare]

pm, thanks for your insight, but could you please elaborate on the difference between "dual-gate" FinFET and "tri-gate" one. From my understanding the "gate" here refers to surfaces of the fin, so instead of one planar surface, you have three, two sidewalls of the fin and the top of it. To me it seems that every rectangular fin sticking out has three surfaces, including this one from TSMC (IEDM 2010)

Is this just an accounting issue where Intel is counting the top of the fin as a gate, getting a "tri gate" while everyone else is only counting the sides of the fin, getting a "dual gate?" Or are there fundamental differences. I can imagine that if the fin looked like a triangular roof sticking out, that would be "dual gate".

Yes.

The criticality in making the difference resides in the IP-space (patents). "Finfet" IP-space was mined out ages ago, hell even I worked on finfets on 65nm node dimensions for prototype development.

Intel needed to define their own IP-space. They don't call it finfet, that would invite lawsuits from IMEC, LETI, and the IBM consortia. Calling it tri-gate is kinda like branding at this point.

Lightpeak becomes thunderbolt, sandy bridge becomes 2nd generation Core technology, finfet becomes tri-gate, etc.

 

[podspi]

I still cant help but think that the biggest impact this will have will be for Intels Atom line-up (not its Ivy bridges ect).

A 22nm Tri-gate'd Atom is the goal for Intel, the faster (its launched) the better.

** Bonus points if Intel can get a small Atom processor out that can go into tablets, run windows 7, right now before Windows 8 is even launched for arm processors.

** Double bonus points, if its performance/watt kicks the shyt out of the ARM tablets.

I am guessing 32nm Atom will be yet another shrink, and 22nm Atom will be an all new, OoO design? Could be quite a force. I am skeptical of Atom's prospects on 32nm, especially when everybody knows 28nm is coming and x86 is actually a liability in the smartphone/tablet market. As hard as Intel is pushing x86 in the mobile space, they are doing it in such a conservative manner I think they are risking losing the ISA battle for good (if they haven't already). I have to confess I was rooting for x86 in smartphones. I totally would dual-boot windows on my smartphone (yes, I'm sick )

 

[Idontcare]

According to Intel Finfet and tri-gate are different.http://www.intel.com/technology/silicon/tri-gate.htm?iid=tech_silicon_pipeline+body_transistors

They are different by virtue of semantics. It comes down to the fact that the aspect ratio of the fin itself is an infinitely variable parameter as the design engineers can change both the fin height and the fin width as they like.

http://download.intel.com/technology/silicon/Chau-tri-gate-paper-0902.pdf

As the aspect ratio is changed, Intel defines the resultant structure as being 1D, 2D or 3D. In reality they are all 3D, but the specific xtor characteristics vary because the 3D shape itself varies.

For very large silicon width, the tri-gate

device is single-gate DST-like, and for very tall silicon
height, the tri-gate device is double-gate transistor-like.
An optimal tri-gate DST will have device dimensions of​

gate length = silicon body width = silicon body height.

They are all 3-dimensional fins. In all cases the gate is active and wraps around all 3-sides of the fin. The distinction being made by Intel pertains to the specific range of aspect ratios of the fins when it comes to defining the finfet itself as being a 2D or a 3D xtor.

 

[tomoyo]

Wow, this looks like a nice low cost improvement over standard planar design. Amd is going to be in trouble once ivy bridge comes out unless they can come out with a good alternative within 1-1.5 years.
The advantage when using low voltage looks extremely helpful for intel in the mobile/smartphone space. I definitely see them making a giant push in 22nm for atom derivatives for smartphone/tablet along with having an impressive lead in laptops in mid-2012. My guess is the first release comes out mid-late Q2 2012.

 

[drizek]

so I don't get it.

Some people say "this allows us to continue Moore's Law", ie. shrinking to 22nm alone wasn't good enough to bring about the performance improvement we expect from a shrink.

But then I hear in one of the videos, 'this is equivalent to two process shrinks'.

 

[RobertPters77]

Conspiracies. Piss me off.

 

[Idontcare]

so I don't get it.

Some people say "this allows us to continue Moore's Law", ie. shrinking to 22nm alone wasn't good enough to bring about the performance improvement we expect from a shrink.

But then I hear in one of the videos, 'this is equivalent to two process shrinks'.

Its about "scalability".

Planar cmos is not scalable on a moore's law progression for too many more nodes. Going 3D makes it scalable, the same general xtor architecture that enables 22nm will be shrinkable to enable 14nm, 10nm, etc.

In process tech development we look for sustainable (scalable) solutions. We don't want a one-node solution. Everything is looked at as needing to be viable for at least 2 nodes.

3D xtors enable a continuation in Moore's law on a path of confidence in the scalability of the technology.

 

[Cogman]

so I don't get it.

Some people say "this allows us to continue Moore's Law", ie. shrinking to 22nm alone wasn't good enough to bring about the performance improvement we expect from a shrink.

But then I hear in one of the videos, 'this is equivalent to two process shrinks'.

Faster transistors at lower power translate into higher clock speeds.

 

[Cogman]

Its about "scalability".

Planar cmos is not scalable on a moore's law progression for too many more nodes. Going 3D makes it scalable, the same general xtor architecture that enables 22nm will be shrinkable to enable 14nm, 10nm, etc.

In process tech development we look for sustainable (scalable) solutions. We don't want a one-node solution. Everything is looked at as needing to be viable for at least 2 nodes.

3D xtors enable a continuation in Moore's law on a path of confidence in the scalability of the technology.

I read (or heard) somewhere that even using current planer tech that we would be good all the way down to the 10 nm node or so. The new 3d transistors are going to get us very small.

The question is, how long with it take other fabs to do what intel is doing? A system with a fast CPU is nice, but worthless without the other hardware to match.

My other question would be, can this affect current memory tech? might it be possible to get higher densities/faster speeds?

 

[jimbo75]

It's just marketing. Reading Anand's article it should be pretty clear that there are no huge performance gains to be found at the x86 end, but there may be reasonable gains at the ARM end in power draw.

It's probably good for intel that they have got it out of the way, but I wouldn't say that moving to FinFET's was a guarantee for other foundries, even at 14nm.

 

[piesquared]

Please don't feed the troll, just report him.

what are you, 12? lol what a little baby, i couldn't care less how many times you report me. after all these are just intel's forums, utterly meaningless as far as i'm concerned. especially little peon's like you that swallow intel's jizz at the drop of a hat. good boy good boy


Serious personal attacks are not acceptable. Take some time off please and rethink your whole approach to the community here.

Idontcare
Super Mod

 

[Idontcare]

I read (or heard) somewhere that even using current planer tech that we would be good all the way down to the 10 nm node or so. The new 3d transistors are going to get us very small.

The question is, how long with it take other fabs to do what intel is doing? A system with a fast CPU is nice, but worthless without the other hardware to match.

My other question would be, can this affect current memory tech? might it be possible to get higher densities/faster speeds?

It's not just about dimensions though...yes you can build a 10nm process node IC with planar CMOS but it won't have nearly the performance nor anywhere near the power-consumption envelope as a 10nm process node based on 3D xtors.

If you want continued improvements in all three categories - xtor density, performance (clockspeed), and power-consumption then you need to abandon planar CMOS around 20nm node dimensions.

It's just marketing. Reading Anand's article it should be pretty clear that there are no huge performance gains to be found at the x86 end, but there may be reasonable gains at the ARM end in power draw.

It's probably good for intel that they have got it out of the way, but I wouldn't say that moving to FinFET's was a guarantee for other foundries, even at 14nm.

Just marketing?

 

[Cogman]

It's just marketing. Reading Anand's article it should be pretty clear that there are no huge performance gains to be found at the x86 end, but there may be reasonable gains at the ARM end in power draw.

It's probably good for intel that they have got it out of the way, but I wouldn't say that moving to FinFET's was a guarantee for other foundries, even at 14nm.

The impact of Intel's 22nm 3D Tri-Gate transistors on high end x86 CPUs will be significant. Intel isn't expecting its competitors to move to a similar technology until 14nm. The increases in switching speed at the same voltage could allow Intel to finally hit or exceed that magical 4GHz barrier in a stock CPU. I suspect Intel will likely use the gains to deliver lower power CPUs however there's always the possibility of some very fast Extreme Edition parts.

Sounds like they think there will be significant gains as well.

 

[Bill Brasky]

It's just marketing. Reading Anand's article it should be pretty clear that there are no huge performance gains to be found at the x86 end, but there may be reasonable gains at the ARM end in power draw.

It's probably good for intel that they have got it out of the way, but I wouldn't say that moving to FinFET's was a guarantee for other foundries, even at 14nm.

Huh. We must have read different articles because the one linked in the OP said exactly opposite of what you did.

edit: Cogman beat me to it.

 

[jimbo75]

Sounds like they think there will be significant gains as well.

Well it's a shrink, so there will be gains.

GF's 28 nm is 49% frequency, 44% switch and 25% leakage vs TSMC's 40nm.

http://www.globalfoundries.com/eBooks/dac_hkmg/

If GF had made this same announcement today none of you would even have noticed.

 

[Cogman]

Well it's a shrink, so there will be gains.

GF's 28 nm is 49% frequency, 44% switch and 25% leakage vs TSMC's 40nm.

http://www.globalfoundries.com/eBooks/dac_hkmg/

If GF had made this same announcement today none of you would even have noticed.

These gains they are listing are in addition to the regular shrinking gains. In other words, these are the gains that will be seen if games were manufactured at the same level.

 

[jimbo75]

These gains they are listing are in addition to the regular shrinking gains. In other words, these are the gains that will be seen if games were manufactured at the same level.

Ahh but that's not what it says is it.

The comparisons are made vs 32nm planar. If you compare 22nm planar vs 22nm FinFET those numbers would look an awful lot less impressive.

I think it's going to help intel a lot at the ARM end, but I'm still not sure it's enough.

 

[Cogman]

Ahh but that's not what it says is it.

The comparisons are made vs 32nm planar. If you compare 22nm planar vs 22nm FinFET those numbers would look an awful lot less impressive.

I think it's going to help intel a lot at the ARM end, but I'm still not sure it's enough.

Do you see that gray line? that is the projected gains at 22nm using planar tech.

 

[jimbo75]

Do you see that gray line? that is the projected gains at 22nm using planar tech.

And if you compare that grey line at the 1v mark to the blue line at the 1v mark, you see what it would be for intels high end with planar. What is it, .03 or so?

 

[pm]

pm, thanks for your insight, but could you please elaborate on the difference between "dual-gate" FinFET and "tri-gate" one. From my understanding the "gate" here refers to surfaces of the fin, so instead of one planar surface, you have three, two sidewalls of the fin and the top of it. To me it seems that every rectangular fin sticking out has three surfaces, including this one from TSMC (IEDM 2010)

Is this just an accounting issue where Intel is counting the top of the fin as a gate, getting a "tri gate" while everyone else is only counting the sides of the fin, getting a "dual gate?" Or are there fundamental differences. I can imagine that if the fin looked like a triangular roof sticking out, that would be "dual gate".

I am no expert - I usually defer on this stuff to Idontcare - but it was my understanding that the original finFET designed used a thicker layer of oxide across the top as part of the self-aligned process and so it really was a dual gate even though the poly wrapped around on all three sides because the oxide etchstop on the top was too thick.

In this paper from UC Berkeley about the finFET:
www.eecs.berkeley.edu/~hu/PUBLICATIONS/PAPERS/700.pdf

They mention the SiO2 "cover layer" several times which is on the top of the "fin". For example on page 2321, fourth paragraph, they say "the SiO2 spacer on the sides of the Si-fin is completely removed by sufficient over etching of SiO2 while the cover layer protects the Si-fin" and then at several points they go on to mention that the finFET is a double-gate device such as first paragraph of section C. where they say "The double-gates of the finFET are self-aligned to each other and to the S/D".

Idontcare, you mentioned you worked on finFETs.... are they dual-gate or tri-gate or both?

 

[Dark Shroud]

So in short by the end of 2012 both Intel & AMD will have their 2*nm Atom & Bobcat SOCs out that will be able to run the full version of Windows, ARM Windows, stripped down Windows, & Andriod. Yes Andriod already runs on x86 and just for fun we should count MeGo in there for Intel. AMD has also hired devs to write drivers for Andriod for their hardware.

So this single chip series from each company can be used in Tablets, Ultra portables, Netbooks, & low end Notebooks.

By the time AMD has a FAB running at 1*nm they'll also have their own version of Finfet to compete with Intel's Tri-gate. I expect production of AMD's to be 2nd half of 2013 earliest.

x86 is going to make a serious dent in the tablet market. The market that counts because the majority of people who pay $500+ for a tablet are not going to replace it yearly. Cell phones are disposable, so it won't hurt either company to need an extra year or two.

 

[Nemesis 1]

Looks like Intel is getting ready to up the core counts for 22nm, guess we'll see if the programmers are ready to take advantage.

Is this May information release a typical time for Intel or is the timing a bit of marketing before Llano goes retail?

Actually this is a little later than the C2D benchmarks intel let out early . But I suspect intel will do the Benchmarks after AMDs shows theirs . THats how I would play with a company like AMD. Kick em when their down and keep them there . With so many Arm cpu going into tablets and such. X86 monopoly will soon die. And all the wonderful new os. MS can die anytime I view them exactly the same as I do IBM AMD .

 

[Nemesis 1]

Who else here believes Intel is part of a government conspiracy which has aquired alien technology and is now currently exploiting it in an attempt to "launder" the technology as an indigenous Earth base advancement?

YOU knew I would be one who believes transitor tech fell from the sky. AT&T employee got credit for it in 1946 or 47. My recall is falling off pretty bad but I believe thats correct . Right around the time UFO were crashing in roswell

 

[Phynaz]

By the time AMD has a FAB running at 1*nm they'll also have their own version of Finfet to compete with Intel's Tri-gate. I expect production of AMD's to be 2nd half of 2013 earliest.

AMD doesn't have any FABs. They are at the mercy - for lack of a better word - of their contract manufacturers.

Basically a significant part of their destiny is out of their hands.