Intel 10nm delayed by 9 months? (Semiengineering)

[mrmt]

According to BK, 14nm ramp was going a bit faster than expected.

Have a quote?

 

[Nothingness]

Have a quote?

http://seekingalpha.com/article/307...-results-earnings-call-transcript?part=single

We also said that 14-nanometer, the ramps of our Broadwell products, are slightly ahead of our forecast. So we’re seeing a very nice migration of our product demand over to the 14-nanoemters. And we’re seeing some things like better yields, better utilization out of our 14-nanometer as it continues to get healthier. And so all of those combined have led us adjust our capital. So you’re seeing better utilization, better efficiency, but also the ability to move more 22-nanoemter capacity over the 14-nanometer.

 

[witeken]

Have a quote?

Of course!

Source: Seeking Alpha: http://seekingalpha.com/article/307...h-on-q1-2015-results-earnings-call-transcript

Our silicon technology leadership remains a valuable competitive advantage, and the percentage mix of our latest 14 nanometer processors, the 5th Gen Core and Core M processor, is just ahead of our expectations.

And while I'm at it:

We are on track to our annual goal of improving mobile profitability by $800 million with the majority of improvements to be realized in the back half of the year.

We believe there was an inventory burn across the worldwide PC supply-chain in the first quarter and we expect a further reduction in inventory supply-chain levels in the second quarter in anticipation of Windows 10 launch in summer.

Offsetting that is two things; one is, we’ll start to see -- we’re seeing 10-nanometer start-up cost today but they’ll ramp pretty significantly when we get into Q3 and Q4.

We also said that 14-nanometer, the ramps of our Broadwell products, are slightly ahead of our forecast. So we’re seeing a very nice migration of our product demand over to the 14-nanoemters. And we’re seeing some things like better yields, better utilization out of our 14-nanometer as it continues to get healthier. And so all of those combined have led us adjust our capital. So you’re seeing better utilization, better efficiency, but also the ability to move more 22-nanoemter capacity over the 14-nanometer.

I can answer that one just form a technology standpoint. First we’ve said nothing about our timing of 10-nanometers. And we’ll give all of our timing for 10-nanometers at a later date. And the adjustments that talked about, does not have anything to be really with the 10-nanometer capital or spending or timing. So, they are completely disconnected.

Guys you've talked about how the mobile losses declined in the back half of the year that was very helpful color. Could you talk a little bit about the strategy or the thought process behind combining the categorization of the groups and the reporting structure? What was the thought there?

Brian Krzanich - CEO
Sure I'll start Jim and Stacy can voice in some of this as well because there is financial side to this. But in general we first made this move based on our customers and how we look at the architecture in the business. So our customers you walk into whoever that customer is Lenovo, Acer or some of the ODMs, they look at the platform from the phablet especially up through at least the tablet and instead of low end entry level PC whether it be a window based system or Chromebook or Android. They look at all of those platforms as the same type of hardware. And they want to have a single group that they interface with and so our customers wanted this.

Secondly from an engineering perspective from our side, the silicon, the cost improvement, the software work, the drivers all of those things again a lot of overlaps. So by driving these two organizations together we are getting efficiencies, that are helping contribute to that $800 million cost reduction that Stacy and I've committed to. So it was first and foremost our customers and our efficiency were driven by this. This is not anything else.

 

[mrmt]

Of course!

You must read these statements more carefuly, Witeken. What BK said that it's slight ahead of their forecast, but what he didn't say which forecast he is talking about. The initial forecast that predicted the almost full Broadwell stack on H214 or a revised forecast, after the delays. I would be really surprised if their initial forecast was being vindicated by now, given that only a relatively small part of the entire stack is using Broadwell products, the information that went down in the supply chain and the fac that this time frame would be at odds of what we could reasonably expect from tick-tock.

I must say that this delay also validates Intel tick-tock approach in terms of risk management. One of their projects slipped but the other is - hopefully - well on its way to take over to a more normal speed. I can only wonder whether Broadwell delay impacted the Skylake project in terms of loading more process resources on the project team, in order to make up for the knowledge not passed by the Broadwell project team or if the two teams can be fully independent if the conditions request that.

 

[Ajay]

What I am seeing is that the defectivity issue is a nearly insurmountable challenge at 10nm node physical dimensions. The metrology is barely capable of generating usable data. Everything is operating at the hairy edge of its technical limitations.

So, is this just multi-patterning problems (similar to what happened @ 14nm) becoming even more of and issue? If so, is Intel's need for EUV more pressing than Bohr has stated?

 

[Qwertilot]

Sounds like its just got very hard in general If they can't even really reliably measure what's going on they're doing very well indeed to do anything!

Won't be any better for anyone else of course.

 

[witeken]

You must read these statements more carefuly, Witeken. What BK said that it's slight ahead of their forecast, but what he didn't say which forecast he is talking about. The initial forecast that predicted the almost full Broadwell stack on H214 or a revised forecast, after the delays. I would be really surprised if their initial forecast was being vindicated by now, given that only a relatively small part of the entire stack is using Broadwell products, the information that went down in the supply chain and the fac that this time frame would be at odds of what we could reasonably expect from tick-tock.

How I interpret that quote is that Intel expected the BDW-U adoption would be less than it actually was in Q1, when they launched it at CES.

 

[mrmt]

How I interpret that quote is that Intel expected the BDW-U adoption would be less than it actually was in Q1, when they launched it at CES.

So your comment doesn't apply to what you replied me.

What BK said is "We screwed up our original roadmap but we are a bit above our post-screw-up projections".

What I said is that by the time they were making forecasts for 14nm, circa Q413/Q114, they didn't expect it to ramp up so slow, to the point that 9 months after the projected forecasts 14nm is still a no-go for most of the product stack, and that really should impact how much capacity Intel will need on their 14nm node, especially if they don't want their 10nm to slip much further than needed to solve the technical problems they are facing.

 

[krumme]

According to BK, 14nm ramp was going a bit faster than expected.

Witch means what?

 

[witeken]

Witch means what?

Nothing.

 

[krumme]

How I interpret that quote is that Intel expected the BDW-U adoption would be less than it actually was in Q1, when they launched it at CES.

So what? Everyone can sandbag at the right time. Its still less products for what seems less consumers. But i wouldnt take his word for face value. Go look facts in retail and look at capex numbers. They match. The words dont. Fortunately one can say its that way - it just shows its well managed imo - with a bit pr/marketing topping

 

[Fjodor2001]

Broadwell/Skylake Refresh up next? :|

Or what will they fill the gap with? Seems like we're either looking at a new Tick-Refresh-Tock model, or that the old Tick-Tock clock is ticking slower these days...

 

[mrmt]

Broadwell/Skylake Refresh up next? :|

Or what will they fill the gap with? Seems like we're either looking at a new Tick-Refresh-Tock model, or that the old Tick-Tock clock is ticking slower these days...

I think Broadwell is pretty much dead by now.

 

[Unoid]

Any new word on implementation of 450mm rounds? You'd think any future process would use 450mm as the basis.

 

[Fjodor2001]

I think Broadwell is pretty much dead by now.

So Skylake Refresh then, before the delayed Cannonlake / 10 nm?

 

[mrmt]

So Skylake Refresh then, before the delayed Cannonlake / 10 nm?

Probably, but not because of any new release strategy, more because Intel is showing even less confidence in their 10nm node than they were with 14nm and that smells big trouble.

This whole "we won't talk about future nodes until later time" is BS. Intel is trying to become an open foundry, if they are really serious about it they should be telling world + dog how powerful their 10nm node is and assuring everyone that it is on time, otherwise these customers Intel is trying to attract to their factories will stay with TSMC or Samsung.

 

[Fjodor2001]

Probably, but not because of any new release strategy, more because Intel is showing even less confidence in their 10nm node than they were with 14nm and that smells big trouble.

This whole "we won't talk about future nodes until later time" is BS. Intel is trying to become an open foundry, if they are really serious about it they should be telling world + dog how powerful their 10nm node is and assuring everyone that it is on time, otherwise these customers Intel is trying to attract to their factories will stay with TSMC or Samsung.

Agreed. But don't you think that's because they got burned by the 14 nm delays? I.e. better for Intel management to not say anything in detail about 10 nm, so they can't be held responsible if they do not deliver according to promise?

 

[Phynaz]

Probably, but not because of any new release strategy, more because Intel is showing even less confidence in their 10nm node than they were with 14nm and that smells big trouble.

This whole "we won't talk about future nodes until later time" is BS. Intel is trying to become an open foundry, if they are really serious about it they should be telling world + dog how powerful their 10nm node is and assuring everyone that it is on time, otherwise these customers Intel is trying to attract to their factories will stay with TSMC or Samsung.

The world and dog aren't foundry customers. Anybody who is a potential foundry customer isn't relying on publicly available information to make billion dollar decisions.

 

[jpiniero]

So Skylake Refresh then, before the delayed Cannonlake / 10 nm?

Desktop is definitely going to Skylake Refresh and may not get Cannonlake at all. I do wonder if this would also apply to the H models as well.

 

[mrmt]

Agreed. But don't you think that's because they got burned by the 14 nm delays? I.e. better for Intel management to not say anything in detail about 10 nm, so they can't be held responsible if they do not deliver according to promise?

Not at all. Where they the closed IDM of always then yes, it would make sense to keep mum about what R&D path they were pursuing. But once they become an open foundry, e.g., they have to sell the process node to IHVs on the market, they should want their process node to appear to every relevant part under the best possible light.

The world and dog aren't foundry customers. Anybody who is a potential foundry customer isn't relying on publicly available information to make billion dollar decisions.

This kind of info leaks, and so far there's nothing good coming out of Intel 10nm process.

 

[Phynaz]

Intel is very good at controlling leaks. Look at fin fet for example, nobody had any word it was coming. The world found out the day the products were announced.

 

[mrmt]

Intel is very good at controlling leaks. Look at fin fet for example, nobody had any word it was coming. The world found out the day the products were announced.

Intel wasn't an open foundry by the time they were developing finfets, all the deals they pursued were small, or centered in lagging edge nodes, or both. Today by becoming an open foundry, and in effect opening its bleeding edge nodes to other IHVs on the market, their behavior should look a lot more TSMC.

 

[Phynaz]

Why does Intel have to behave like TSMC? How does TSMC behave?

 

[ShintaiDK]

Desktop is definitely going to Skylake Refresh and may not get Cannonlake at all. I do wonder if this would also apply to the H models as well.

Desktop never expected Cannonlake. But rather a direct go to Icelake

 

[Ajay]

Desktop never expected Cannonlake. But rather a direct go to Icelake

So next 10nm desktop CPU will be out ~2.5 years after Skylake? And these will have some sort of BGA style package - so no more sockets, IIRC. This is going to get strange.