Originally posted by: BenSkywalker
I would say that is an utterly horrific inaccuracy.
It is, if you pull it out of context.
My point was that DX11 doesn't really allow you to take advantage of Larrabee's x86-architecture (which is how I interpreted the statement I responded to).
Compute shaders may be new to DX11, but they are supported on current DX10 hardware, so there's no x86-benefit to it.
DX11 is not the DX that will allow you to run Larrabee-specific code for great justice.
Originally posted by: BenSkywalker
Larrabee isn't going up against current nV GPUs, they are going up against MIMD based nV GPUs so it isn't a very fair comparison.
Well, we'll have to see about that. nVidia's current midrange is based on the G92 chip, not on the GT200. If it stays like that, then when G300 comes out, (a 40 nm version of?) the GT200 may be the midrange part at the time Larrabee comes out.
Originally posted by: BenSkywalker
What are they going to use, about 60-100MB of on die cache? They will either need to do that or have monsterours bandwidth, data passing from the tesselator to the 'bin' then back to the chip for surface viz check, very messy way of dealing with rendering under D3D11.
You'll have to read the article that Michael Abrash wrote about the rasterizer recently. It will at least give you SOME insight in how the binning and rasterizing is done.
My remark however was not related to binning, since I think they got that 'solved' nicely, judging by what Abrash wrote. My remark was related to how a tile will fit in the cache, giving you really good z/stencil and blending performance.
Originally posted by: BenSkywalker
TBRs problem has always been it doesn't deal with large amounts of geometry well
As far as I know, there's never been a TBR with specific hardware to handle geometry.
All TBR devices I know of, were limited to CPU T&L, and as such the CPU also had to take care of most of the sorting/binning tasks.
Larrabee will do all this on-chip, with a parallel approach, so it scales much better to large amounts of geometry. Again, I'll have to refer to Michael Abrash's article for more details.
Originally posted by: BenSkywalker
Without a pixel pipeline they are going to need to be significantly more powerful then nV or ATi to compete.
What exactly do you mean with a 'pixel pipeline' in this case, and what is it that makes it so important to you?
The Abrash article gave a nice explanation of how they prepare the masks for the SIMD units so they can render 4x4 blocks of pixels much like how nVidia and ATi do it.
So I don't really see a big difference there.
I think the main question will be: is Intel's SIMD solution going to be as good or better than the nVidia and ATi units?
I really don't think it's going to be bottlenecked by rasterization much. This is ofcourse assuming the actual pixelshading is nontrivial, so some of the latency/overhead of Intel's approach can be hidden. But with a shader-heavy game like Crysis, that should be no problem.