Torn Mind
Lifer
Yep :thumbsup:
They could instead have segmented it with something like 128bit cache only for Celerons/Pentiums. And 256bit on i3/i5/i7.
It's price discrimination(I think 3rd degree). Probably to induce one more upgrade cycle from the buyers who do eventually figure out they need to go bigger(as in $120) to get fuller-featured chips. I suppose they thought that even a limited implementation would reduce the amount of people who upgrade their chips just to get AVX or AVX2 support.