Freescale develops GaAs MOSFETs

[Acanthus]

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This is certainly great news, while enormous amounts of research would have to be poured into this material to get a real working CPU, this material could help get by the clock walls of Silicon designs.

This is what i want to do when i get out of school

 

[hjo3]

Text?

 

[Acanthus]

Originally posted by: hjo3
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Not really a super technical article, it explains in detail what it means.

 

[WhoBeDaPlaya]

Nice, but GaAs is still more expensive, not to mention you definitely will not like arsine
I don't know how IBM has been doing with their SiGe technology.

 

[Acanthus]

Originally posted by: WhoBeDaPlaya
Nice, but GaAs is still more expensive, not to mention you definitely will not like arsine
I don't know how IBM has been doing with their SiGe technology.

Yeah i know, those enormous material costs they have now are pretty intense, that 75 cents worth of silicon (yeah i understand the R&D costs are enormous and have to be recouped, but complaining about material costs on something the size of a nickel doesnt really compel me to feel bad)

 

[Acanthus]

wheres pm on the subject!?

I wanted to hear some real input on if the gains predicted are actually realistic, or if there are outlying issues they didnt bother to mention in this article. With 20x the number of electrons moving through the substrate i could see thermals and leakage being very serious limitations.

 

[mchammer]

I think we're talking 10+ year timeframe on stuff like this.

 

[JRich]

I'll let you know when Freescale CHD-FAB starts pumping them out

 

[Rumpltzer]

Compound Semiconductor article on same thing (also not very technical)

Note the last couple of paragraphs of the article:

The Motorola spin-off says that it now plans to work in collaboration with other companies to create products that use the high-speed computing performance that GaAs MOSFETs would allow.

Back in 2001, Motorola announced to similar fanfare that it had developed GaAs-on-silicon wafers, which also promised to revolutionize microelectronics (see related story). Motorola even formed a spin-off company to exploit that technology, but the initial optimism proved groundless as problems with defects saw the hybrid approach shelved.


I remember the cover of CS where they had those two guys holding an 8-inch GaAs-on-silicon wafer. Not as embarassing as cold-fusion, but I think these guys need to show some real results in peer-reviewed journals before taking their exploits to the press.

And BTW, I'm not talking about Applied Physics Letters (yeah, I'm talking to you UIUC)! I want something in an IEEE publication where it's going to be reviewed by engineers in a related field and not physics geeks! :|

 

[Acanthus]

Originally posted by: mchammer
I think we're talking 10+ year timeframe on stuff like this.

Its definately going to be a long time until we move away from silicon, unless a major company with an enormous amount of funding in R&D (Intel/IBM) makes a breakthrough.

It certainly could bring moores law back from the dead.

 

[erub]

I met Karl Johnson last summer when I interned at Freescale last summer in Tempe, AZ, he gave a presentation to us interns..nice guy and pretty darn smart

 

[Acanthus]

bump, hopefully some of our members who work in the industry can comment

 

[Mr.IncrediblyBored]

You might want to send a pm to pm D) if you want him to respond. I think he spends most of his time in Highly Technical and CPU/Processors.

 

[kcthomas]

is this going to be used for cpu's? i thought it was more for making high broadband wireless stuff

 

[Goosemaster]

cool.

 

[Acanthus]

Originally posted by: kcthomas
is this going to be used for cpu's? i thought it was more for making high broadband wireless stuff

It very well could be, although there were no references to that in the article, i know different types of transistors can have comletely different functions.

 

[Chaotic42]

Gallium pisses me off. Always talking about how cool it is that it can be liquid at room temperature and how it looooves being in the p-block.

I could have been in the p-block, damnit.

 

[Fenixgoon]

Originally posted by: Chaotic42
Gallium pisses me off. Always talking about how cool it is that it can be liquid at room temperature and how it looooves being in the p-block.

I could have been in the p-block, damnit.

im in the F block, boo ya

i take it you are in the s block? sucker

 

[pm]

Off-topic? Move it to the Highly Technical forum.

GaAs, or gallium arsenide MOSFETs are said to conduct electrons up to 20 times faster than traditional silicon MOSFETs.

Really? Who says this? What kind of scientific language is "are said to" anyway? Either they do or they don't. In any case, based on my knowledge, GaAs is better than Si, but it's nowhere near this much better.

There are a lot of ways to measure conduction - but one of the more fundamental ways is to look at elecron mobilities in the channel of NFET's. Mobility varies based on doping concentration and temperature, process technology and other things... but using round numbers and a like "~" symbol to indicate uncertainty.

Typical NMOS electron mobilities:
GaAs ~8100 cm2/(V·s) (at 300K typical doping)
Si ~1450 cm2/(V-s) (at 300K, 90nm silicon)
~1800 cm2/(V-s) (at 300K, 90nm, strained silicon)

(for links.. google "silicon electron mobility", and "gaas electron mobility", follow the links and then average the answers you get but make sure they are at 300K)

So this is about 550% better - not 20x. And the ratio gets worse once you add strained silicon into the mix. But, nMOSFETs are only half the story - real CPU's use CMOS which requires two flavors of transistors, NFETs and PFETs.

Typical PMOS hole mobilities:
GaAs ~400 cm2/(V-s) (at 300K, typical doping)
Si ~550 cm2/(V-s) (at 300K, 90nm)
Si ~640 cm2/(V-s) (at 300K, 90nm strained silicon)

(again, if you doubt these values, google is your friend)

So if we are talking NFET's then GaAs is ahead of silicon by a reasonable amount - 500%, but if you factor in that about half the FETs on a modern CPU/GPU are PFETs, which are a fair bit slower on GaAs, the equation gets a lot more confusing.

The biggest problem with GaAs, however, has nothing to do with it's superiority over silicon in moving electrons around (while ignoring the problem with holes), but is cost. The only company to ever try to mass produce a large scale CPU based on GaAs was Cray sometime about 15-20 years ago, and this played some role in pretty much bankrupting the company. GaAs yields aren't great, fab costs are high, substrate costs are high, leakage is high. It's not a perfect technology. Plus lithography is quite a bit harder meaning that we are at 65nm on silicon and GaAs is somewhere behind silicon... 130nm? Somewhere back there... so die costs are higher too.

It sounds like Freescale think that they have a solution for the yield problem, but from my perspective, the problems run deeper than that - particularly for CPUs - and I don't think that this effort is likely to be successful in the mass market. GaAs is awesome for space applications and other applications where the material advantages outweigh the cost of them, but in the mass consumer market, we will be with silicon for at least the next decade.

 

[Passions]

Originally posted by: Chaotic42
Gallium pisses me off. Always talking about how cool it is that it can be liquid at room temperature and how it looooves being in the p-block.

I could have been in the p-block, damnit.

rofl...that was pretty funny.

 

[ElFenix]

i thought cell phones were already using gallium arsenide?

 

[Rumpltzer]

Originally posted by: ElFenix
i thought cell phones were already using gallium arsenide?

They do. Cell phone power amplifiers are typically made of compound semiconductors. Look up RF Microdevices (RFMD). They are in the business of PAs, and they had a great quarterly report last week. Compound semiconductor ICs have been on the run in the past five years or so as SiGe has really ramped up device speed. Pair that with the low-parasitic silicon interconnect capability, and it's a real threat... but physics will limit silicon device speeds.

As for pm's comments, they should be taken with as much skepticism as Freescale's report. Anyone who waves around mobility numbers and then throws out the phrase "typical doping" has gotta be out of his mind. Typical doping of what??

I'm also very confused about when SI GaAs substrates became leaky. In a discussion about GaAs and silicon, it shouldn't be the silicon guy who has anything to say about substrate leakage! Silicon has such a problem that they've now moved CMOS to SOI substrates.

Also, litho is no more difficult in GaAs FETs than in silicon. First, silicon has about a 25-year head-start on GaAs. Second, silicon has insanely scaled their device technology to maintain the speed, interconnect parasitic, and power requirements of making multi-million transistor circuits. There's nothing inherent to lithography the prevents GaAs from using it. It's more that the device technology is so immature that g- and i-line litho is all that's really needed for the applications that GaAs perform. (BTW, I'm excluding compound semiconductor gate litho by e-beam from this discussion because it's a whole different can of worms.)

Si-based transistors need to be scaled because the material properties of silicon are lacking. By making the device small, transit times, parasitics, and power requirements are so reduced that they can run as fast as they do.

Compound semiconductor devices are huge compared to silicon devices. GaAs and InP device footprints are measured in microns (maybe tens of microns) where silicon is less than a micron. However, put a GaAs or InP-based transistor up against a Si-based transistor, and the compound semiconductor device will always win. The material is just that much better. Compound semiconductors haven't yet gone to silicon-types of aggressive scaling to get to the speeds they get to. It's all in the material.

I agree that talk about compound semiconductor CPUs shouldn't be happening in this decade (maybe not in this generation). This planet is made of silicon, and the materials cost argument will never be beat. Also, even if Freescale has come up with a low-defect oxide, someone still needs to come up with a complementary (the "C" in CMOS) transistor scheme while maintaining the advantage of an epitaxial-defined channel. It'll be amazing when it happens, but I doubt it'll be trivial.

The other huge, huge problem in making a CPU-sized circuit is that the interconnect parasitics certainly dictate the speed of the circuit. In this case silicon wins because the devices are so aggressively scaled, and the fabrication of silicon circuits has had a 25-year head start. Compound semiconductor devices are huge in size, and the fab technology is immature... it's mind-boggling how far behind CS fabs are to silicon...

We shouldn't be talking about GaAs CPUs. Heck, why bother with GaAs at all? DARPA is pushing scaled InP technologies over GaAs and SiGe.

We could also talk about InP-based DDS ICs. HRL made a pretty nice one last year.

BTW, there's nothing "highly technical" in anything that I just said.

 

[Acanthus]

Originally posted by: pm
Off-topic? Move it to the Highly Technical forum.

GaAs, or gallium arsenide MOSFETs are said to conduct electrons up to 20 times faster than traditional silicon MOSFETs.

Really? Who says this? What kind of scientific language is "are said to" anyway? Either they do or they don't. In any case, based on my knowledge, GaAs is better than Si, but it's nowhere near this much better.

There are a lot of ways to measure conduction - but one of the more fundamental ways is to look at elecron mobilities in the channel of NFET's. Mobility varies based on doping concentration and temperature, process technology and other things... but using round numbers and a like "~" symbol to indicate uncertainty.

Typical NMOS electron mobilities:
GaAs ~8100 cm2/(V·s) (at 300K typical doping)
Si ~1450 cm2/(V-s) (at 300K, 90nm silicon)
~1800 cm2/(V-s) (at 300K, 90nm, strained silicon)

(for links.. google "silicon electron mobility", and "gaas electron mobility", follow the links and then average the answers you get but make sure they are at 300K)

So this is about 550% better - not 20x. And the ratio gets worse once you add strained silicon into the mix. But, nMOSFETs are only half the story - real CPU's use CMOS which requires two flavors of transistors, NFETs and PFETs.

Typical PMOS hole mobilities:
GaAs ~400 cm2/(V-s) (at 300K, typical doping)
Si ~550 cm2/(V-s) (at 300K, 90nm)
Si ~640 cm2/(V-s) (at 300K, 90nm strained silicon)

(again, if you doubt these values, google is your friend)

So if we are talking NFET's then GaAs is ahead of silicon by a reasonable amount - 500%, but if you factor in that about half the FETs on a modern CPU/GPU are PFETs, which are a fair bit slower on GaAs, the equation gets a lot more confusing.

The biggest problem with GaAs, however, has nothing to do with it's superiority over silicon in moving electrons around (while ignoring the problem with holes), but is cost. The only company to ever try to mass produce a large scale CPU based on GaAs was Cray sometime about 15-20 years ago, and this played some role in pretty much bankrupting the company. GaAs yields aren't great, fab costs are high, substrate costs are high, leakage is high. It's not a perfect technology. Plus lithography is quite a bit harder meaning that we are at 65nm on silicon and GaAs is somewhere behind silicon... 130nm? Somewhere back there... so die costs are higher too.

It sounds like Freescale think that they have a solution for the yield problem, but from my perspective, the problems run deeper than that - particularly for CPUs - and I don't think that this effort is likely to be successful in the mass market. GaAs is awesome for space applications and other applications where the material advantages outweigh the cost of them, but in the mass consumer market, we will be with silicon for at least the next decade.

But are the current limitations of GaAs feasability due to a lack of research? Could the shortcomings be far surpassed by actually catching up in process technology and refining the technology to play to the advantages of a completely different substance?

 

[pm]

Originally posted by: Rumpltzer

Originally posted by: ElFenix
i thought cell phones were already using gallium arsenide?

They do. Cell phone power amplifiers are typically made of compound semiconductors. Look up RF Microdevices (RFMD). They are in the business of PAs, and they had a great quarterly report last week. Compound semiconductor ICs have been on the run in the past five years or so as SiGe has really ramped up device speed. Pair that with the low-parasitic silicon interconnect capability, and it's a real threat... but physics will limit silicon device speeds.

As for pm's comments, they should be taken with as much skepticism as Freescale's report. Anyone who waves around mobility numbers and then throws out the phrase "typical doping" has gotta be out of his mind. Typical doping of what??

Typical doping of common MESFET devices that I found through Google - as I indicated. The silicon numbers are from 90nm devices and rounded. I may be off by a bit - but I don't believe that I'm off substantially. I said the numbers were approximate. And then indicated that they were approximate by using the symbol "~" to indicate that they were not precise. You disagree with the numbers?

After reading your comments, I did some more searches and found that the numbers that I posted above are consistent with literature. The numbers in my edition of Sze "Physics of Semiconductor Devices" are within 5%. The numbers on the Wikipedia entry for "transistor" (link here)are also very close:

Wikipedia lists Silicon at 1400 and 500 (electron vs. hole). But presumably doesn't take into account strained silicon increases (since those are commonly quoted numbers for silicon and strained silicon improves them by 10-20%). They list GaAs as 8500 and 500. Again, very close to what I posted above.

The dependence on doping density vs. mobility is not very strong until very high doping levels are reached. I figured with the word "typical" that I was saying that we were in the flatline region of the dopant vs. mobility. I checked this again in Sze after reading your comments, and I still believe that I am correct in using the word typical.

I'm also very confused about when SI GaAs substrates became leaky. In a discussion about GaAs and silicon, it shouldn't be the silicon guy who has anything to say about substrate leakage! Silicon has such a problem that they've now moved CMOS to SOI substrates.

Very few companies have moved to SOI substrates. In fact, of the top 10 worldwide semiconductor vendors (by revenue from gartner), not a single one has switched a significant portion of their product line to SOI (IBM and AMD are not in the top 10).

But in any case, I wasn't referring to substrate leakage, but to Ioff leakage. I was using GaAs DCFL for reference and was referring to a couple of papers that I recall reading regarding the difficulties regarding implementation large SRAM arrays in GaAs due to leakage and that you ended up in a power vs. area trade-off (make them small and they leak a lot, make them big and you can't pack as many in). Perhaps CMOS MOSFETs don't suffer from the DCFL limitations? But I don't recall anybody proposing CMOS in GaAs due to high u(n)/u(p) ratio.

Also, litho is no more difficult in GaAs FETs than in silicon.

I was under the impression that the GaAs MOSFET/MESFET devices were not self-aligned processes. This would mean that mask alignment across steps would be far more critical - which would make scaling more difficult as well. If I am mistaken in this, I stand corrected.

Compound semiconductor devices are huge compared to silicon devices. GaAs and InP device footprints are measured in microns (maybe tens of microns) where silicon is less than a micron. However, put a GaAs or InP-based transistor up against a Si-based transistor, and the compound semiconductor device will always win. The material is just that much better. Compound semiconductors haven't yet gone to silicon-types of aggressive scaling to get to the speeds they get to.

I do not dispute that compound materials are better - the question is, how much better. The original article cites "20x" better. I disagree with that statement but don't dispute that compound materials, but specifically GaAs have generally better material properties.

Originally posted by: Acanthus
But are the current limitations of GaAs feasability due to a lack of research? Could the shortcomings be far surpassed by actually catching up in process technology and refining the technology to play to the advantages of a completely different substance?

I am not an expert on GaAs, but it's my understand that, as Rumpltzer pointed out, the industry focuses on silicon almost exclusively (if you look at a ratio of money spent on R&D for silicon vs. GaAs) because it's cheap and, relatively, easy. GaAs has decent use in MESFETs for power applications, including the output stage of wireless devices. But Freescale is talking about GaAs logic/digital devices and GaAs logic has had several niches that it has been successful in - particularly in space applications, military, and other cost-insensitive areas. As we start to approach the end of silicon scaling - money has started to move into GaAs (and other compound semiconductors) research as a possible replacement for silicon. The primary limitation associated with GaAs is cost. But many of the limitations could be overcome if enough R&D were to be thrown at it. Inherently it's a more costly material though.

 

[Acanthus]

So it would become more feasible if the costs came down, which with tremendous amounts of R&D would likely occur.

It makes sense that costs would be enormous at this point, just tossing R&D costs out the window and looking at the equipment costs for fab parts that are not mainstream has to be tremendous. On top of that you have a completely new fab process and low yeilds on a more expensive material. Is GaAs as a material really all that expensive though? Silicon is rediculously cheap.