Deneb launch dates

[Quizard]

Originally posted by: RaptureMe
hope the 940/945 are nice and cheap I would really like to get my hands on one of these for a HTPC and maybe some oc'ing..but apr-jun dang might have to get another C2Q I hate waiting seeing on how I thought they were releasing them between now and jan??

It will be cheap for me..I won mine

 

[SickBeast]

Originally posted by: Quizard

Originally posted by: RaptureMe
hope the 940/945 are nice and cheap I would really like to get my hands on one of these for a HTPC and maybe some oc'ing..but apr-jun dang might have to get another C2Q I hate waiting seeing on how I thought they were releasing them between now and jan??

It will be cheap for me..I won mine

Can you install and benchmark that thing already!? :roll:

:beer:

 

[Martimus]

Originally posted by: RaptureMe
hope the 940/945 are nice and cheap I would really like to get my hands on one of these for a HTPC and maybe some oc'ing..but apr-jun dang might have to get another C2Q I hate waiting seeing on how I thought they were releasing them between now and jan??

The dates are in the original post. The Phenom II 920 and 940 are being released on January 8th. The AM3 parts are being released later. The 945 is being released later than the rest of the AM3 CPU's in April.

 

[Quizard]

Originally posted by: SickBeast

Originally posted by: Quizard

Originally posted by: RaptureMe
hope the 940/945 are nice and cheap I would really like to get my hands on one of these for a HTPC and maybe some oc'ing..but apr-jun dang might have to get another C2Q I hate waiting seeing on how I thought they were releasing them between now and jan??

It will be cheap for me..I won mine

Can you install and benchmark that thing already!? :roll:

:beer:

The day I get it I will

 

[RaptureMe]

How the hell did you manage to win one and where cause i want one you lucky son of a gun you...

 

[Quizard]

Originally posted by: RaptureMe
How the hell did you manage to win one and where cause i want one you lucky son of a gun you...

AMD held a Dragon Event in Chicago, Boston, and San Fransisco and I got invited to the one in Chicago and every1 there one a prize whether it be a 4870X2 or 4850 , Killer NIC, or Phenom II. There was contest to guess what you think they can OC the PII to and I guessed right and won a PII 940(at undetermined speed so it will be a faster stock than the normal 940)

 

[DrMrLordX]

Originally posted by: Idontcare

I have not seen any benches on DDR3 parts for Deneb, but it seems like one could determiner the relative magnitude of the DDR2 -> DDR3 transition by generating some DDR2 bandwidth scaling vs. performance data and then extrapolating the performance results one would get were the AM2+ DDR2 systems scaled in bandwidth to the levels expected for a DDR3 AM3 system.

You can bet the memory guys are praying to all the gods of marketing that there is something other than a 1-2% performance increase between AM2+ and AM3. The last thing they want is the consumer not feeling like their DDR3 purchase was worth the premium over DDR2.

I don't know if a bandwidth scaling test would provide us with accurate data. As heyheybooboo pointed out, the greatest gains from a change in memory architecture from DDR2 to DDR3 on deneb will probably be from higher NB speeds, especially when it comes to memory latency reduction. I can think of few instances since k8 launched that AMD processors have been starved for bandwidth.

 

[Idontcare]

Originally posted by: DrMrLordX

Originally posted by: Idontcare

I have not seen any benches on DDR3 parts for Deneb, but it seems like one could determiner the relative magnitude of the DDR2 -> DDR3 transition by generating some DDR2 bandwidth scaling vs. performance data and then extrapolating the performance results one would get were the AM2+ DDR2 systems scaled in bandwidth to the levels expected for a DDR3 AM3 system.

You can bet the memory guys are praying to all the gods of marketing that there is something other than a 1-2% performance increase between AM2+ and AM3. The last thing they want is the consumer not feeling like their DDR3 purchase was worth the premium over DDR2.

I don't know if a bandwidth scaling test would provide us with accurate data. As heyheybooboo pointed out, the greatest gains from a change in memory architecture from DDR2 to DDR3 on deneb will probably be from higher NB speeds, especially when it comes to memory latency reduction. I can think of few instances since k8 launched that AMD processors have been starved for bandwidth.

Scaling works in both directions, if scaling the NB from 2200MHz to 1200MHz and/or DDR2-800 to DDR2-400 does not produce a decidedly obvious decrease in performance then it is acceptable to expect a NB increase to 3GHz and ram increase to DDR3-1333 to produce an equally lackluster improvement in performance. Likewise with latency.

One is not proof of the other, bandwidth saturation is a real issue, but you cannot have one without the other. You can have an improvement in going from 1200 to 2200MHz NB while not having an improvement in going from 2200 to 3000MHz (as NB bandwidth stopped being the bottleneck at some point in the process) but you cannot have an improvement in going from 2200 to 3000MHz while not having an improvement in going from 1200 to 2200MHz.

IMO this much is self-evident so I didn't elaborate on it in my post. But if we really wanted an early insight into how much performance gain we ought to accept ourselves to expect then these are the simple tests to run.

 

[Bman123]

I hope amd does good this round.They got smashed by the core 2 duo last time in performance.Amd is good tho for low cost pc building.

As long as amd does good then it will be good for all the users.Amd needs the money anyways.

 

[DrMrLordX]

Originally posted by: Idontcare

Scaling works in both directions, if scaling the NB from 2200MHz to 1200MHz and/or DDR2-800 to DDR2-400 does not produce a decidedly obvious decrease in performance then it is acceptable to expect a NB increase to 3GHz and ram increase to DDR3-1333 to produce an equally lackluster improvement in performance. Likewise with latency.

Eh, well yes and no. It's quite possible for a PC platform to see an improvement from reduced memory latency in a scenario in which optimal bandwidth has been provided. If a processor's cores are fully loaded on a particular application and it can require X amount of memory throughput under that scenario, providing the processor with 2X or 3X bandwidth will do it no good, at least while running that application. Latency, on the other hand, will always help to a certain degree because the processor always has to wait for the read or write function it has issued to be completed based on whether or not it is writing to/reading from cache or system memory (of course processor design can mitigate or even eliminate the effects of stalling on actual processor performance). Obviously the application makes quite a bit of difference here since that will determine whether or not most (or all) of the working set will fit into cache (rendering system memory latency and bandwidth mostly irrelevant) and how much raw throughput it will require to/from the system memory.

From a pragmatic point-of-view, it would seem to be very difficult to conceive of situations in which the memory bandwidth on a K10 (or K8) platform could be increased at a given CPU clock without improving memory latency, though I believe this can be done, at least on a K8 system, by messing with memory timings and memory multipliers. It would take some time and some Sandra benchmarking but I think I could do this on my AM2 K8 machine. K10 systems are more complicated thanks to the NB.

So I guess my points are:

A). It should be possible to increase memory bandwidth on a K10 system without reducing memory latency (in cycles).
B). It should be possible to improve the performance of certain applications by reducing memory latency in a scenario in which the processor's memory bandwidth requirements have been met or exceeded even under load. SuperPi is an excellent example of such an application.

Whether or not any of those theoretical situations have any bearing on "real-world" operating conditions in which Deneb chips will be running is an entirely different matter.

One is not proof of the other, bandwidth saturation is a real issue, but you cannot have one without the other. You can have an improvement in going from 1200 to 2200MHz NB while not having an improvement in going from 2200 to 3000MHz (as NB bandwidth stopped being the bottleneck at some point in the process) but you cannot have an improvement in going from 2200 to 3000MHz while not having an improvement in going from 1200 to 2200MHz.

I was thinking more about memory bandwidth and latency than NB bandwidth. Obviously the amount of bandwidth between the NB and the cores will put a limit on how much memory bandwidth there can be (and NB latency will put a hard floor below which memory latency can not be reduced). The only reason I brought up NB speed at all is that, thanks to the asynchronous IMC on K10 platforms, it limits memory latency and bandwidth are dependent on the NB.

IMO this much is self-evident so I didn't elaborate on it in my post. But if we really wanted an early insight into how much performance gain we ought to accept ourselves to expect then these are the simple tests to run.

I think we may be looking at this from different angles. If a bandwidth-scaling test was performed in which bandwidth on a DDR2 Deneb system was set to match the expected bandwidth on a DDR3 Deneb system without also matching latency, we may get a skewed picture based on whether the test systems latency was better or worse than that which should be expected on a DDR3 Deneb system. In fact, provided that DDR2 memory is providing more than enough memory bandwidth to Deneb as-is, I would expect that the only thing that will affect Deneb's performance when moving from DDR2 to DDR3 (and to a higher stock NB speed) will be memory latency. We may see no difference at all.