Which is probably why he is asking the OP, who gives off the vibe that he knows more than what has been publicly announced...
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Which is probably why he is asking the OP, who gives off the vibe that he knows more than what has been publicly announced...
Sure, but even if possible who cares if it sucks so badly?
Its like arguing whose igp is faster when neither can get over 20 fps 720p on low.
zlatan any idea when Microsoft will release more information? Will we finally get to learn about everything next week with GDC? Supposedly some really cool stuff will be demonstrated.
destrekor
Lifer
- Nov 18, 2005
- 28,799
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He may have other information to share on that, but I have seen at least one who claims to be "in the know" mention the fact that more information will be shared at GDC, and that it may be somewhat shocking. This was in a conversation regarding current GPU support for DX12, and I believe it was mostly referencing hardware acceleration.
And on the schedules for GDC from Microsoft, AMD, and Nvidia, it does strongly hint that we will be learning much more about DX12.
Either way, it's next week, so we'll certainly find out sooner or later. I actually haven't been this "excited" for a game/electronic conference (E3, CES, etc) in quite a while. Here's to hoping that excitement is justified in the end and not let down.
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This is also unproven. I suspect GCN 1.0 will have partial support for things where it could be playable if you had a 7990, etc.
Uh oh ...
That guy doesn't seem to know about the resource binding model ...
Wow "The resource binding model"... Isn't all buddy.
This site claims that the next GCN-iteration will have conservative rasterization in hardware and the thing they call UAV should be ROV.
ROV works via the rasterizer. Apparently nVidia has an extension (NV_fragment_shader_interlock) that allows you to use beginInvocationInterlockNV() and endInvocationInterlockNV() in GLSL. We will have to see if AMD can implement this extension on their hardware.
The other interesting extension is EXT_sparse_texture2: “This new extension adds the ability to retrieve texture access residency information from GLSL, to specify minimum allocated LOD to texture fetches and to return a constant zero value for lookups into unallocated pages. It also adds support for multi-sampled textures.”
So although AMD’s GCN already supports volume textures, Maxwell is more capable (and if D3D11.3/12 requires support for all these features, then GCN may not be able to support it after all).
Intel and nVidia can force the order from threads generated by the rasterizer, guaranteeing the triangle-order from the rasterizer, and then having a sort of ‘critical section’ inside a pixel-shader to make sure that the per-pixel operations of each triangle are performed in-order as well.
If the rasterizer does not ‘know’ about ROV, then it may try to be smart and triangles might ‘overtake’ eachother. For example, say triangles 0-4 are queued on one cluster, where triangles 5-8 are queued on another… or if triangles 0, 2, 4 etc are queued on one cluster and triangles 1, 3, 5 etc are queued on another, and triangles 0, 2, 4 take longer to render than 1, 3, 5… many kinds of scenarios where triangle order can not be solved by just a critical section inside the shader.
If this is possible with GCN/Mantle, I’d like to have some detailed code explaining how to set up both the rasterizer and the pixel shaders for that. And then we can see how efficient that will be. The most naive solution would just serialize all triangles, making it extremely slow. The critical section part is what makes it very efficient, since it only slows down when there is actual overlap of pixels.
First test:
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Did you just seriously copy all this from a known anti-AMD apologist ?!
That site is just as crap as WCCFtech so no one should trust their rumors about specific hardware features of a product that's over six months away ...
ROVs do not work from the rasterizer, the guy that you copied this info from is obviously incorrect ...
The only thing that's required of those similar extensions is guaranteed primitive submission ordering when a fragment program is running. This can be done in GCN by using the GDS to synchronize the wavefronts ...
FYI, PRT can be applied to 3D textures ...
Intel and nVidia can force the order from threads generated by the rasterizer, guaranteeing the triangle-order from the rasterizer, and then having a sort of ‘critical section’ inside a pixel-shader to make sure that the per-pixel operations of each triangle are performed in-order as well.
If the rasterizer does not ‘know’ about ROV, then it may try to be smart and triangles might ‘overtake’ eachother. For example, say triangles 0-4 are queued on one cluster, where triangles 5-8 are queued on another… or if triangles 0, 2, 4 etc are queued on one cluster and triangles 1, 3, 5 etc are queued on another, and triangles 0, 2, 4 take longer to render than 1, 3, 5… many kinds of scenarios where triangle order can not be solved by just a critical section inside the shader.
If this is possible with GCN/Mantle, I’d like to have some detailed code explaining how to set up both the rasterizer and the pixel shaders for that. And then we can see how efficient that will be. The most naive solution would just serialize all triangles, making it extremely slow. The critical section part is what makes it very efficient, since it only slows down when there is actual overlap of pixels.
First test:
Way to go on proving what you don't know ...
Using a DX11.1 tool to prove whether or not a GPU supports DX12 features ...
*facepalm*
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And I'll take Southern Islands ISA documentation/developer's guide over DXviewer when it comes to telling us about hardware capabilities ...
Limited UAV count happens to be on part of Direct3D's restrictions, NOT on GCN architecture's limitations ...
This is a perfect example of why I don't want anyone BUT graphics programmers speak on these highly technical matters because nothing other than confusion comes out of it when a layman is involved ...
sebbbi confirmed it as well,
https://forum.beyond3d.com/posts/1820739/
There can be the chance that the ISA is wrong or not usable practically if he is going off by it too.
And Scali is known for his anti-AMD tirades.
https://forum.beyond3d.com/posts/1820739/
There can be the chance that the ISA is wrong or not usable practically if he is going off by it too.
And Scali is known for his anti-AMD tirades.
Where is the Maxwell SRV information?
This thread is so much confusing with clear AMD Warriors.
Clear information or go home.
Why all the Dx12 tests use one GTX 980 instead of an AMD R9?
Fermi and Kepler support DX 11.1 (Tier 1 - Directx 12)
Maxwell support DX 11.3 (Tier 3 - Directx 12)
AMD GCN support DX 11.2 (Tier 2 - Directx 12)
This thread is so much confusing with clear AMD Warriors.
Clear information or go home.
Why all the Dx12 tests use one GTX 980 instead of an AMD R9?
Fermi and Kepler support DX 11.1 (Tier 1 - Directx 12)
Maxwell support DX 11.3 (Tier 3 - Directx 12)
AMD GCN support DX 11.2 (Tier 2 - Directx 12)
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The OP is talking about DX12 tier support, dont know why Dxviewer and DX11 tier levels are relevant to the discussion. The NV white knighting has to stop.
AnandThenMan
Diamond Member
- Nov 11, 2004
- 3,991
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Are you some mouthpiece for Nvidia ?
Why don't YOU give us the evidence since your so eager to prove that 2nd gen Maxwell supports a TIER 3 resource binding model ...
The Khronos Group Filed A Trademark On "Vulkan" API
Source: http://www.phoronix.com/scan.php?page=news_item&px=Khronos-Group-Vulkan-API
Source: http://www.phoronix.com/scan.php?page=news_item&px=Khronos-Group-Vulkan-API
Because GCN works very unique in this aspect. I'm expect every architecture will work this way in the future, but now a standard code should use a geometry shader implementation. But it is possible to write a specific implementation for GCN.
The GCN revs are not so different. The base 1.0 version is also good for the most D3D12 features, and for the best binding tier.
The 1.1 version is mostly brings efficiency updates, like multi queue compute with upgraded ACEs. Also device unified addressing is a huge deal, because it will allow the kernel to view the LDS and the device memory as a single addressable space.
The 1.2 version ISA manual is under NDA, so I can't talk about what possible with Tonga. This GPU has some very interesting unannounced capabilities focused to reduce latency (good for VR).
This week at GDC. No, not everything, but the most important features.
Watch Stardock/Oxide. They will demo a really cool stuff. I don't know if they use D3D12, or the new Khronos API (which is basically Mantle), or the newest API from AMD, but it will be a very interesting stuff.
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zlatan, I just want to say I appreciate you sharing info with us. Even if some seem like they would prefer you didn't. :thumbsup:
Zlatan, regarding the GCN revisions, are these small enough to make optimizations for the whole graphics architecture easier, or does the rev changes from 1.0 to 1.1 and now to 1.2 require new optimized code?
I ask this because AMD is in the unique position to have both three itinerations of GCN in the same lineup, and having such diversity could hamper software optimization (both from the driver team and the game engine developers). Tonga Mantle performance comes to mind, it seemed pretty unconsistent comparing to the 1.1 or 1.0 offerings.
I ask this because AMD is in the unique position to have both three itinerations of GCN in the same lineup, and having such diversity could hamper software optimization (both from the driver team and the game engine developers). Tonga Mantle performance comes to mind, it seemed pretty unconsistent comparing to the 1.1 or 1.0 offerings.
Don't think so.
If you ask me I think Maxwell and GCN are Tier 2.
I want information.... and here there is nothing.
That's not what you said though; you said Maxwell is tier 3 while GCN is tier 2; someone asked you to prove Maxwell is tier or to back up your claim....you're saying something completely different now.
Its been shown Maxwell is Tier 2 while GCN is tier 3...
ShintaiDK
Lifer
- Apr 22, 2012
- 20,378
- 146
- 106
I must have missed it. Because I havent seen anything at all besides someones questionable word on it.
DX12 API is available via Windows 10. DX12 drivers are there from the 3 vendors as well. So shouldnt be that hard to show if it was the case.
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Can't prove DX12 is Mantle ✓
Can't prove glNext is Mantle ✓
Can't prove Maxwell tier 2 ✓
Can't prove GCN tier 3 ✓
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