Counting the success of Kabini & Temash

[ZGR]

I would probably buy an AMD "ultrathin" notebook if it had an SSD, great battery life, dual channel RAM, and a nice overall screen. I think if their was a premium Kabini laptop (Macbook Air-like) then I think it would sell really well; as long as the price was decent.

 

[mrmt]

Yeah I got to work on SUN's Rock (the process side of it)...it was an interesting project that basically died from project mismanagement more so than technical microarchitectural issues.

For example, we prepared a special metal-gate flow for SUN at 65nm but they didn't want to pay for it, opting instead for very hot (drive current) very leaky standard SiON gates (for cost reasons). This made their Rock chip run at low clocks unless you turned up the voltage (which then cranked up the leakage).

Do you think this was the case of penny-wise-pound foolish management, or do we fall on the cases where the economic costs don't bring correspondent economic benefits on the situation, be either for the added costs don't bring correspondent economic benefits?

In any case, I found strange that they didn't resurrect Rock concept in their future roadmaps if they could see a future for the concept. I understand that after Oracle Acquisition SUN is much more constrained to do the things they did before, but still...

In that regard the same problem befell AMD's bulldozer. Had the process (32nm) been gate-last instead of gate-first, the drive currents would have been much higher versus the leakage at any given clockspeed. Bulldozer would have looked like a champ at 4GHz with much lower leakages (Vcore would have been much lower while still hitting the same clockspeed) and in turn the chip could have been clocked higher for higher performance on the current power footprint.

I understand that Gate First was IBM's decision and nobody had really a say in the development of their process. Once IBM says it's gate first, it's gate first regardless of what the other members of the club think. But when was this decision taken? It wasn't 2010, not 2009, not 2008, maybe 2007, maybe before, correct?

If leakage was a gate first trade off, and AMD management knew well in advance that gate first would hurt a key parameter of their future chip, they ought to have brought some kind of B plan for that situation, and not proceed full steam ahead with the thing.

 

[monstercameron]

I would probably buy an AMD "ultrathin" notebook if it had an SSD, great battery life, dual channel RAM, and a nice overall screen. I think if their was a premium Kabini laptop (Macbook Air-like) then I think it would sell really well; as long as the price was decent.

the closest is the asus vivobook u38n with trinity a8-4555m

 

[guskline]

Yeah I got to work on SUN's Rock (the process side of it)...it was an interesting project that basically died from project mismanagement more so than technical microarchitectural issues.

For example, we prepared a special metal-gate flow for SUN at 65nm but they didn't want to pay for it, opting instead for very hot (drive current) very leaky standard SiON gates (for cost reasons). This made their Rock chip run at low clocks unless you turned up the voltage (which then cranked up the leakage).

Ellison was right to cancel the project because by the time he inherited it, the timeline was so bad that there was no way he could salvage a sellable product from it.

But the microarchitecture wasn't the problem, the decision making at the corporate level was the issue.

In that regard the same problem befell AMD's bulldozer. Had the process (32nm) been gate-last instead of gate-first, the drive currents would have been much higher versus the leakage at any given clockspeed. Bulldozer would have looked like a champ at 4GHz with much lower leakages (Vcore would have been much lower while still hitting the same clockspeed) and in turn the chip could have been clocked higher for higher performance on the current power footprint.

The people who designed bulldozer weren't given a voice or a vote on the executive decision to go with a gate-first integration scheme, an integration scheme that was exactly the opposite of what a bulldozer microarchitecture needed.

IDC, My dumb question but I'll ask it anyway. Could AMD reverse this with the SteamRoller by designing a gate-last process?

 

[Idontcare]

Do you think this was the case of penny-wise-pound foolish management, or do we fall on the cases where the economic costs don't bring correspondent economic benefits on the situation, be either for the added costs don't bring correspondent economic benefits?

In any case, I found strange that they didn't resurrect Rock concept in their future roadmaps if they could see a future for the concept. I understand that after Oracle Acquisition SUN is much more constrained to do the things they did before, but still...

It was a case where they failed to adequately scope the projected processor lineup for the competition (what they thought the competition would have out when Rock would be coming out) at the time they scoped the project goals of their own Rock processor.

By the time everything was baked into Rock, including the process roadmap, the competition was fielding far more capable processors than what Rock was intended to deliver. To crank up Rock's clockspeed so as to provide a compelling market justification for its existence then created a 200W monster which still lacked enough performance.

After that they no longer had access to a process node capable of doing what Rock requires. TI closed its logic fabs and told SUN to go pound sand...which meant SUN had to rely on what TSMC had to offer. (which wasn't something that was going to enable 3GHz clocks)

I understand that Gate First was IBM's decision and nobody had really a say in the development of their process. Once IBM says it's gate first, it's gate first regardless of what the other members of the club think. But when was this decision taken? It wasn't 2010, not 2009, not 2008, maybe 2007, maybe before, correct?

If leakage was a gate first trade off, and AMD management knew well in advance that gate first would hurt a key parameter of their future chip, they ought to have brought some kind of B plan for that situation, and not proceed full steam ahead with the thing.

That argument can definitely be made. Which is that regardless who at IBM or AMD decided to go gate-first, the ramifications of going gate-first should have been well comprehended and digested by the bulldozer team such that they were guiding their management's expectations appropriately for the reality of what gate-first was going to do to a bulldozer-type microarchitecture.

But I've seen how these kinds of major critical decisions get made but never really get factored into all aspects of the other divisions until it is too late. That is a reality that the higher-ups own, the one's responsible for making sure design and process are communicating.

Do you blame the Intel engineers for making Prescott, or do you blame the managers who told the engineers "go forth and make Prescott, leave it to the marketing guys to figure out how to sell it".

Someone at AMD scoped bulldozer, as directed. But someone directed his company to scope out the project, then approved it and funded it for four plus years. And in my opinion that someone rightly lost their job when first-silicon came back from the fab and reality hit the fan. (Dirk)

 

[Idontcare]

IDC, My dumb question but I'll ask it anyway. Could AMD reverse this with the SteamRoller by designing a gate-last process?

Yes.

But that doesn't mean it will still be better than what Intel is fielding because Intel hasn't stood still either.

This is AMD's conundrum. Steamroller may well be the best 28nm processor one can buy, but that doesn't mean it will best the existing 22nm (or 14nm by then) processors one can buy.

Getting to a gate-last integration scheme will at least remove one of the strikes that the bulldozer approach has going against it.

 

[NostaSeronx]

Didn't they find out Replacement Metal-Gate had a massive increase in performance in comparison to Metal Inserted Poly-Si. Making any cost comparison worthless as RMG is better for consumers than MIPS.

 

[mrmt]

That argument can definitely be made. Which is that regardless who at IBM or AMD decided to go gate-first, the ramifications of going gate-first should have been well comprehended and digested by the bulldozer team such that they were guiding their management's expectations appropriately for the reality of what gate-first was going to do to a bulldozer-type microarchitecture.

But I've seen how these kinds of major critical decisions get made but never really get factored into all aspects of the other divisions until it is too late. That is a reality that the higher-ups own, the one's responsible for making sure design and process are communicating.

I see

Thanks for the well-thought reply!

 

[Idontcare]

Didn't they find out Replacement Metal-Gate had a massive increase in performance in comparison to Metal Inserted Poly-Si. Making any cost comparison worthless as RMG is better for consumers than MIPS.

There is a layout density penalty that comes with gate-last because of the CMP dishing/erosion uniformity requirements versus that of gate-first integration.

This results in a 10% or so better areal shrink for the gate-first stuff, it will run slower but that isn't a concern for stuff that needs to run slow anyways.

However the decision to go gate-first at IBM wasn't made on the basis of it enabling higher xtor densities for lower production costs over that of gate-last integration. Rather, the decision was made because IBM was actually way way too far behind the R&D curve to get a reliable and yieldable electrically functioning gate-last integration scheme into production on a 32nm timeline.

So they went gate-first simply for time-to-market reasons, and then packaged the decision with a bunch of marketing double-speak to make it sound like it was a decision made from strength rather than admitting it was a decision made in crisis-mode management response to Intel surprising them with a 45nm functioning HKMG production node.

(I know this because quite a few people I worked with at TI up through 2007 went on to work at either IBM or AMD in their process R&D orgs)

The decision to go gate-first is sort of like going single-damascene instead of dual-damascene for the BEOL when the industry transitioned from aluminum to copper. Single-damascene was a crutch for the companies that could not master the R&D needed to implement a fully functioning (yield and reliability) dual-damascene copper back-end on a timely fashion.

But no one came out and proclaimed to their customers "you get single-damascene instead of dual-damascene because we can't figure this stuff out in a timely manner"...instead it too was packaged and sold by marketing as "enables better xtor transistor density than dual-damascene, lowering your costs!"...only that marketing line disappeared entirely once the N+1 process node rolled out because of course by then the R&D teams had had enough time to figure out dual-damascene.

I imagine very few people in this forum, and very few people in the trade journal circles, have any recollection of the era of single-damascene BEOLs (because it was a one-node crutch, and even then it was only used by a limited number of companies)...and I have every expectation that the same will hold true of gate-first in about 5-7yrs time. It too will become a blip in what is otherwise a smooth and obvious transition from gate-first SiON to gate-last HKMG integration schemes.

 

[NostaSeronx]

So, far IBM & GlobalFoundries have made a 180 degree turn on their position of gate first. Gate First is detrimental to density and performance.

Hopefully, we will get to see a Gate First vs Gate Last 28-nm FDSOI battle. Gate Last shines with FDSOI, it is surprising STMs FDSOI is Gate First.

 

[unon]

Would that also be part of the reason for the apparently very poor density of bulldozer? A 12 core 4ghz bulldozer would have done great. 45nm bd was 8c right? Also would it have been better for amd to focus on ipc given how better mobile trinity is though llano is as efficient as phenom 2.

 

[Idontcare]

Would that also be part of the reason for the apparently very poor density of bulldozer? A 12 core 4ghz bulldozer would have done great. 45nm bd was 8c right? Also would it have been better for amd to focus on ipc given how better mobile trinity is though llano is as efficient as phenom 2.

Yes it is but not in an obvious way.

Gate-first gives you less design-rule restrictions, which in turn enables you to have higher gate density...but the drive currents are less (because of less strain in the channel from being gate-first), so your clockspeeds will be lower.

To compensate you make circuits with wider transistors (planar xtors have two dimensions) to pass more total current in the circuit, this makes the circuit itself larger, which in turn makes the xtor density lower.

Here is an example of how the size of the xtors have to get bigger (in this sram cell) as you design the sram array to be able to hit higher and higher clockspeeds (using more power to do so, and using more die-space as well).

So yes bulldozer's die size is huge and the xtor density is low because GF went with gate-first, but this might seem counter-intuitive at first because GF tells everyone they get a xtor density benefit by going gate-first.

The benefit is only realizable if you don't mind your circuits clocking in at 600MHz. If you want them to clock in at 4GHz then you have to make really big (outsized compared to gate-last) circuits to compensate for the low intrinsic drive current that a gate-first process will always give you versus a gate-last process.

 

[happysmiles]

the Samsung Series 9 Lite is out here in Australia, it's light but not as light as the normal Series 9, it's definitely a beautiful machine but it costs twice as much as it's worth.

The screen is above average but still 1366x768

$1098 AUD, it doesn't say the processor anywhere even in dxdiag except the video card which is a Radeon 8350
Windows Experience Index

Processor: 4.5
Memory: 5.5
Graphics: 4.0
Gaming Graphics:5.8
HDD : 8.0



That's pretty crap if you ask me when you can get i7 laptops for that much. They're selling a Toshiba AMD A6-5200 15.6" for $700 which is a slightly better deal although it's


1366x768
5 hour rated battery life
standard size and weight.

Also there is a AMD A4-5000 Acer Notebook that's same specs as the Toshiba and beats the WEI of the Samsung for $494.

OEMs still treating AMD like crap and putting it in 2011 laptops.

I'm half expecting Sony to release a decent AMD notebook considering that AMD powers the PS4.

 

[ZGR]

the Samsung Series 9 Lite is out here in Australia, it's light but not as light as the normal Series 9, it's definitely a beautiful machine but it costs twice as much as it's worth.

The screen is above average but still 1366x768

$1098 AUD, it doesn't say the processor anywhere even in dxdiag except the video card which is an Radeon 8350
Windows Experience Index

Processor: 4.5
Memory: 5.5
Graphics: 4.0
Gaming Graphics:5.8
HDD : 8.0



That's pretty crap if you ask me when you can get i7 laptops for that much. They're selling a Toshiba AMD A6-5200 15.6" for $700 which is a better (not by much) deal although it's


1366x768
5 hour rated battery life
standard size and weight.

Also there is a AMD A4-5000 Acer Notebook that's same specs as the Toshiba and beats the WEI of the Samsung for $494.

OEMs still treating AMD like crap and putting it in 2011 laptops.

I'm half expecting Sony to release a decent AMD notebook considering that AMD powers the PS4.

That is disappointing. It seems like AMD needs to take a little bit of control and maybe help design a notebook with an OEM. It shouldn't be hard to have a decently priced notebook running on AMD. Every APU notebook I've seen is horribly overpriced, has an awful screen, terrible battery life, and poor build quality.

 

[Vesku]

Still not seeing anything in the 13-14 inch range with Kabini but looks like Lenovo will have a Kabini based 11.6" Thinkpad Edge.

Thinkpad Edge E145 - AMD E1-2500, Windows 7 Pro with free upgrade to Windows 8 Pro, 11.6" AG HD 1366 x 768 LED, AMD Radeon HD 8240 Graphics, 4GB RAM, 500GB HDD, Webcamb Bluetooth, 4-in1 card reader, 1 Year Warranty

425.57 Euro

http://www.dcbgroup.com/products/Co...145-AMD-E1-2500-Windows-7-Pro-w?prodid=294889

Could do with an A4-5000 option.

That is disappointing. It seems like AMD needs to take a little bit of control and maybe help design a notebook with an OEM. It shouldn't be hard to have a decently priced notebook running on AMD. Every APU notebook I've seen is horribly overpriced, has an awful screen, terrible battery life, and poor build quality.

There does seem to be a lot of OEM resistance to providing something other than bottom of the barrel components in their AMD offerings. The Anandtech articles on Jaguar/Kabini even mentioned that OEMs should buck the trend and consider using some of the budget saved by the low cost SoC to provide SKUs with better supporting components.

IMO the Intel raving about next gen Atoms wasn't meant for the consumer, that's PR to try to throw some cold water on AMD Jaguar design wins. "Don't waste your time designing with those Jaguar chips, you'll just want to replace them with these lovely new Atom SKUs."

 

[bullzz]

@vesku
kabini doesnt need 13-14 inch models. 11 inch models hit the sweet spot

"IMO the Intel raving about next gen Atoms wasn't meant for the consumer, that's PR to try to throw some cold water on AMD Jaguar design wins"
Companies do this all the time. OEMs should have a better knowledge of what to use in their products. AMD announced their "first 5GHz" chip when intel released haswell. that didnt stop mobo manufacturers from releasing their haswell SKUs

 

[Vesku]

13.3 inch is my preferred notebook size for toting around.

Had some time to kill near a Best Buy so I went in and checked out the Kabini units they had. The A4-5000 felt quite snappy but was only in 15.6 inch model. The Acer 11.6 inch with Temash had a nice feel for its price range and label but the display model had long boot times and the touchpad mimics, but is a bit more clunky than, Macbooks with having a physical click action.

As for "but AMD pushed out 5GHz chips and the OEMs still launched Haswell", it's AMD that has the uphill struggle for OEM support it's expected they'll do anything to get some counter press versus Intel launches. Whereas Intel's PR about a, at the time, ~4 month out product seems directly targeted at OEMs and their large volume customers "don't invest in those Jaguar designs because we'll have stuff that mops the floor with it if you just wait a bit longer."

I'm sure the lower SKU Haswells and the Baytrail line will be great APUs but they are scheduled to launch at the tail end of the US Back to School shopping season. AMD's timing with Jaguar was pretty good, shame for x86 price competition that they didn't deliver Kaveri at the same time.

 

[bullzz]

@vesku
"don't invest in those Jaguar designs because we'll have stuff that mops the floor with it if you just wait a bit longer." if you think OEMs are going to believe this, god save them. i expect bay trail to be good product but not an awesome one. kabini/temash should have a better iGPU. again, i will blame the OEMs and not intel PR

 

[VirtualLarry]

Still not seeing anything in the 13-14 inch range with Kabini but looks like Lenovo will have a Kabini based 11.6" Thinkpad Edge.

Thinkpad Edge E145 - AMD E1-2500, Windows 7 Pro with free upgrade to Windows 8 Pro, 11.6" AG HD 1366 x 768 LED, AMD Radeon HD 8240 Graphics, 4GB RAM, 500GB HDD, Webcamb Bluetooth, 4-in1 card reader, 1 Year Warranty

425.57 Euro

http://www.dcbgroup.com/products/Co...145-AMD-E1-2500-Windows-7-Pro-w?prodid=294889

Could do with an A4-5000 option.

I like that it is still available with Windows 7 (Pro). But I want a quad-core Jaguar 11.6" Laptop. Hopefully, with a 6-cell battery or larger.

http://news.softpedia.com/news/AMD-Kabini-APU-Refreshes-Lenovo-ThinkPad-Edge-Laptop-373490.shtml

Anyway, the reason Lenovo didn't bother with some sort of super APU, like the A-Series, is simple: the ThinkPad Edge E145 was never supposed to be all that mighty.

After all, it measures just 11.6 inches in screen diagonal and has a native resolution of 1366 x 768 pixels (HD). No point in including a strong APU and GPU when the LCD can't even display Full HD images.
E1-2500 being dual-core, and A4-5000 being quad-core, right?

 

[unon]

Thanks for the reply. There were rumors of and having bigger die area for higher frequency and yields in bd. llano scaled pretty much perfectly though with horrible yields.

On topic amd was going on about win 8 tablets earlier and now we have so little. No cheap ultrathins with quality screen and kabini too. I guess they'll magically start appearing at clover trail time with intel inside.

 

[Vesku]

I agree with you, VirtualLarry, trying out the 15.6" A4-5000 I was thinking this chip needs to be in 13.3 and 11.6 form factors. Based on Anandtech's A4-5000 review I don't think there would be an engineering limitation especially with the E1-2500 having the same 15W TDP.

Shame there aren't turbo bins, I bet the E1-2500 has some headroom at that TDP listing.