Discussion Could Intel packaging still give them an edge, even if they had to go to TSMC?

[NTMBK]

Obviously 10nm is a disaster, and I see no reason for 7nm to go any better. But obviously Intel has some cool tech like Foveros and EMIB. If the worst happens and Intel had to go to TSMC for post-7nm, could they use this tech to give them an edge? I don't know how tightly coupled this sort of thing is to their internal fabs.

 

[jpiniero]

I don't think it'll be too long before you will see products from AMD and nVidia using comparable tech.

 

[NostaSeronx]

Intel is more likely to buy out GlobalFoundries and get 3 more 300mm Fabs(Dresden, Malta, Singapore) and 1 300mm partially-tooled(Chengdu). Plus, the other fabs not sold... dead DRAM, dead NAND, etc.

Mubadala wants to recoup the failure as soon as possible. It is like only $15+ billion for purchasing it all.

 

[sandorski]

...like it is now?.....

 

[ThatBuzzkiller]

Probably not because the vast majority of their products already don't use their specialized packaging technology and it doesn't look like it'll change much in 2020 ...

Only Lakefield uses Foveros which is primarily targeted for smaller form factors and lower power scenarios ...

 

[DrMrLordX]

Obviously 10nm is a disaster, and I see no reason for 7nm to go any better. But obviously Intel has some cool tech like Foveros and EMIB. If the worst happens and Intel had to go to TSMC for post-7nm, could they use this tech to give them an edge? I don't know how tightly coupled this sort of thing is to their internal fabs.

A few things:

- Intel is more likely to farm out production to Samsung than TSMC, or so I've been told.
- TSMC has some of their own packaging technology. Samsung? Not sure.
- Many have said numerous times that Foveros and EMIB significantly increase the cost of products. That may also apply to some of TSMC's packaging tech.

On top of all that, do remember that Intel is closing in on having an at-least-acceptable product on 10nm in Tiger Lake; sadly, they're still restricted to low-power, 4c-and-less parts with that combination of uarch and process. If they really are going to use EMIB/Foveros in their mainline products (not just Lakefield or other niche stuff), it stands to reason that they could cobble together 8c-and-larger CPUs by just stacking some 4c dice or linking them via EMIB or . . . whatever. That may be what they wind up doing with Sapphire Rapids to overcome the problems delaying Ice Lake-SP. In other words: if Intel really is going to use Foveros/EMIB aggressively, why do they need to go to other fabs? Going to another fab might let them stick with primarily-monolithic designs, the likes of which are not presently workable on Intel 10nm.