Patience, grasshopper.Any yet, with a brand new design and an independent foundry, AMD is slightly behind in IPC for most applications, and clearly behind in clockspeed. Maybe improvements are just not that easy anymore.
Patience, grasshopper.Any yet, with a brand new design and an independent foundry, AMD is slightly behind in IPC for most applications, and clearly behind in clockspeed. Maybe improvements are just not that easy anymore.
I am not downplaying Intels huge initial lead, and no doubt we are in an era of diminishing returns.
But Intel has pretty much had no recent improvements in architecture. Has the architecture team been doing nothing in the *Lake era?
They're busy fixing 10nm.
I said architecture team. I am willing to bet they don't do double duty as the process team.
Which I noted. It's nice to get more cores, but it doesn't hide how stagnant intel has been on IPC/Process.
I'm quoting this message from the other thread, since it concerns z370.
What? The Taichi 370 has only 8 Sata ports, while the 270 had 10? wtf Asrock?
Despite this stagnation Intel still holds a sizeable ST advantage due to higher clocks and IPC, so it was never their weakness and the fact that it hasn't increased doesn't matter as much compared to them being behind in core count and falling behind in MT tasks IMO.
There is a very real question about WTF the architecture team has been doing all this time. They essentially have been running identical architecture for years.
Still different groups.
As I was saying, trying to fix 10 nm.
That's true, but this isn't a process problem per se. You need the chip basically redone.
Unless a new architecture design needs a MASSIVE increase in transistors, there is no reason they couldn't implement new architecture in 14nm, and a massive increase in transistors/core is VERY unlikely, given the mobile focus of the market.
For when Intel would have had to made the decision to say backport Icelake back to 14 nm, they were still under the impression 10 nm would be fixed in a timely fashion. I don't think you quite appreciate the lead time for this stuff.
Unlike most people, I am not viewing everything through AMD vs Intel lenses.
I am merely pointing out the stagnation which is a very real problem, it would still be a problem if there were no AMD at all.
There is a very real question about WTF the architecture team has been doing all this time. They essentially have been running identical architecture for years.
I don't see how the ST / IPC stagnation is a real problem since almost all computationally intensive tasks are already very multi-threaded. Can you name a task where a 4GHz+ 'Lake' chip bottlenecks the user experience because of limited ST performance?
But 10nm has been a long running train wreck, following issues at 14nm. There was external discussion about signs 10nm was running into issues in 2015. Since this is all internal, these ongoing failures don't come from an impenetrable vacuum. This shouldn't be some kind of total blindside for Intel. They had years since 2015 to do risk mitigation with a new 14nm architecture.
Obviously they have a new architecture in the works but it will be launched with 10nm. If there were no delays with 10nm we most likely would have got the new arch 2 years ago already.
I don't see how the ST / IPC stagnation is a real problem since almost all computationally intensive tasks are already very multi-threaded.
Can you name a task where a 4GHz+ 'Lake' chip bottlenecks the user experience because of limited ST performance? I can't think of any.
Resting on your laurels is seldom a good thing.
Stagnation is a signal that things are going wrong. You might not feel the performance effects today, but in 5 years from now when half the new Mac/Windows Laptops are running ARM CPUs, you can look back for the seeds of what went wrong, and see it in the years of Intel stagnation.
There is significant inertia in the industry, so you can have a stumble and not falter immediately, but the years of Intel stagnation may kill it's PC x86 golden goose years into the future.
Realistically. IPC improvements have come at a snails pace for the past 7 years since Sandy Bridge, and a lot of those 'IPC' improvements are actually related to increased memory bandwith from DDR4. If you limit a 8700K to DDR3 type bandwith, it actually won't be much faster than a 2011 era 3930K if both are clocked identically.
It's not about resting on your laurels though, but doing what you can (feasibly, of course, everything comes down to the bottom line) with what you have. We have no 10nm still, so again, I ask, what could Intel have done in the past couple of years? Do a refresh of the 'Lake' processors and eek out an extra percent or 3 in IPC? What good would that have done when the competition is doubling your core count with Ryzen?
Thats what I meant by Intel prioritising MT over ST performance in this CFL refresh as a good move, as a few % higher IPC won't really affect anything. A 33% increase in core count, on the other hand... Intel suddenly goes from 20% behind in MT tests to 10% ahead.
So that's it? IPC has halted on the architecture side. There no more improvements to be had from increasing the issue width of the processor. Nothing from pipeline improvements. Nor increasing parallel back-end functional units. No improvements in branch prediction or scheduling.
Nothing more can be done? This is peak architecture?
I'll agree there have been marginal architecture gains since Sandy Bridge, that was my point. Intel is just tweaking the same architecture rather than doing something substantive that might increase performance like increasing issue width, or add more parallel back end units.
I have a hard time believing there are no more significant gains to be had with better architecture.
I'll agree there have been marginal architecture gains since Sandy Bridge, that was my point. Intel is just tweaking the same architecture rather than doing something substantive that might increase performance like increasing issue width, or add more parallel back end units.
No, thats not what I'm saying. Of course there are improvements to be made - I'm saying those improvements should have come in 2016 with 10nm and a new uarch if Intel had continued with the 'tick tock' approach. Instead here we are in 2018 and still waiting on 10nm... that is the real reason for the stagnation. I'm not absolving Intel of any fault here, they clearly f*cked up on 10nm and this has a roll on effect on future products too, as you said.
I'm just saying that, increasing core count in an architecture that already has (by industry standards) high IPC / clockspeeds makes the most sense in terms of Intel's 'Plan B' to stay competitive whilst on 14nm. They were lacking in cores, not ST performance.
Can you name a task where a 4GHz+ 'Lake' chip bottlenecks the user experience because of limited ST performance? I can't think of any.