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JoeRambo

Golden Member
Jun 13, 2013
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What if I want a 2P 56 core system? Or even a single 28C workstation? Surely Platinums being capable of 8p doesn't mean that that's the only configuration they're capable of running.

And what is keeping You from it? Your original question compared Gold vs Platinum, and I answered why Platinum exists even if it's performance seem the same and is priced as-is: RAS and 8C. If all you need is 1S, you can freely stuff 28C in here, the rest of us will look into value and maybe go with 1S 20C or 2s 16C or whatever is required?
 

epsilon84

Golden Member
Aug 29, 2010
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So 12% from IPC and 25% from clock advantage is final word in ST performance? Sounds fine to me. 40% is not too shabby of advantage.

I think this is about as close as we will get to consensus regarding IPC/ST performance. Not sure why it took so long to figure out, it was obvious looking at single threaded benchmarks that the ST gulf was quite significant. Hopefully we can get this thread back on track now. Anyone want some Coffee? ;)
 

tamz_msc

Diamond Member
Jan 5, 2017
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And what is keeping You from it? Your original question compared Gold vs Platinum, and I answered why Platinum exists even if it's performance seem the same and is priced as-is: RAS and 8C. If all you need is 1S, you can freely stuff 28C in here, the rest of us will look into value and maybe go with 1S 20C or 2s 16C or whatever is required?
So what's better value - 18C Gold @3.7GHz all cores, or 24C Platinum @2.8GHz all cores?

Also, if according to you, cache, TDP, clocks, platform, multi-socket scalability, etc. are all reasons why frequency*core count isn't a good indicator of MT performance, then why is just a simple 40%(IPC+clock) increase an absolutely valid indicator of ST performance?
 
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JoeRambo

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Jun 13, 2013
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So what's better value - 18C Gold @3.7GHz all cores, or 24C Platinum @2.8GHz all cores?

Nice try. And the answer is none of them unless you are bound by some sort of strict SLA. If one needs predictable 3.7Ghz perf you go with Gold, if you need RAS you go with Platinum. Otherwise you go with some some other Gold (or even Silver) cpu that has better perf/$ and enough capacity. Easy as that.

But let's leave Xeon alone, that is a topic only head devil in Intel's marketing can answer.
 

eddman

Senior member
Dec 28, 2010
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So what's better value - 18C Gold @3.7GHz all cores, or 24C Platinum @2.8GHz all cores?

Also, if according to you, cache, TDP, clocks, platform, multi-socket scalability, etc. are all reasons why frequency*core count isn't a good indicator of MT performance, then why is just a simple 40%(IPC+clock) increase an absolutely valid indicator of ST performance?
What do you want to here exactly? No, better ST performance will not always replace more cores, as more cores will not always replace better ST performance. It is very much task dependent.

Are you saying more, slower cores are better than less, faster ones? I don't know why you keep downplaying lakes' ST potential. Yes, not every program scales with lakes' clock speeds but it seems a lot of them do.

Better yet, could we get on topic? Could someone make a "More cores vs. ST performance" thread already?
 

tamz_msc

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Jan 5, 2017
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Nice try. And the answer is none of them unless you are bound by some sort of strict SLA. If one needs predictable 3.7Ghz perf you go with Gold, if you need RAS you go with Platinum. Otherwise you go with some some other Gold (or even Silver) cpu that has better perf/$ and enough capacity. Easy as that.

But let's leave Xeon alone, that is a topic only head devil in Intel's marketing can answer.
RAS is available across the board.

SLA is irrelevant in a completely open source environment. Is it always going to be the case that MT performance across the two will be near identical because of 1:1 core:frequency scaling?
 
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tamz_msc

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Jan 5, 2017
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What do you want to here exactly? No, better ST performance will not always replace more cores, as more cores will not always replace better ST performance. It is very much task dependent.
Then why the circlejerk around OC'd 8700K Cinebench MT scores implying a certain slower 8C/16T CPU would become irrelevant?(not that it's you specifically who's making such claims)
Yes, not every program scales with lakes' clock speeds but it seems a lot of them do.
Same thing can be said about programs and core scaling - some of them don't, a lot of them do.
 
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epsilon84

Golden Member
Aug 29, 2010
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Better yet, could we get on topic? Could someone make a "More cores vs. ST performance" thread already?
Agreed. The problem is that everyone wants the last word in these kind of debates and before you know it, the thread has 5 pages of off topic discussion. I am partly guilty of this as well. Now can we seriously get back on topic and discuss Coffee Lake? I didn't come here to read about Xeons. Thank you very much
 
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Mar 10, 2006
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If one of CPUs is executing same 256bit vector workload in half of the time and program instruction count to retire is const, wouldn't the faster CPU have double IPC?

It doubles performance per clock, but SIMD stands for single instruction multiple data, so your IPC doesn’t actually go up.

IPC is such a bad term. What people really are talking about is single threaded performance per clock.
 
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NTMBK

Lifer
Nov 14, 2011
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If one of CPUs is executing same 256bit vector workload in half of the time and program instruction count to retire is const, wouldn't the faster CPU have double IPC?

Ah, you're talking about AVX2 workloads on both CPUs, not comparing AVX2 vs. SSE4 on the same CPU? That makes a lot more sense.
 

raghu78

Diamond Member
Aug 23, 2012
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It has been shown again and again that the IPC difference is like 8-10 percent, not 10-20 percent. Gaming performance isn't a measure of IPC. Performance scaling with frequency isn't linear for all but canned benchmarks like Cinebench. So 30 percent improvement is for situations with ideal ST scaling.

very well said. Performance never scales 100% perfectly with increased clocks. I have no problem admitting that Coffeelake will put Intel clearly back in the lead with competitive MT and superior ST performance. This is good as it will force AMD to make price cuts to clear Ryzen 1000 series stock before Pinnacle Ridge 2000 series arrives sometime in late Q1 2018. imo thats the contest for 2018 to watch out. Both these cpu generations will be around till 2019 when the successors Icelake and Zen 2 arrive when the next big faceoff will occur. Good competition and great time for the PC mainstream consumer / enthusiast.
 

Dufus

Senior member
Sep 20, 2010
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Because the clock frequency within a CPU is a reference of time. Cycles refer to periodicity of the waveform of the clock signal. If some instruction takes two cycles to execute, then it will still take two cycles to execute whether the CPU is at stock or overclocked.

But we are not talking about frequency here as in Hertz which is cycles per second and the clock in the CPU used for execution is not used as a reference of time.

Examples from Intel optimization paper https://software.intel.com/sites/default/files/pentium-processor-optimization.pdf

Can you see per cycle in the description is the per clock in the expression.
oseWbaq.png


Can you see counting clocks is the same as counting cycles
CLjGcfZ.png


Or we can take the reciprocal CPI
qY0q9ju.png
 
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tamz_msc

Diamond Member
Jan 5, 2017
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But we are not talking about frequency here as in Hertz which is cycles per second and the clock in the CPU used for execution is not used as a reference of time.

Examples from Intel optimization paper https://software.intel.com/sites/default/files/pentium-processor-optimization.pdf

Can you see per cycle in the description is the per clock in the expression.
oseWbaq.png


Can you see counting clocks is the same as counting cycles
CLjGcfZ.png


Or we can take the reciprocal CPI
qY0q9ju.png
I'll just cite Agner Fog's Instruction Table.
Latency:

The latency of an instruction is the delay that the instruction generates in a dependency chain. The measurement unit is clock cycles.

Reciprocal throughput:

The throughput is the maximum number of instructions of the same kind that can be executed per clock cycle when the operands of each instruction are independent of the preceding instructions. The values listed are the reciprocals of the throughputs, i.e. the average number of clock cycles per instruction when the instructions are not part of a limiting dependency chain. For example, a reciprocal throughput of 2 for FMUL means that a new FMUL instruction can start executing 2 clock cycles after a previous FMUL. A reciprocal throughput of 0.33 for ADD means that the execution units can handle 3 integer additions per clock cycle.
 

MarkPost

Senior member
Mar 1, 2017
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Talking about AVX, is it fully supported in KabyLake/CoffeeLake just like in Skylake-X?
 

tamz_msc

Diamond Member
Jan 5, 2017
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I know it's difficult for you, but would you please refrain from gumming up this thread any further? It's getting old having to skim through post after post to try to find Coffee Lake specific information.
Why didn't you respond to the person I was responding to as well, if you find these digressions irrelevant? Can't believe people have this much trouble finding relevant information on the internet in this day and age.
 
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Flacco

Member
Nov 8, 2012
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Why didn't you respond to the person I was responding to as well, if you find these digressions irrelevant? Can't believe people have this much trouble finding relevant information on the internet in this day and age.

Well it is nice when the information is all in one easy to find and convenient location. Multiple people have asked nicely to drop the subject. Take it to another thread or PMs please.