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Discussion Beyond zen 6

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adroc_thurston said:
They're both 2028.
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There's been recent rumors that Titan Lake is now a Mobile product, makes sense in context. Though I expect RZL to beat Zen 7 but not by much and at a larger BOM cost in MT, ST it'll likely be Zen 7's advantage. Hammer Lake especially with eLLC will probably take the ST crown from Z7 (though in theory AMD could just do a Zen 7+ with A14 SPR to counter that and still be on AM5).
 
2 separate warnings about not posting Intel in AMD threads have been posted. Seems you missed them both.
adroc_thurston said:
It haez to beat Zen6 first.
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I suspect that Zen 6 will not be a great as you have predicted and that NVL (especially the bLLC version) will be much better than you imagine.

Having said that, I still believe AMD will retain the lead in most benchmarks with Zen 6 as they have been at 3D cache and MCM's longer than Intel that is still teething on both.

I don't think NVL and it's successors will be such crap as you think. AMD is going to need Zen 6.
 
Joe NYC said:
I am wondering if Intel will be able to stay with the yearly cadence, and full stack of products release yearly.

Also, it seems like Intel is stabilizing its chiplet strategy, while AMD is upending it, with a number of components that don't seem to perfect re-usability (from what I can tell).
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What do you mean by this? Seems like the longer term move is to move more cache off latest node and to reuse CPUs/GPUs to make APUs. Seems like more reuse than ever
 
inquiss said:
What do you mean by this? Seems like the longer term move is to move more cache off latest node and to reuse CPUs/GPUs to make APUs. Seems like more reuse than ever
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I am counting:
- at least one distinct desktop IOD (memory controller, IO, unique iGPU - 1st die
- MDS1 - duplicates IO, MC, has unique iGPU, unique CPU - 2nd die
- MDS Mini - duplicates IO, unique CPU, removes MC and iGPU - 3rd die
- MDS Halo - duplicates IO, another unique CPU, removes MC and iGPU - 4th die
- XBox Magnus - SoC die #5 that just again reshuffles stuff, more unique CPU counts

There seems to be more IP reuse, some GPU reuse, but SoCs seem like a big mess with too many dies.

With the mess of the dies and SoCs, it would not be surprising if the release of all of these takes 1.5 year or more.
 
Joe NYC said:
I am counting:
- at least one distinct desktop IOD (memory controller, IO, unique iGPU - 1st die
- MDS1 - duplicates IO, MC, has unique iGPU, unique CPU - 2nd die
- MDS Mini - duplicates IO, unique CPU, removes MC and iGPU - 3rd die
- MDS Halo - duplicates IO, another unique CPU, removes MC and iGPU - 4th die
- XBox Magnus - SoC die #5 that just again reshuffles stuff, more unique CPU counts

There seems to be more IP reuse, some GPU reuse, but SoCs seem like a big mess with too many dies.

With the mess of the dies and SoCs, it would not be surprising if the release of all of these takes 1.5 year or more.
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Magnus is at least semi-custom, so not really something to worry about from a reuse perspective.

MDS Premium and Halo are the ones I think are wasteful - they could share a 3nm SOC chiplet between them. N3P, 2x Zen 6lp, 12x Zen 6 w/ 48MB L3. All the required I/O and controllers etc. MDSP would be AT4 + SOC, MDSH is AT3 + SOC + optional 2nm CCD.

I am sure AMD considered this and deemed it not viable. Probably too large a chiplet on 3nm with full fat Zen 6 + 48MB and chopping that down would just be asking for trouble with scheduling for MDSH. But idk, just speculation.

In any case I expect the reuse strategy to only grow more advanced with Zen 7 and beyond.
 
Tangopiper said:
Magnus is at least semi-custom, so not really something to worry about from a reuse perspective.

MDS Premium and Halo are the ones I think are wasteful - they could share a 3nm SOC chiplet between them. N3P, 2x Zen 6lp, 12x Zen 6 w/ 48MB L3. All the required I/O and controllers etc. MDSP would be AT4 + SOC, MDSH is AT3 + SOC + optional 2nm CCD.

I am sure AMD considered this and deemed it not viable. Probably too large a chiplet on 3nm with full fat Zen 6 + 48MB and chopping that down would just be asking for trouble with scheduling for MDSH. But idk, just speculation.

In any case I expect the reuse strategy to only grow more advanced with Zen 7 and beyond.
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Intel die partitioning is just more sane, more logical than the mess AMD came up with.

The only way AMD partition strategy would be understandable is if MDS1 die is so good, so competitive in price, performance efficiency and additionally, so early on the market that it was worth eliminate all the reusability with other SKUs that will come later.

In other, it needs to be a home run, that would make it worth taking it out of the epicenter of product line and then making all the other chiplet based solution on periphery saddled with high design costs, low volumes of their chiplets and low reusability.
 
I'm a little more interested in what AMD does with their v-cache than most of the other aspects of the architecture.

By the time some of these come out they should have had plenty of time to work out how to incorporate some of the next generation 3D packaging technologies that have been talked about as well as built up the engineering knowhow to make the best use of the potential.
 
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