Discussion Apple Silicon SoC thread

[Eug]

M1
5 nm
Unified memory architecture - LP-DDR4
16 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 12 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache
(Apple claims the 4 high-effiency cores alone perform like a dual-core Intel MacBook Air)

8-core iGPU (but there is a 7-core variant, likely with one inactive core)
128 execution units
Up to 24576 concurrent threads
2.6 Teraflops
82 Gigatexels/s
41 gigapixels/s

16-core neural engine
Secure Enclave
USB 4

Products:
$999 ($899 edu) 13" MacBook Air (fanless) - 18 hour video playback battery life
$699 Mac mini (with fan)
$1299 ($1199 edu) 13" MacBook Pro (with fan) - 20 hour video playback battery life

Memory options 8 GB and 16 GB. No 32 GB option (unless you go Intel).

It should be noted that the M1 chip in these three Macs is the same (aside from GPU core number). Basically, Apple is taking the same approach which these chips as they do the iPhones and iPads. Just one SKU (excluding the X variants), which is the same across all iDevices (aside from maybe slight clock speed differences occasionally).

EDIT:



M1 Pro 8-core CPU (6+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 16-core GPU
M1 Max 10-core CPU (8+2), 24-core GPU
M1 Max 10-core CPU (8+2), 32-core GPU

M1 Pro and M1 Max discussion here:

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M1 Ultra discussion here:

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M2 discussion here:

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Second Generation 5 nm
Unified memory architecture - LPDDR5, up to 24 GB and 100 GB/s
20 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 16 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache

10-core iGPU (but there is an 8-core variant)
3.6 Teraflops

16-core neural engine
Secure Enclave
USB 4

Hardware acceleration for 8K h.264, h.264, ProRes

M3 Family discussion here:

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[Eug]

My drive is definitely not full, but OS files may have been fragmented. What is the best way to "clean" it?

You don't defragment SSDs.

I think the first step is to check in System Report how much storage is being used in various parts of your drive.

 

[moinmoin]

However, I know HDCP 2.2 is supported by the monitor, because 4K Disney+ streaming works fine on the monitor when I plug in my Apple TV.

That may well be a software issue. I can't really imagine Apple TV using an older A gen having HDCP 2.2 support in hardware and not M1/2. It's a curious discrepancy in any case.

 

[Mopetar]

So does Geekbench, but more importantly, you do realize that was a joke, right?

I do now. Unfortunately with the sudden outbreak of absolutely awful hot takes in this thread, it's hard to pick out the sarcasm.

 

[MadRat]

Do you think other cloud providers are better? Or do you think Apple in particular is evil?

You put your valuable, hard work out there in someone else's care? Be my guest. Im never surprised when kids raid a cookie jar. Leave things in reach, they get grabbed.

 

[Nothingness]

You put your valuable, hard work out there in someone else's care? Be my guest. Im never surprised when kids raid a cookie jar. Leave things in reach, they get grabbed.

So you consider cloud in general to be a danger. I will let my company know about that, we develop projects worth dozens millions of dollars using cloud (two of the largest ones) for massive validation and testing.

 

[Doug S]

Why would anyone that spends $10,000+ on a workstation for conceivably projects worth 10x-1000x the value of the workstation, want their data to touch Apple's cloud? That is ludicrous. Apple would be in position to spy on their information and possibly perform espionage. Anyone that believes Apple would not, I have a line of premium bridges to sell you.

Who says you have to use a cloud? And if you do, why in the heck would you trust Microsoft, Google or Amazon more than Apple?

 

[richardskrad]

Report: Apple axed plans for next-generation GPU in iPhone 14 Pro after rare engineering blunder (9To5Mac)

Inside Apple’s War for Chip Talent (The Information)

 

[scineram]

Report: Apple axed plans for next-generation GPU in iPhone 14 Pro after rare engineering blunder (9To5Mac)

Inside Apple’s War for Chip Talent (The Information)

Amazingly not just the AMD Radeon Technology Group can have silicon issues discovered too late in chip development.

 

[Ajay]

Report: Apple axed plans for next-generation GPU in iPhone 14 Pro after rare engineering blunder (9To5Mac)

Inside Apple’s War for Chip Talent (The Information)

Second link is a hard paywall (usual paywall bypass methods aren't working).

 

[moinmoin]

Report: Apple axed plans for next-generation GPU in iPhone 14 Pro after rare engineering blunder (9To5Mac)

"The article also says Apple has tried to reduce the amount of brain drain in the unit, by showing presentations to engineers that highlight the riskiness of chip startups and warning that most fail. A job at Apple is positioned as the safer choice in the face of economic downturn."

That's hilarious if true. That's seriously all Apple got?

 

[oak8292]

A engineering blunder isn't too hard to imagine but it could be combination of factors. The iPhone 14 PRO has a new processor with a larger die on N5, which is more expensive to manufacture than last years processor. One scenario is that when it was being designed the plan was to use N3, which was also going to be expensive and might have been in limited supply due to high demands on EUV leading to the plan to split processors on PRO and non-PRO. N3 would have made a more transistor intensive GPU feasible. It will be interesting to see how they use the added transistor budget when the new N3 based processors are released.

 

[richardskrad]

The M1 was such a groundbreaking chip and it gave Apple a few years of brain drain and missed deadlines. I don’t expect Apple to wow us again until the M4 or M5. This is a good time for Apple to pause, look at what Qualcomm, AMD and Intel are doing and see how they can attract the same class of talent that gave birth to the M1 again.

 

[Mopetar]

"The article also says Apple has tried to reduce the amount of brain drain in the unit, by showing presentations to engineers that highlight the riskiness of chip startups and warning that most fail. A job at Apple is positioned as the safer choice in the face of economic downturn."

That's hilarious if true. That's seriously all Apple got?

Should have shown them a fat suitcase full of money. Put $100 million dollar general in a big pile and tell me bonus season could be mighty profitable this year and suddenly a startup with a chance of a similarly big payout doesn't seems so alluring.

If the long hours and grind start to wear people down, just let them take 10 minutes to have a money fight in the pool where it's all being kept and that should rejuvenate even the weariest of worker.

But good for the engineers getting paid.

 

[Doug S]

Should have shown them a fat suitcase full of money. Put $100 million dollar general in a big pile and tell me bonus season could be mighty profitable this year and suddenly a startup with a chance of a similarly big payout doesn't seems so alluring.

If the long hours and grind start to wear people down, just let them take 10 minutes to have a money fight in the pool where it's all being kept and that should rejuvenate even the weariest of worker.

But good for the engineers getting paid.

It is impossible for companies to compete with the IPO stock option slot machine. For those engineers willing to take the risk their startup succeeds when most don't (leaving the options worthless and their total pay during that time a lot lower than they would otherwise get) there is nothing that can be done to keep them. That's always been the case.

 

[moinmoin]

Should have shown them a fat suitcase full of money. Put $100 million dollar general in a big pile and tell me bonus season could be mighty profitable this year and suddenly a startup with a chance of a similarly big payout doesn't seems so alluring.

If the long hours and grind start to wear people down, just let them take 10 minutes to have a money fight in the pool where it's all being kept and that should rejuvenate even the weariest of worker.

But good for the engineers getting paid.

Money is not the issue, at least not the way you seem to think. If it's lots of money you can't compete with IPOs anyway as @Doug S rightly points out. But what I quoted is downright insulting if it indeed happened: Engineers should be paid well already anyway, framing start ups as risky (Homer "duh", that's the point!) and "Apple (...) as the safer choice in the face of economic downturn" is patronizing and may work with cleaning workers with low self esteem. The messaging is hilariously off with that one.

 

[Eug]

TSMC is celebrating its start of commercial N3 production this week. I guess it feels the need to brag (to investors?) about its accomplishment this time.

This timing works for N3 M2 Pro + Max + 2xMax/Ultra + ?4xMax in spring...

TSMC to hold 3nm mass production launch ceremony in southern Taiwan | Taiwan News | 2022-12-26 16:23:00

TSMC to hold ceremony on Dec. 29 to mark start of 3nm commercial production | 2022-12-26 16:23:00

www.taiwannews.com.tw

Taiwan Semiconductor Manufacturing Co. (TSMC) said on Saturday (Dec. 24) it will hold a ceremony on Dec. 29 to mark the start of the commercial production phase of its newest 3nm process technology in Tainan.

CNA noted that it is rare for TSMC to hold ceremonies to signal the beginning of commercial production for new chips, but that the move was likely in response to concerns by some that Taiwan could lose its semiconductor edge in response to the chipmaker’s recent international expansion plans, particularly those in the U.S.

 

[Eug]

Semianalysis has some comments on N3 (aka N3B) and N3E.

TSMC’s 3nm Conundrum, Does It Even Make Sense? – N3 & N3E Process Technology & Cost Detailed

Shrinking finally costs more, Moore's Law is now dead in economic terms

www.semianalysis.com

I didn't quite understand the pricing summary. He said N3 is priced 40% per wafer higher than N5, but later said that N3E is cheaper than N3/N3B, and that N3E is priced 40% higher per wafer than N5. So, it sounds like he may be saying N3E is 40% more than N5, while N3/N3B is priced even higher than N3E.

The total spend per wafer starts per month increases from 38% to 55%. This ties nicely with the other rumors we have heard for N3 pricing being ~40% more than N5. Contrary to the DigiTimes rumors, the wafer prices are not $20,000. Also N3B is a decent bit more expensive than N3E.

---

The density improvements are, at best, slightly better than the wafer cost increases. With the FinFlex 2-1 implementation, density improvements are 56%, with a 40% cost increase. This results in an 11% cost per transistor improvement, the weakest ever scaling for a major process technology in 50+ years.

 

[Doug S]

The density improvements are, at best, slightly better than the wafer cost increases. With the FinFlex 2-1 implementation, density improvements are 56%, with a 40% cost increase. This results in an 11% cost per transistor improvement, the weakest ever scaling for a major process technology in 50+ years.

Didn't the last generation or two of planar transistors see increasingly poor scaling as well, which was one of the main reasons behind the migration to FinFET?

 

[FlameTail]

Apple Silicon is frankly incredible.

If we compare the Apple M2 to a 6-core Ryzen such as R5 6600H (this is reasonable because M2 is 4P+4E, while a 6600H has 6P) in Geekbench (the best benchmark for this kind of comparison):

M2 - 1900/9000

6600H - 1500/8000

The M2 outperforms the 6600H, particularly by a large margin in single core, while consuming around half the power the 6600H does.

This is crazy, and can't all be chalked down to the M2's superior process node...The M2 certainly has a significant architectural advantage.

 

[BorisTheBlade82]

@FlameTail
Indeed. And this essentially is nothing new. Just take a look at this thread and see how the M1 still dominates ST Performance Efficiency by a large margin:

Discussion - PES | Assessing Power and Performance Efficiency of x86 CPU architectures

Dear Community, so this is my first thread here as a long-time lurker - but I felt the desire to share a small hobby-project of mine from the last couple of months with you... Performance Efficiency Suite - What is it about? Most Reviewers solely focus on what they consider to be the most...

forums.anandtech.com

But still there are a lot of people outright denying this or searching for strawman arguments. And one thing is admittedly true: While Apple further increases performance, they also decrease their efficiency.

 

[FlameTail]

@FlameTail
And one thing is admittedly true: While Apple further increases performance, they also decrease their efficiency.

Could you elaborate on this point?

 

[Doug S]

Apple Silicon is frankly incredible.

If we compare the Apple M2 to a 6-core Ryzen such as R5 6600H (this is reasonable because M2 is 4P+4E, while a 6600H has 6P) in Geekbench (the best benchmark for this kind of comparison):

M2 - 1900/9000

6600H - 1500/8000

The M2 outperforms the 6600H, particularly by a large margin in single core, while consuming around half the power the 6600H does.

This is crazy, and can't all be chalked down to the M2's superior process node...The M2 certainly has a significant architectural advantage.

Intel and AMD market segment their CPUs, and don't allow cheaper versions with fewer cores to scale up their frequency as high as more expensive parts. The 6600H's single thread score would be higher if it weren't for those limits, though it has other limits (like less cache) compared to AMD's more expensive CPUs.

 

[BorisTheBlade82]

Could you elaborate on this point?

Well, for once the M1 Pro/Max/Ultra have a much higher consumption in CBR23 ST than the original M1, which significantly decreases efficiency.
See here

Discussion - PES | Assessing Power and Performance Efficiency of x86 CPU architectures

Dear Community, so this is my first thread here as a long-time lurker - but I felt the desire to share a small hobby-project of mine from the last couple of months with you... Performance Efficiency Suite - What is it about? Most Reviewers solely focus on what they consider to be the most...

forums.anandtech.com

and here

Apple's M1 Pro, M1 Max SoCs Investigated: New Performance and Efficiency Heights

www.anandtech.com

And from what I gathered, M2 is also a slight regression in terms of efficiency - but ATM I am too lazy to back up that claim with links.

 

[FlameTail]

Question- Why do base M chips have less SLC (System Level Cache) than the A series chips they are based on?

Example:

A14 -> 16 MB SLC
M1 -> 8 MB SLC

A15 -> 32 MB SLC
M2 -> 8MB SLC.


The M chips have more CPU cores and GPU cores, and the SLC is shared by all the components including the CPU and GPU. So logically, the M chips should have more SLC but they don't. Why?

Also bizarrely, going from M1 to M2, the SLC stays the same size at 8 MB.

Apple M2 Die Shot and Architecture Analysis – Big Cost Increase And A15 Based IP

Apple announced their new 20 billion transistor M2 SoC at WWDC. Unfortunately, it’s quite a minor uplift in performance in some areas such as CPU. Apple’s gains mostly came from the GPU and video editing side of things.

www.semianalysis.com

 

[Doug S]

Question- Why do base M chips have less SLC (System Level Cache) than the A series chips they are based on?

Example:

A14 -> 16 MB SLC
M1 -> 8 MB SLC

A15 -> 32 MB SLC
M2 -> 8MB SLC.


The M chips have more CPU cores and GPU cores, and the SLC is shared by all the components including the CPU and GPU. So logically, the M chips should have more SLC but they don't. Why?

Also bizarrely, going from M1 to M2, the SLC stays the same size at 8 MB.

Apple M2 Die Shot and Architecture Analysis – Big Cost Increase And A15 Based IP

Apple announced their new 20 billion transistor M2 SoC at WWDC. Unfortunately, it’s quite a minor uplift in performance in some areas such as CPU. Apple’s gains mostly came from the GPU and video editing side of things.

www.semianalysis.com

Apple uses the SLC more for power savings than performance improvement.