Apple A12 benchmarks

[Drazick]

Intel doesn't lack strong core design people despite what the 10nm delays and having to ride Skylake all these years would tell you, but everything around the core is a real pain for them as they failed to standardize it within the company.

Given that AMD with so limited resources and having inferior process got so close to Intel suggests the other way.
It seems they have solid teams, but nothing extraordinary that other solid teams can't get close to pretty easily.
When I say solid I mean average. Not elite team.

If I was an Intel share holder that was the 2nd most frightening thing to think about (Just after how badly the manufacturing advantage was managed to make it disappear).

 

[Nothingness]

Given that AMD with so limited resources and having inferior process got so close to Intel suggests the other way.
It seems they have solid teams, but nothing extraordinary that other solid teams can't get close to pretty easily.
When I say solid I mean average. Not elite team.

Do you really think the result you see on the market only is the choice of engineers? Read my signature 😀

 

[Eug]

I wonder how much RAM A12X can address.

 

[scannall]

I wonder how much RAM A12X can address.

It's a 64 bit architecture. No reason to expect it to address any more or less than any other 64 bit CPU.

 

[Eug]

It's a 64 bit architecture. No reason to expect it to address any more or less than any other 64 bit CPU.

I guess I should be more specific.

I wonder how much LPDDR4x RAM the A12 or A12X SoC can support in an actual device. This has been an issue on the Intel side because they have only been able to support 16 GB maximum. Currently the maximum RAM any Apple SoC is paired with is only 4 GB LPDDR4x RAM (with A10X).

For a MacBook, one would expect support for a minimum of 16 GB, but preferably 32 GB or more.

 

[oak8292]

Eug

It is interesting that Apple only uses LPDDR memory in portable/mobile devices. Intel's current memory controller supports 32GB of DDR4 but only 16 GB of LPDDR3 memory, not even LPDDR4. I think the 10nm delay is killing their memory support upgrades.

Apple is also InFO packaging for iOS devices, which means packaging the processor and DRAM with TIV's (through insulator vias). Unfortunately we have never had an Anandtech article on the power/latency improvements of this type of memory interconnect over BGA or SODIMM. TSMC claims power reductions which seems likely with so little copper in the interconnect. For Apple to use the A12X in a portable versus iPad PRO would mean a change in packaging as I doubt that they can get 32 GB of memory in package with the applications processor, even with the new 12 Gbit die that are now coming to market for LPDDR.

 

[Eug]

It is interesting that Apple only uses LPDDR memory in portable/mobile devices. Intel's current memory controller supports 32GB of DDR4 but only 16 GB of LPDDR3 memory, not even LPDDR4. I think the 10nm delay is killing their memory support upgrades.

Yeah, it's been a sore point on the Apple side. Ironically, an 8th gen Core i3, the Core i3-8121U, supports 32 GB LPDDR4x, but as you know that's a (low volume) 10 nm part.

Apple is also InFO packaging for iOS devices, which means packaging the processor and DRAM with TIV's (through insulator vias). Unfortunately we have never had an Anandtech article on the power/latency improvements of this type of memory interconnect over BGA or SODIMM. TSMC claims power reductions which seems likely with so little copper in the interconnect. For Apple to use the A12X in a portable versus iPad PRO would mean a change in packaging as I doubt that they can get 32 GB of memory in package with the applications processor, even with the new 12 Gbit die that are now coming to market for LPDDR.

Ah, good to know, and good point.

 

[teejee]

It's a 64 bit architecture. No reason to expect it to address any more or less than any other 64 bit CPU.

it is a 64 bit ISA. There is no 64-bit CPU/SOC that has a 64 bit address bus. So there is a physical memory limitation in A12 that is much less than 64 bit.

 

[CatMerc]

Given that AMD with so limited resources and having inferior process got so close to Intel suggests the other way.
It seems they have solid teams, but nothing extraordinary that other solid teams can't get close to pretty easily.
When I say solid I mean average. Not elite team.

If I was an Intel share holder that was the 2nd most frightening thing to think about (Just after how badly the manufacturing advantage was managed to make it disappear).

As I said, that's because of 10nm holding back architectures they developed. We were supposed to have Ice Lake in 2017, and Tiger Lake in 2018. Both were supposed to provide significant architectural uplifts in IPC and efficiency, with Tiger Lake having some ridiculously low powered idle that made Apple executives blink. It was like 9mW or some such don't remember the figure.

 

[jpiniero]

I'm convinced that Core as a whole is tapped out for the most part... especially with Intel being obsessed with AVX-512 it's hard to think Icelake has real IPC gains. Tigerlake's idle does sound nice but I wonder if that was achieved with a Tremont bL core.

 

[Lodix]

As I said, that's because of 10nm holding back architectures they developed. We were supposed to have Ice Lake in 2017, and Tiger Lake in 2018. Both were supposed to provide significant architectural uplifts in IPC and efficiency, with Tiger Lake having some ridiculously low powered idle that made Apple executives blink. It was like 9mW or some such don't remember the figure.

It is not like they are not able to bring improvements in architecture at 14nm. They should have this kind of plans ready.

 

[CatMerc]

It is not like they are not able to bring improvements in architecture at 14nm. They should have this kind of plans ready.

They are able to, but TMG management kept assuring everyone that 10nm problems will be fixed shortly... in 2016.

Good ol' Francois himself suggested for Intel to port Ice Lake back to 14++ but it was rejected. This is probably Intel's biggest mistake they've made in the past few years, more so than 10nm issues. The time for that has passed and it cannot be undone, if they decide to port Ice Lake to 14nm++ now they'd already be looking at 7nm timelines for its release. It's just too late. Either they get 10nm to work and release Ice Lake/Tiger Lake on it, or they go for 7nm.

 

[Lodix]

They are able to, but TMG management kept assuring everyone that 10nm problems will be fixed shortly... in 2016.

Good ol' Francois himself suggested for Intel to port Ice Lake back to 14++ but it was rejected. This is probably Intel's biggest mistake they've made in the past few years, more so than 10nm issues.

Sorry but I don't eat that <redacted> haha

That is a really bad excuse if they are any serious business this can't be real.

And Francois can't be trusted he talks a lot of nonsense and he is an Intel fanatic.

Profanity is not allowed in the tech forums. Even if you try to mask it with **
AT Mod markfw

 

[CatMerc]

Sorry but I don't eat that buls*t haha

That is a really bad excuse if they are any serious business this can't be real.

And Francois can't be trusted he talks a lot of nonsense and he is an Intel fanatic.

This is the reality. Intel is ridiculously poorly managed. There's a reason for the mass exodus of engineers that Intel is experiencing. I personally know of quite a few that are now at Apple.
Francois wasn't the original source for this, I've got multiple people saying the same thing. Cannon Lake, Ice Lake, Tiger Lake, were all candidates for 14nm ports but it was rejected. Francois' comment is just the only public one that I can point to.

 

[Eug]

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This person would be a bridge between the DV team and SiVal SW teams on concurrency and usage model targeting.
The solution needs to be scalable, supportable, and allow for collaboration/contribution by both DV and SiVal Teams to permit leveraging each other’s workloads.
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Requires working with pre silicon team and design to incorporate expected usage models
Work with post silicon engineers to leverage content run in emulation that target usage models
Work with validation teams to review coverage of the content and fill coverage holes in the tools/content
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[jpiniero]

Good ol' Francois himself suggested for Intel to port Ice Lake back to 14++ but it was rejected. This is probably Intel's biggest mistake they've made in the past few years, more so than 10nm issues. .

In defense of Intel, I highly doubt Icelake Client on 14++ would have changed the competitiveness much. LPDDR4X is the one thing Intel badly needs but perhaps they did backport that with Whiskey Lake.

Skylake Server is already big enough as it is, anything with a bigger core die would not work.

 

[CatMerc]

In defense of Intel, I highly doubt Icelake Client on 14++ would have changed the competitiveness much. LPDDR4X is the one thing Intel badly needs but perhaps they did backport that with Whiskey Lake.

Skylake Server is already big enough as it is, anything with a bigger core die would not work.

Ice Lake was supposed to have 10%-15% IPC uplift. That's significant considering the margins we're working with today.

Had Ice Lake released in 2017 on 10nm as intended, Zen wouldn't have even been a footnote to Intel. The delays made a huge difference.

 

[Nothingness]

This is the reality. Intel is ridiculously poorly managed. There's a reason for the mass exodus of engineers that Intel is experiencing. I personally know of quite a few that are now at Apple.

Apple is trying and poaching engineers from everywhere, not only from Intel. Many engineers move there because the stock plan is really nice.

 

[jpiniero]

Ice Lake was supposed to have 10%-15% IPC uplift. That's significant considering the margins we're working with today.

Had Ice Lake released in 2017 on 10nm as intended, Zen wouldn't have even been a footnote to Intel. The delays made a huge difference.

I highly doubt the 10-15% higher IPC. The main benefit is the lower power that 10 nm brings, not to mention the die space savings (and the aforementioned LPDDR4X). If they had gone to higher core counts earlier maybe they would have not lost any enthusiast share, but they could have done that on 14nm.

 

[AkulaMD]

I highly doubt the 10-15% higher IPC. The main benefit is the lower power that 10 nm brings, not to mention the die space savings (and the aforementioned LPDDR4X). If they had gone to higher core counts earlier maybe they would have not lost any enthusiast share, but they could have done that on 14nm.

Now that they are going to launch the product. I guess we should know more about the A12 soon enough.

 

[Nothingness]

Now that they are going to launch the product. I guess we should know more about the A12 soon enough.

We already know that the first post in this thread pointed to a fake result since Apple claim 15% perf improvement 🙂

 

[Charlie22911]

The big issue with these mobile chips is that they cannot sustain full performance for long periods. The RAM dice are located above the CPU die on the same package which adds a LOT of thermal resistance.
I know this is apples and oranges, but the example is still valid... I have an ODroid XU4 (Samsung Exynos 5422 based), and even with a heatsink and fan it throttles pretty badly under some non-synthetic workloads due to how the package is assembled.

Obviously apple would almost certainly use off package ram in these scenarios as they have with other X class CPUs, but I wouldn't count A12 as competitive with recent x86 CPUs when they can’t sustain equivalent workloads without throttling.

EDIT: A Word...

 

[Eug]

The big issue with these mobile chips is that they cannot sustain full performance for long periods. The RAM dice are located above the CPU die on the same package which adds a LOT of thermal resistance.
I know this is apples and oranges, but the example is still valid... I have an ODroid XU4 (Samsung Exynos 5422 based), and even with a heatsink and fan it throttles pretty badly under some non-synthetic workloads due to how the package is assembled.

Obviously apple would almost certainly use off package ram in these scenarios as they have with other X class CPUs, but I wouldn't count A12 as competitive with recent x86 CPUs when they can’t sustain equivalent workloads without throttling.

EDIT: A Word...

You can put a fan in a laptop. And you can put a huge-ass fan in a desktop.

For an ultra-ultralight you may not want a fan, but then again the Y series Intel chips also throttle in this context. An A12 Bionic in a MacBook wouldn't be anywhere near as thermally constrained as it is in an iPhone, so it could be quite competitive against similar Intel chips (OS limitations notwithstanding).

 

[Charlie22911]

You can put a fan in a laptop. And you can put a huge-ass fan in a desktop.

For an ultra-ultralight you may not want a fan, but then again the Y series Intel chips also throttle in this context. An A12 Bionic in a MacBook wouldn't be anywhere near as thermally constrained as it is in an iPhone, so it could be quite competitive against similar Intel chips (OS limitations notwithstanding).

The A12 in a package on package configuration (the only configuration it exists in) would be thermally constrained, that was the whole point of my post.

It would take an X class (A12X?) CPU with off-die DRAM to be used in a traditional Notebook\Desktop form factor due to the thermal resistance of having an entire extra package between the CPU and thermal solution. The whole reason POP exists is to free up valuable real-estate for the battery, apple has even gone through the trouble of folding the motherboard in half since the iPhone X.

 

[Eug]

The A12 in a package on package configuration (the only configuration it exists in) would be thermally constrained, that was the whole point of my post.

It would take an X class (A12X?) CPU with off-die DRAM to be used in a traditional Notebook\Desktop form factor due to the thermal resistance of having an entire extra package between the CPU and thermal solution. The whole reason POP exists is to free up valuable real-estate for the battery, apple has even gone through the trouble of folding the motherboard in half since the iPhone X.

Well, nobody in their right mind would suggest Apple would use the exact same design from phones up to desktops.