AMD talks Barcelona

[Furen]

Originally posted by: Nemesis 1

Originally posted by: Viditor

Originally posted by: Nemesis 1
Penryn yorkfield will be up to 150% faster than C2Q/ Links are posted in the penryn up and running thread.

Could you repost them?
I couldn't find anything that said that...

If you read this.

http://www.intel.com/technology/magazine/research/speculative-threading-1205.htm

The Mitosis system has been designed to optimize the trade-off between software and hardware to exploit speculative thread-level parallelism.

The Results
To illustrate the performance potential of the Mitosis compiler, let's look at a subset of the Olden benchmark suite. Olden benchmarks are pointer-intensive programs that make it difficult for automatic parallel compilers to extract any thread-level parallelism.


Figure 3. In this graph, the blue bars show the performance improvement going from an in-order to an out-of-order
core with about twice the amount of resources. The red bars indicate the performance of a processor with perfect
memory, illustrating the potential performance improvement for any technique that targets simply reducing memory latency. The yellow bars show the performance gains that result when using Mitosis with a four-core processor.

The results obtained by the Mitosis compiler/architecture for this subset of the Olden benchmarks are very encouraging, outperforming single-threaded execution by 2.2x. When compared with a big out-of-order core, the speed increase is close to 2x. One can also see that the benefits of Mitosis do not come only from reducing memory latency?using Mitosis enables the system to outperform an ideal system with perfect memory by about 60 percent. Overall, this work demonstrates that significant amounts of thread-level parallelism can be exploited in irregular codes, with a rather low overhead in terms of extra (wasted) activity.

Wow, you pulled out a Mitosis article as evidence? Penryn is pretty much a Conroe with more cache and SSE4 and maybe hyperthreading (yay, 8 thread through a single socket... this is kind of getting ridiculous). I'd expect most of Penryn's performance benefits will come not from core improvements but from simple clockspeed hikes.

If Intel's metal gates and high-K dielectrics work as well as Intel claims at very high clocks (it's easier to lower leakage at lower clocks, after all) then a 50% performance increase (through a clock hike and the few improvements Intel will actually throw into it) could be doable at similar TDPs.

 

[Viditor]

Originally posted by: Nemesis 1


If you read this.

http://www.intel.com/technology/magazine/research/speculative-threading-1205.htm

The Mitosis system has been designed to optimize the trade-off between software and hardware to exploit speculative thread-level parallelism.

The Results
To illustrate the performance potential of the Mitosis compiler, let's look at a subset of the Olden benchmark suite. Olden benchmarks are pointer-intensive programs that make it difficult for automatic parallel compilers to extract any thread-level parallelism.


Figure 3. In this graph, the blue bars show the performance improvement going from an in-order to an out-of-order
core with about twice the amount of resources. The red bars indicate the performance of a processor with perfect
memory, illustrating the potential performance improvement for any technique that targets simply reducing memory latency. The yellow bars show the performance gains that result when using Mitosis with a four-core processor.

The results obtained by the Mitosis compiler/architecture for this subset of the Olden benchmarks are very encouraging, outperforming single-threaded execution by 2.2x. When compared with a big out-of-order core, the speed increase is close to 2x. One can also see that the benefits of Mitosis do not come only from reducing memory latency?using Mitosis enables the system to outperform an ideal system with perfect memory by about 60 percent. Overall, this work demonstrates that significant amounts of thread-level parallelism can be exploited in irregular codes, with a rather low overhead in terms of extra (wasted) activity.

I'm with Furen on this...
I'm not sure what the Mitosis project has to do with Penryn or derivatives.
Mitosis isn't even close to being implemented (if it ever is). It is an interesting concept that is based mainly on a new type of compiler.

If you do a search through the forums, we had some really good discussions about Mitosis when the rumours about "reverse hyperthreading" first came out...

 

[Acanthus]

Originally posted by: Viditor

Originally posted by: Acanthus
Once you sift through the marketspeak, it doesnt seem like there are any tangible numbers there that translate to real world performance.

And to top it off, they wont be up against clovertown by the time they get this thing out, theyll be up against 45nm.

Ummm...Barcelona will be available in Q2 of this year, 45nm from Intel will be available in Q1 08, and we still don't know when the Xeon versions will be released.

The only tangible numbers would be the 80% increase in FP over current Opterons at the same clock on a core for core basis...
If you extrapolate that to current comparisons and remember that even current Opterons scale much better than Cloverton, a 40% edge is not improbable...
That said, I agree with the "skeptical" sentiment...show me!

"On track for first production by the end of 2007 with the Penryn family of processors (mobile, desktop and server), is Intel's 45nm manufacturing process."

Do you even read anandtech articles?

Considering they already have working ES samples, i'd say AMD doesnt have much wiggle room.

I dont want to see one sided crap we saw back in the day, id much rather AMD came out with something competitive, however with their enormous losses and their technological advantages all in the "maybe" pile, im skeptical to say the least.

This press release saying basically nothing other than "it will be faster than our current cpu at some things" with no tangible numbers isnt promising in my eyes.

 

[dmens]

anyone who claims an 80% no-strings-attached improvement the cpu field is a liar and/or a marketer. case in point, to bump FP performance by 80% on an x86 core on a similar design budget as the previous core, even with two generations of process tech, would cripple its other functions and turn it into a niche machine (i.e. cell).

 

[SickBeast]

Originally posted by: dmens
anyone who claims an 80% no-strings-attached improvement the cpu field is a liar and/or a marketer. case in point, to bump FP performance by 80% on an x86 core on a similar design budget as the previous core, even with two generations of process tech, would cripple its other functions and turn it into a niche machine (i.e. cell).

Not necessarily.

AMD *needs* this chip to be 80% faster than the current A64 because they are already 40% behind intel in performance. Intel is also releasing an uber-chip before the end of the year, so AMD really has to stay on their toes.

Actually I could see AMD going under within the next few years if they continue along their current path. They have been late with a bunch of their stuff over the past few years, and have lost the performance lead in both graphics and processors.

 

[jpeyton]

Originally posted by: SickBeast

Originally posted by: dmens
anyone who claims an 80% no-strings-attached improvement the cpu field is a liar and/or a marketer. case in point, to bump FP performance by 80% on an x86 core on a similar design budget as the previous core, even with two generations of process tech, would cripple its other functions and turn it into a niche machine (i.e. cell).

Not necessarily.

AMD *needs* this chip to be 80% faster than the current A64 because they are already 40% behind intel in performance. Intel is also releasing an uber-chip before the end of the year, so AMD really has to stay on their toes.

Actually I could see AMD going under within the next few years if they continue along their current path. They have been late with a bunch of their stuff over the past few years, and have lost the performance lead in both graphics and processors.

AMD has been in more dire straights than this. Server sales are still strong, despite Intel's performance during the second half of 2006. ATI lost the absolute lead in graphics performance, but they dropped their prices accordingly and now offer a great value in their X19xx series.

We have yet to see the fruits of ATIs merger with AMD; that may be another 2 years down the pipe.

 

[IntelUser2000]

Not necessarily.

AMD *needs* this chip to be 80% faster than the current A64 because they are already 40% behind intel in performance. Intel is also releasing an uber-chip before the end of the year, so AMD really has to stay on their toes.

Actually I could see AMD going under within the next few years if they continue along their current path. They have been late with a bunch of their stuff over the past few years, and have lost the performance lead in both graphics and processors.

They are ONLY behind 40% in rare cases in DESKTOP. In servers, AMD still has some sort of an advantage in 2P, and becomes bigger as processor counter increases. They will be able to get close to 40% advantage in FP just because they have a superior platform for more than 1 processor.

AMD Barcelona will be 80% faster per clock/per core than the current Opteron, probably in Linpack. But then Clovertown is also twice as faster per clock/per core as the previous gen chips.

 

[Regs]

Originally posted by: Acanthus

This press release saying basically nothing other than "it will be faster than our current cpu at some things" with no tangible numbers isnt promising in my eyes.

Then again we didn't really know anything about the K8 and it's IMC before release did we?

I mean If we pulled up archives about the K8 before it hit release most of us didn't even care to comment on it as we were all skeptical that the IMC would improve anything. Even so the IMC didn't control all of the performance gain, in reality all it did was create more memory bandwidth and reduce memory latency, but they had to create a core that could take advantage of it.

So who knows what the Barcelona or K10 has to offer. Lets just hope AMD is thinking ahead this time, as I seriously doubt Intel will stay stagnant for over 5 years like they did the last time.

 

[zephyrprime]

Originally posted by: dmens
anyone who claims an 80% no-strings-attached improvement the cpu field is a liar and/or a marketer. case in point, to bump FP performance by 80% on an x86 core on a similar design budget as the previous core, even with two generations of process tech, would cripple its other functions and turn it into a niche machine (i.e. cell).

Not really. They were probably talking about SSE and the conroe inproved SSE performance more than 80% over the prescott and K8.

 

[Hard Ball]

Originally posted by: zephyrprime

Originally posted by: dmens
anyone who claims an 80% no-strings-attached improvement the cpu field is a liar and/or a marketer. case in point, to bump FP performance by 80% on an x86 core on a similar design budget as the previous core, even with two generations of process tech, would cripple its other functions and turn it into a niche machine (i.e. cell).

Not really. They were probably talking about SSE and the conroe inproved SSE performance more than 80% over the prescott and K8.

They are not talking about SSE performance.

 

[IntelUser2000]

Then again we didn't really know anything about the K8 and it's IMC before release did we?

I mean If we pulled up archives about the K8 before it hit release most of us didn't even care to comment on it as we were all skeptical that the IMC would improve anything. Even so the IMC didn't control all of the performance gain, in reality all it did was create more memory bandwidth and reduce memory latency, but they had to create a core that could take advantage of it.

So who knows what the Barcelona or K10 has to offer. Lets just hope AMD is thinking ahead this time, as I seriously doubt Intel will stay stagnant for over 5 years like they did the last time.

Before release?? Err, AMD themselves claimed 20% performance increase from the integrated memory controller alone as the performance increase over K7. Maybe all you did was read Anandtech articles and that's why you wouldn't know. If you actually looked more about K8 back in those days, AMD claimed the 800MHz prototype K8 performed like 1.5GHz Pentium 4, much before release.

Now they are being much more vague about the actual performance. Its posted everywhere the performance increase in floating point is 3.6x over their own dual core, and 40% over Clovertown. But all they are doing is just rehashing the old claims last year.

To remind people:
40% over Woodcrest in SpecFP_Rate:
70% over Woodcrest in OLTP:

Hint: Woodcrest is a dual core and AMD was showing quad core advantages

 

[IntelUser2000]

They are not talking about SSE performance.

Are they?? I bet they are talking about Linpack. Why??:

1. They are talking about Barcelona and Clovertown, its obviously server chips
2. One of the most respected floating point benchmarks is Linpack
3. Linpack talks are always about the theoretical ability(Conroe can do 4 FLOPS/cycle, its dual core, so it can do 8 FLOPS/cycle in theory, but not in measured synthetic benchmarks, and nowhere in reality)
4. Conroe has 2x Linpack performance over Netburst in theory, and that came from SSE enhancements.

Barcelona = 3.6 x Dual Core Opteron

3.6/2 cores = 1.8

2x improvement per clock in Linpack, but slightly lower clock speeds make it 1.8x.

 

[Viditor]

Originally posted by: Acanthus

Originally posted by: Viditor

Originally posted by: Acanthus
Once you sift through the marketspeak, it doesnt seem like there are any tangible numbers there that translate to real world performance.

And to top it off, they wont be up against clovertown by the time they get this thing out, theyll be up against 45nm.

Ummm...Barcelona will be available in Q2 of this year, 45nm from Intel will be available in Q1 08, and we still don't know when the Xeon versions will be released.

The only tangible numbers would be the 80% increase in FP over current Opterons at the same clock on a core for core basis...
If you extrapolate that to current comparisons and remember that even current Opterons scale much better than Cloverton, a 40% edge is not improbable...
That said, I agree with the "skeptical" sentiment...show me!

"On track for first production by the end of 2007 with the Penryn family of processors (mobile, desktop and server), is Intel's 45nm manufacturing process."

Do you even read anandtech articles?

Considering they already have working ES samples, i'd say AMD doesnt have much wiggle room.

I dont want to see one sided crap we saw back in the day, id much rather AMD came out with something competitive, however with their enormous losses and their technological advantages all in the "maybe" pile, im skeptical to say the least.

This press release saying basically nothing other than "it will be faster than our current cpu at some things" with no tangible numbers isnt promising in my eyes.

Ummm...if they are "On track for first production by the end of 2007", then they would be released in mid 2008. It's usually 2 turns (~6 months) from first production to availability...the soonest is ~4 months with very little availability (paper launch).
The reason is that it takes ~3 months to turn a wafer into chips, followed by packaging, testing, and shipping.
I think that the first Penryn products will begin production on time in Q3 07 for availability at the end of Q4 or beginning of Q1 08.

 

[Nemesis 1]

Originally posted by: Viditor

Originally posted by: Nemesis 1


If you read this.

http://www.intel.com/technology/magazine/research/speculative-threading-1205.htm

The Mitosis system has been designed to optimize the trade-off between software and hardware to exploit speculative thread-level parallelism.

The Results
To illustrate the performance potential of the Mitosis compiler, let's look at a subset of the Olden benchmark suite. Olden benchmarks are pointer-intensive programs that make it difficult for automatic parallel compilers to extract any thread-level parallelism.


Figure 3. In this graph, the blue bars show the performance improvement going from an in-order to an out-of-order
core with about twice the amount of resources. The red bars indicate the performance of a processor with perfect
memory, illustrating the potential performance improvement for any technique that targets simply reducing memory latency. The yellow bars show the performance gains that result when using Mitosis with a four-core processor.

The results obtained by the Mitosis compiler/architecture for this subset of the Olden benchmarks are very encouraging, outperforming single-threaded execution by 2.2x. When compared with a big out-of-order core, the speed increase is close to 2x. One can also see that the benefits of Mitosis do not come only from reducing memory latency?using Mitosis enables the system to outperform an ideal system with perfect memory by about 60 percent. Overall, this work demonstrates that significant amounts of thread-level parallelism can be exploited in irregular codes, with a rather low overhead in terms of extra (wasted) activity.

I'm with Furen on this...
I'm not sure what the Mitosis project has to do with Penryn or derivatives.
Mitosis isn't even close to being implemented (if it ever is). It is an interesting concept that is based mainly on a new type of compiler.

If you do a search through the forums, we had some really good discussions about Mitosis when the rumours about "reverse hyperthreading" first came out...

Of course you would stand with Furen on this . But why would intel introduce H/T into a mult core processor . When most programms are single threaded??
Unless Intels new H/T is able to use more cores to run 1 thread. Thats hyper threading also. We all know intel bought the Russian company Elbrus in 04. Now if you read this link . You will see that penryns Compiler is much improved with some pretty cool things it can do. Also read anand's report on penrtn Intel has 23% room with the number of transitors it uses , What do you think intel is doing with those transitors.

You said penryn was a dumb shrink. Many times. But what we know now its way more than that.

http://techreport.com/etc/2006q4/fall-idf/index.x?pg=1

Heres a quote from above link.


The bulk of SSE4's 50 or so instructions is comprised of new compiler vectorization primitives, which should make it easier for compilers to translate software written in high-level languages into effectively parallelized code and data structures. These new instructions encompass both integer and floating-point operations, and include provisions for dual- and quad-word multiplication, blending, and format conversions. SSE4 also has some related "media accelerator" functions that expand SSE's capabilities. Among them are four instructions that round floating-point values to integers and a floating-point dot product capability that should prove especially useful for graphics. Taken together, Intel expects these new instructions to help further the traditional promise of SSE as an accelerator for multimedia, 3D gaming, graphics, and scientific computing.

To be perfectly fair tho. I didn't exspect to see H/T until. Nehalem. I really believe thats still the case but if intel brings it with Penryn thats cool.

 

[Nemesis 1]

Originally posted by: Viditor

Originally posted by: Acanthus

Originally posted by: Viditor

Originally posted by: Acanthus
Once you sift through the marketspeak, it doesnt seem like there are any tangible numbers there that translate to real world performance.

And to top it off, they wont be up against clovertown by the time they get this thing out, theyll be up against 45nm.

Ummm...Barcelona will be available in Q2 of this year, 45nm from Intel will be available in Q1 08, and we still don't know when the Xeon versions will be released.

The only tangible numbers would be the 80% increase in FP over current Opterons at the same clock on a core for core basis...
If you extrapolate that to current comparisons and remember that even current Opterons scale much better than Cloverton, a 40% edge is not improbable...
That said, I agree with the "skeptical" sentiment...show me!

"On track for first production by the end of 2007 with the Penryn family of processors (mobile, desktop and server), is Intel's 45nm manufacturing process."

Do you even read anandtech articles?

Considering they already have working ES samples, i'd say AMD doesnt have much wiggle room.

I dont want to see one sided crap we saw back in the day, id much rather AMD came out with something competitive, however with their enormous losses and their technological advantages all in the "maybe" pile, im skeptical to say the least.

This press release saying basically nothing other than "it will be faster than our current cpu at some things" with no tangible numbers isnt promising in my eyes.

Ummm...if they are "On track for first production by the end of 2007", then they would be released in mid 2008. It's usually 2 turns (~6 months) from first production to availability...the soonest is ~4 months with very little availability (paper launch).
The reason is that it takes ~3 months to turn a wafer into chips, followed by packaging, testing, and shipping.
I think that the first Penryn products will begin production on time in Q3 07 for availability at the end of Q4 or beginning of Q1 08.

Your own words. Since K8l isn't in production yet. We won't see them until at least 6 months after they start product or does AMD have better manufactoring abilities than Intel. Intels demo of penryn shows it working in programms . AMD demo showed it working in task manager . Only . So Amd more than likely has to do 1 or 2 more respins of the core before it can go into production . After they get an exceptable core than 6 months from that date we well see processors going out to DELL and other oems.

 

[BitByBit]

Originally posted by: IntelUser2000

Before release?? Err, AMD themselves claimed 20% performance increase from the integrated memory controller alone as the performance increase over K7. Maybe all you did was read Anandtech articles and that's why you wouldn't know. If you actually looked more about K8 back in those days, AMD claimed the 800MHz prototype K8 performed like 1.5GHz Pentium 4, much before release.

Perhaps you would care to provide us with a link citing AMD attributing the performance increase of K8 over K7 solely to the IMC. What AMD did say was that the IMC was responsible for 20% of the increase in IPC over K7. That means 80% was down to K8's architectural improvements, which are myriad. For a comprehensive review of these improvements, go here.
So much for AMD stating the IMC to be the sole reason for the IPC improvement. You clearly made that up.

Moving on, I think we can expect the increase in IPC of K8L over K8 to be atleast the increase we saw of K8 over K7. Many of the architectural enhancements AMD has made to the K8L were also made in K8. Off the top of my head, here are some enhancements common to both K8 and K8L:

? Improved branch prediction (doubled number of entries)
? Doubled TLBs
? Reduction in memory latency*
? Doubled L1 <-> L2 bus (64b to 128b in K8, 128b to 256b in K8L)

* The inclusion of L3 cache should have a similar effect on memory latency as the IMC, although I am speculating here.

K8L also includes some enhancements not common to both. Again, off the top of my head, these are:

? Doubled instruction fetch per cycle (32B vs 16B)
? Out-of-order loads
? Doubled SSE (and x87?) execution width
? Doubled SSE decode rate

There are probably things I've missed here, but it's hard to make a more in-depth comparison between K8 and K8L without more information.
One thing I am certain of however, is that K8L will be more than a match for Core, clock for click. The question is whether Core's likely frequency advantage will prove too much for K8L.

 

[Acanthus]

Originally posted by: Nemesis 1

Originally posted by: Viditor

Originally posted by: Acanthus

Originally posted by: Viditor

Originally posted by: Acanthus
Once you sift through the marketspeak, it doesnt seem like there are any tangible numbers there that translate to real world performance.

And to top it off, they wont be up against clovertown by the time they get this thing out, theyll be up against 45nm.

Ummm...Barcelona will be available in Q2 of this year, 45nm from Intel will be available in Q1 08, and we still don't know when the Xeon versions will be released.

The only tangible numbers would be the 80% increase in FP over current Opterons at the same clock on a core for core basis...
If you extrapolate that to current comparisons and remember that even current Opterons scale much better than Cloverton, a 40% edge is not improbable...
That said, I agree with the "skeptical" sentiment...show me!

"On track for first production by the end of 2007 with the Penryn family of processors (mobile, desktop and server), is Intel's 45nm manufacturing process."

Do you even read anandtech articles?

Considering they already have working ES samples, i'd say AMD doesnt have much wiggle room.

I dont want to see one sided crap we saw back in the day, id much rather AMD came out with something competitive, however with their enormous losses and their technological advantages all in the "maybe" pile, im skeptical to say the least.

This press release saying basically nothing other than "it will be faster than our current cpu at some things" with no tangible numbers isnt promising in my eyes.

Ummm...if they are "On track for first production by the end of 2007", then they would be released in mid 2008. It's usually 2 turns (~6 months) from first production to availability...the soonest is ~4 months with very little availability (paper launch).
The reason is that it takes ~3 months to turn a wafer into chips, followed by packaging, testing, and shipping.
I think that the first Penryn products will begin production on time in Q3 07 for availability at the end of Q4 or beginning of Q1 08.

Your own words. Since K8l isn't in production yet. We won't see them until at least 6 months after they start product or does AMD have better manufactoring abilities than Intel. Intels demo of penryn shows it working in programms . AMD demo showed it working in task manager . Only . So Amd more than likely has to do 1 or 2 more respins of the core before it can go into production . After they get an exceptable core than 6 months from that date we well see processors going out to DELL and other oems.

Im not seeing the argument either, its not like AMD is showing off working Barcelona samples either.

 

[Agent11]

I hope AMD isn't just being 'optimistic' for their shareholders. With Intel moving toward 45nm already AMD needs to pull a rabbit out of their hat.

 

[IntelUser2000]

Perhaps you would care to provide us with a link citing AMD attributing the performance increase of K8 over K7 solely to the IMC. What AMD did say was that the IMC was responsible for 20% of the increase in IPC over K7.

Whatever. Keep dreaming. It looks like you are the one making stuff up, not me. In your view, I "Clearly" made it up, but I can back it up with links and looks like you aren't so clear on yourself. Funny.

http://www.lostcircuits.com/tradeshow/idf_2002/3.shtml

"On a clock for clock basis, the estimated performance gain through the enhanced TLBs is in the order of 5% compared to the Athlon XP, moreover, the reduced memory controller latencies result in an additional 15-20 % performance gain so that the net improvement over the Athlon XP is in the order of 20-25%."

Right from the horse's mouth:
http://www.amd.com/us-en/assets/content...oadableAssets/Opteron_Press_Preso2.pdf

Page 13:
"(Note: the AMD Opteron processor is planned to provide 20-25% better performance than the AMD Athlon processor -- 20% from on-chip low latency memory controller and 5% from improvements on processor core)"

 

[verndewd]

Originally posted by: Nemesis 1

Originally posted by: Viditor

Originally posted by: Duvie
I need to see hard numbers and not marketing hype.....

I really interested in seeing the 3 levels of cache as well.

I agree...I think we both said the exact same thing when the C2D hype came out a year ago.
Nonetheless, it's encouraging to see that at least the hype matches the expectations most of us had (based on the design notes we've seen).

No comparsion to last years C2D hype. Intel showed a working C2D last year. Still many wouldn't except the facts and called it hype

But that claim was quickly knocked down by actual benches.It has been nearly 2 months since the alledged barcelona ran task manager,,,,still waiting for benches.

 

[verndewd]

Originally posted by: Agent11
I hope AMD isn't just being 'optimistic' for their shareholders. With Intel moving toward 45nm already AMD needs to pull a rabbit out of their hat.

ok I have been saying something else from somewhere else, but that will do.
One of the most disturbing things is the length of time at the same node and the drawn out scaling.

With Intel playing the High K and everyone joining in,it makes it look like people were purposefully holding back,,,,I am not buying the little guy scoop from AMD with IBM standing in the main office for so long;Add to that the list of high K constituents.

Likely Barcelona will do well against Intel,as well as am2+ But i wont be giving points for the dirt brought in from folks dragging their feet.Its nearly insulting to the whole supply and purchase relationship.

Suffice it to say I am calling B.S. and I am guessing a perf gain average of 15-27% if any on barcelona,versus clovertown,I will give a max guestimate at low 30's.

 

[Viditor]

Originally posted by: Nemesis 1

I'm with Furen on this...
I'm not sure what the Mitosis project has to do with Penryn or derivatives.
Mitosis isn't even close to being implemented (if it ever is). It is an interesting concept that is based mainly on a new type of compiler.

If you do a search through the forums, we had some really good discussions about Mitosis when the rumours about "reverse hyperthreading" first came out...

Of course you would stand with Furen on this . But why would intel introduce H/T into a mult core processor . When most programms are single threaded??
Unless Intels new H/T is able to use more cores to run 1 thread. Thats hyper threading also. We all know intel bought the Russian company Elbrus in 04. Now if you read this link . You will see that penryns Compiler is much improved with some pretty cool things it can do. Also read anand's report on penrtn Intel has 23% room with the number of transitors it uses , What do you think intel is doing with those transitors.

You said penryn was a dumb shrink. Many times. But what we know now its way more than that.

http://techreport.com/etc/2006q4/fall-idf/index.x?pg=1

Heres a quote from above link.


The bulk of SSE4's 50 or so instructions is comprised of new compiler vectorization primitives, which should make it easier for compilers to translate software written in high-level languages into effectively parallelized code and data structures. These new instructions encompass both integer and floating-point operations, and include provisions for dual- and quad-word multiplication, blending, and format conversions. SSE4 also has some related "media accelerator" functions that expand SSE's capabilities. Among them are four instructions that round floating-point values to integers and a floating-point dot product capability that should prove especially useful for graphics. Taken together, Intel expects these new instructions to help further the traditional promise of SSE as an accelerator for multimedia, 3D gaming, graphics, and scientific computing.

To be perfectly fair tho. I didn't exspect to see H/T until. Nehalem. I really believe thats still the case but if intel brings it with Penryn thats cool.
[/quote]

I don't think you understand Mitosis...or compilers.
1. Chips don't have compilers...compilers are software
2. 90% of getting Mitosis to work has nothing to do with the chips, it involves changing the software industry. The hardware just allows it to happen...
3. HT has nothing to do with speculative threading (Mitosis). (not sure why you think it does...)
4. Penryn IS a dumb shrink in that if you run a Penryn chip and a Conroe chip side by side at the same clockspeed, the only time you'd go faster on Penryn is if the software has been written with SSE4 code...and that won't be happening anytime soon. (it certainly doesn't effect todays programs)

 

[Viditor]

Originally posted by: Nemesis 1

Your own words. Since K8l isn't in production yet. We won't see them until at least 6 months after they start product or does AMD have better manufactoring abilities than Intel. Intels demo of penryn shows it working in programms . AMD demo showed it working in task manager . Only . So Amd more than likely has to do 1 or 2 more respins of the core before it can go into production . After they get an exceptable core than 6 months from that date we well see processors going out to DELL and other oems.

What makes you think Barcelona isn't in production yet?
My guess is that AMD will demo it across the street from the Spring IDF...why should they do it sooner?

 

[DrMrLordX]

Originally posted by: Viditor

4. Penryn IS a dumb shrink in that if you run a Penryn chip and a Conroe chip side by side at the same clockspeed, the only time you'd go faster on Penryn is if the software has been written with SSE4 code...and that won't be happening anytime soon. (it certainly doesn't effect todays programs)

Penryn has more L2 cache, so it should be faster at the same clock speed when running cache-sensitive apps.

 

[IntelUser2000]

4. Penryn IS a dumb shrink in that if you run a Penryn chip and a Conroe chip side by side at the same clockspeed, the only time you'd go faster on Penryn is if the software has been written with SSE4 code...and that won't be happening anytime soon. (it certainly doesn't effect todays programs)

No. It's almost a dumb shrink.

1. It'll have Hyperthreading
2. It'll have 50% more cache
3. Intel hints about additional architectural improvements

Pentium III/4's had straight shrinks, only adding more cache. Dothan wasn't a straight shrink either. Anand had an overview about it.