AMD sheds light on Bulldozer, Bobcat, desktop, laptop plans

[Phynaz]

I have noticed this L3 cache take up quite a bit of die size as well as adding quite a bit of xtors.

Something tells me this approach isn't really energy efficient or cost effective. But I guess there comes at point where there is nothing else than can be done.

Cache is cheap and relatively low power. They wouldn't use so much if it wasn't effective.

 

[cbn]

Cache is cheap and relatively low power. They wouldn't use so much if it wasn't effective.

I said that because I noticed Phenom II die size is much larger than Athlon II die size.

 

[Idontcare]

Cache is cheap and relatively low power. They wouldn't use so much if it wasn't effective.

Yep, and it is rare that we get the opportunity to have two very real-world products at our disposal to assess the actual magnitude of the performance impact on an apples-to-apples basis but AMD did that for us too:

AMD Athlon II X4 620 & 630: The First $99 Quad Core CPU

Like the rest of the Athlon II lineup there is no L3 cache. This helps keep the die small (and affordable) but also hurts performance:

At the same clock speed the Athlon II X4 should offer roughly 90% of the performance of a Phenom II X4.

http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=3638

Interesting how for some apps the added L3$ latency just gets in the way (kind of like HT, or any other shared resource under the right conditions).

The L3$ elevates the die size by some 52% (258/169) and yet it merely boosts performance by around 11% in the application categories that Anand tested.

While that data alone proves little about the choices of the architectural trade-offs made with PhenomII vs AthlonII, it does go to further show that for today's desktop applications the vast majority of them are not fine-grained IPC-bound applications which large shared caches are implemented to speed-up. (presumably Deneb exists because Shanghai exists, and in server apps one will encounter more fine-grained apps that will see a larger performance boost from the L3$)

 

[JFAMD]

To someone like me (who is doesn't know much about computer science) higher IPC makes sense. Even if scaling per core is less the overall effect is still greater.

On top of that I wonder how much power their dual module (quad core) Bulldozer will draw? I am guessing it won't draw that many watts relative to its processing power.

That is only a strategy up to a point.

Think of a highway. If you have more traffic building up, you could raise the speed limit. But there is a point of diminishing returns (not everyone drives a fast car). Adding extra lanes helps you add more capacity.

 

[IntelUser2000]

I said that because I noticed Phenom II die size is much larger than Athlon II die size.

Cache is far more efficient and easier to implement than improving other parts of the processor. Plus, in regards to power, it costs very little. Moore's Law is allowing so much more space and transistors than ever before, yet the easy way of just throwing more hardware to increase performance isn't yielding as good of a performance increase compared to say, adding cache.

The Nehalem uArch might be more sensitive to L3 cache changes than on the Phenom II. Might be a reason why even the Nehalem based Celerons will have L3 caches.

 

[cbn]

Cache is far more efficient and easier to implement than improving other parts of the processor. Plus, in regards to power, it costs very little. Moore's Law is allowing so much more space and transistors than ever before, yet the easy way of just throwing more hardware to increase performance isn't yielding as good of a performance increase compared to say, adding cache.

Yep it is just amazing to me how weak CPU speed-up is becoming compared to GPU speed up with respect to games.

From 1996 to 2003 (as far as I can remember) we had speed increases of 200 Mhz to 3000 Mhz...all of this resulting in basically linear increases in performance.

Now process shrinks result in space for more cores....but unfortunately these additional cores can't add much immediate performance. Instead we have to wait for the software to catch up.

 

[IntelUser2000]

Yep it is just amazing to me how weak CPU speed-up is becoming compared to GPU speed up with respect to games.

From 1996 to 2003 (as far as I can remember) we had speed increases of 200 Mhz to 3000 Mhz...all of this resulting in basically linear increases in performance.

Now process shrinks result in space for more cores....but unfortunately these additional cores can't add much immediate performance. Instead we have to wait for the software to catch up.

That's because ever since we started having hardware T&L and offloading more graphics code on the GPU, the less there is for a CPU to do. The bottleneck of performance in graphics is not in AI or physics or whatever the CPU is doing, but rather textures and shading which the GPU does.

Say 10% of the total performance is responsible for the CPU part, and the 90% is the GPU. Speeding up the CPU by 2x would only give us 10% increase, while speeding up the GPU only by 1.2x would give us 18% increase. It's not that straightforward, but you know what I mean.

Even with the best multi-core optimization, we will never see a CPU performance increase as fast as GPU does in GPU apps.

 

[DrMrLordX]

The whole issue of calling a "Netbook" with processors like Bobcat and Atom is that depending on what the manufacturer wants to do it might be a "Netbook", or become a "Notebook", its hard to draw the line. Doesn't it seem likely the market will at least put Bobcat into the high-end Netbook segment with the rough die and power estimations they gave us? The 1-10W range seems like we'll see single and dual core versions with low and higher TDP versions of each. It looks like AMD will fill the niche Via is leaving behind, that is a notch higher than Atom, but lower than regular laptop CPUs.

This is true . . . the entire term "netbook" is mere marketing.

With a sufficiently-efficient chipset, I'm sure Bobcat could be deployed in quad core form in a high-end "netbook" (or low-end notebook) if someone really wanted (dual core seems more probable), while staying within the same general power envelope that Atom + 945GSE occupies now. This is assuming that there would be a migration to other lower-power components as well, such as DDR3 SODIMMs instead of the DDR2 SODIMMs you find in many Atom products.

I just think it's a little odd that AMD would go so far as to say, hey, we don't want to be in the netbook market. It's not like they could really control that anyway, not without shooting themselves in the foot. I don't think they could position Bobcat to fight and win in any device that's supposed to be lower-powered than a current netbook.

Possibly, we might see dual core versions of Medfield and its derivatives. Maybe that and some architectural enhancements. Clock speed increases doesn't seem too efficient. Dual cores were already hinted with Moorestown, and integrated memory controller on a in-order CPU should do good.

I would agree that, with Atom, they will probably get more potential performance by adding more cores rather than increasing clockspeeds.

Why was OOO processing not implemented in Atom to begin with? Was a public reason ever stated?

I'd assume that while OOO improves performance it doesn't do so while adhering to the 2:1 rule - "a 2% peformance increase can increase power-consumption by no more than 1%".

My guess would be that they assumed that an in-order cpu with multiple cores and/or SMT would provide "good enough" performance for the average target user while offering a modest reduction in power draw versus an out-of-order architecture. So, even if the trade-off of processing power for lower power draw probably wasn't "worth it" from a raw performance perspective, the loss of performance was something the target user was intended to not notice or particularly mind.

 

[IntelUser2000]

This is true . . . the entire term "netbook" is mere marketing.

With a sufficiently-efficient chipset, I'm sure Bobcat could be deployed in quad core form in a high-end "netbook" (or low-end notebook) if someone really wanted (dual core seems more probable), while staying within the same general power envelope that Atom + 945GSE occupies now. This is assuming that there would be a migration to other lower-power components as well, such as DDR3 SODIMMs instead of the DDR2 SODIMMs you find in many Atom products.

The chipset differences in Netbooks isn't that much of a problem. FYI, aside from the 2.2W TDP US15W chipset used in MIDs/UMPCs, the 945GSE is one of the least power using chipsets out there. The extra 1-2 watts might not matter too much if the other parts of the platform fail to perform.

-The manufacturer might have chosen less efficient "other" devices, like the screen, hard drive, and other peripherals
-The software configuration related to power management might be subpar, or is just plainly bloated
-The device itself might have a smaller battery capacity, or the battery management isn't done too well, reducing the real world usage battery life

I'm pretty sure majority of the Netbook popularity is due to being cheap. Even if it used a lower power US15W chipset, the gains in battery life experiences diminishing returns due to other parts of the system remaining equal(read the reviews of few Menlow-based Netbooks out there yourself), and a possible reason why Intel wants to focus more on the MID/UMPC than Netbook. There, the CPU+chipset power differences start to matter.

First priority in Netbooks is that it has to be cheap. Can Bobcat do that WHILE maintaining performance, AND offering superior experience and graphics?

 

[DrMrLordX]

The chipset differences in Netbooks isn't that much of a problem. FYI, aside from the 2.2W TDP US15W chipset used in MIDs/UMPCs, the 945GSE is one of the least power using chipsets out there. The extra 1-2 watts might not matter too much if the other parts of the platform fail to perform.

I was under the impression that moving a chip like Atom away from chip + northbridge/southbridge(945GSE) to System on Chip would potentially save 5-10W system-wide (at least by the time Atom makes the jump to 32nm anyway). Of course, that's more of an intuitive guess than anything else, but . . .

First priority in Netbooks is that it has to be cheap. Can Bobcat do that WHILE maintaining performance, AND offering superior experience and graphics?

It stands to reason that production costs for Bobcat will be largely determined by transistor count and process (not counting R&D of course, but if it's close enough in architecture to K8 or K10, then R&D costs may not be significant). AMD can already produce an L3-less quad and sell it for $99 (Athlon X4 620) retail, complete with HSF, that operates at 2.6 ghz. Assuming Bobcat is enough like K8 or K10 to have a somewhat similar transistor count to, say, an X4 620 when in quad configuration, then it stands to reason that AMD could supply the chip to OEMs for $100 or less at a clockspeed of 1-1.5 ghz or so (maybe faster) which would murder Atom every which way until next Tuesday (at what power draw, it's hard to say, but if AMD has a 65W K10 quad waiting in the wings that will allegedly run at 2.3-2.4 ghz, then . . . ). This would not hold true if Bobcat winds up with a bunch of extra die real-estate dedicated to SoC functions or fusion-related functions, but we can only guess at that right now.

AMD has demonstrated that they can produce chipsets at a price point similar enough to Intel to remain competitive (it certainly helps that, when compared to the 945GSE, their chipsets need not contain a memory controller).

So the only real question is the IGP . . . the question of whether or not AMD can produce an IGP that is faster than what Intel currently offers (or will offer in the future) at a cost-of-manufacture that will keep the theoretical Bobcat system in the Netbook price range is a matter of process and transistor count. Assuming this "faster" AMD IGP will have a higher transistor count than the IGP currently on Atom netbooks, this would require AMD to produce the IGPs using a smaller process than whatever Intel used for their netbook IGPs . . . but without knowing more about what fab space was used by Intel for IGP production, it's hard to say how far AMD's process technology would have to advance in order for this to happen.

It's safe to say that AMD could probably roll out a Bobcat-based dual-core or quad-core netbook at the same price-point that netbooks are currently selling in once AMD makes the move to 32nm. Er, well, I think. Whether or not they can do it with GF's current fabs (or TSMC's or someone else's now that AMD can farm out chip production however they like) is unknown.

 

[IntelUser2000]

Does Bobcat feature integrated memory controller? I am not sure if its confirmed yet, but I've read about Fusion variants, so it might as well be.

 

[DrMrLordX]

It's hard to say. The limited information I've seen (which is the same stuff everyone else has seen) doesn't provide any answers to that question. My guess would be "yes" if only because it's been awhile since AMD released a CPU without an IMC.

Upon re-examination of Bobcat data, I'm seeing some mixed messages. Some are saying Bobcat will be a sub-1W to 5W part, while others are saying 1W-10W. Anandtech's article made it out to look like a chip with 90% of the performance of K8 with half the die size. Hmm . . . oh well. Time will tell what Bobcat really is and what market segments it will hit.

 

[DrMrLordX]

It's hard to say. The limited information I've seen (which is the same stuff everyone else has seen) doesn't provide any answers to that question. My guess would be "yes" if only because it's been awhile since AMD released a CPU without an IMC.

Upon re-examination of Bobcat data, I'm seeing some mixed messages. Some are saying Bobcat will be a sub-1W to 5W part, while others are saying 1W-10W. Anandtech's article made it out to look like a chip with 90% of the performance of K8 with half the die size. Hmm . . . oh well. Time will tell what Bobcat really is and what market segments it will hit.

 

[jvroig]

Some are saying Bobcat will be a sub-1W to 5W part, while others are saying 1W-10W.

I often get confused about that as well. The slides from AMD seem to clearly indicate 1-10W, or so I thought, but upon reviewing those that I can find, all I found was a phrase saying "scale as low as 1W", and then in a different slide it was billed as "sub-1W capable". If AMD can't get it straight, no surprise we can't either (see two images below, first one says "as low as 1 watt" while the second one says "sub 1 watt")

 

[CTho9305]

How long has it been since AMD stopped using the "Smarter Choice" presentation templates?

 

[Idontcare]

How long has it been since AMD stopped using the "Smarter Choice" presentation templates?

September 18, 2008

 

[jvroig]

How long has it been since AMD stopped using the "Smarter Choice" presentation templates?

I have no idea. Do you mean to say one of those slides is too old and probably obsolete? I got them from the most recent articles at AnandTech about the latest AMD-released information on Bulldozer/Bobcat architecture. I suppose it would be possible that Anandtech merely recycled an old slide simply to accompany the article.

EDIT: Looks like IDC knows, and posted it as I was typing this. So does that mean the "Smarter Choice" slide about Bobcat is obsolete?

 

[Idontcare]

So does that mean the "Smarter Choice" slide about Bobcat is obsolete?

Not as far as I can tell, the info in the older slide is generic enough that I don't see where it conflicts with anything that has said about bobcat more recently.

While it is true that you do have to know when to read between the lines of certain poster's posts (as their position of employment may require them to be seemingly obtuse on certain topics) I can't really tell if CTho9305 made that question to say "that slide is so old how could you possibly consider the info on it to be relevant anymore?" or if he's just lol'ing at the timelessness of the info contained in some of the dated AMD slides.

plus ça change, plus c'est pareil

 

[jvroig]

I hope this is not much of a derailment, but since it is about AMD's supposed "leadership" being only a myth, it does have some relevance in a thread about their most ambitious roadmap to date...

IDC, thanks to the links you sent to point me to BSN, Fudzilla, and INQ, I ran across this article about AMD. How factual is this? Despite the AMD-bashing, it does sound well-researched and rather "factual", but I do not have enough knowledge about the matter to make an educated opinion.

If that article pointing to how AMD has always been second-fiddle to Intel is absolutely true, and there's no such thing as Intel and AMD leap-frogging each other because Intel has always been on top, then there does seem to be little reason to think Bulldozer/Bobcat would suddenly be any different?

 

[CTho9305]

I'm not being subtle or anything. I just found it strange that Anand pulled together slides from so far apart and didn't point out the dates. It really stood out since everything in Anand's article is black except for that one slide. Took me a while to figure out where that slide came from. I don't see why he didn't just grab slide 15 of the "technology group" presentation here (by the way, those presentations have some pretty cool pictures, and at higher resolution than the snapshots Anand posted).

 

[IntelUser2000]

If that article pointing to how AMD has always been second-fiddle to Intel is absolutely true, and there's no such thing as Intel and AMD leap-frogging each other because Intel has always been on top, then there does seem to be little reason to think Bulldozer/Bobcat would suddenly be any different?

I'm pretty sure Phil( ) might respond back, and its not a direct reply to me but I feel I should do my own part to reply back. You don't mind right?

A little bit of history:
-Pentium II released at 0.35 micron process in May 7, 1997
-Pentium III released at 0.25 micron process in February 26, 1999
-Pentium 4 released at 0.18 micron process in November 20, 2000

It's part of Intel slacking(?) that created AMD leapfrogging them. It's arguable whether AMD ever had the capability of competing by themselves without acquisition and designing in-house instead, but let's look at Intel.

During the 3.5 years of period between Pentium II and Pentium 4 was the part with least amount of innovation coming from Intel in processors. They rested on their laurels, after releasing the revolutionary Pentium Pro processor which for the first time in MPU history, made the world stop doubts about whether Intel would be capable of making(or anyone else for that matter) an x86 CPU that can compete performance-wise with RISC processors. Pentium II was the mainstream desktop part of Pentium Pro which brought similar revolutionary performance improvements.

What did Intel do with the Pentium III? Nothing. Aside from the possible changes which are only relevant to the engineers and not to the buyer, only significant thing that differentiated between the II and the III were the SSE instruction set, which needed programmers to optimize to get full capability out of the processor. The FSB changes aren't processor related, and the on-die cache came first with the mobile Pentium II processors at 0.18 microns.

~4 years between two major microarchitectural innovations.

AMD caught up during the 3.5 years Intel stagnated. Design decisions for the Pentium 4 must have been done mostly in response to AMD's K6-3 and Athlon processors, but during that time, they didn't do anything significant. Pentium 4's demise wasn't due to lazyness/bad intentions as much as execution failure and direction failure. They did get their mindset right during the P4, it just didn't work out. The design was way ahead of its time, and execution failed because the changes were too radical. Overestimation of their capabilities.

Pentium III's failure wasn't like the Pentium 4 though. They could have turned it around. They did not. All bets were on the Pentium 4 which were years away.

(Back then when Netburst was first announced, it was an exciting processor from a hardware enthusiast point of view. It wasn't elegant. And if you ignored the horrible performance per clock, the radical changes were... I dare to say, fun. Nevertheless I was a fan of it until I understood more.

-Double Pumped ALU
-Execution Trace cache
-Very long hyper-pipelined architecture
-Aggressive speculation and prefetch capabilities
-Later known, a replay feature
-Simultaneous Multi-threading in later iterations, aka Hyperthreading)

Yes, significant amount of AMD's lead were due to Intel's missteps. For the Pentium III generation, it wasn't even excusable as it was basically slack. Pentium 4 was management and execution failure.

 

[evolucion8]

I'm pretty sure Phil( ) might respond back, and its not a direct reply to me but I feel I should do my own part to reply back. You don't mind right?

A little bit of history:
-Pentium II released at 0.35 micron process in May 7, 1997
-Pentium III released at 0.25 micron process in February 26, 1999
-Pentium 4 released at 0.18 micron process in November 20, 2000

And that's not including their variants like the 0.13nm process in the Pentium 3 known as the Tualatin which was some sort of shot lived family of processors which was very efficient and faster than any Pentium 4 below the 2.0GHz mark. Asides from the Pentium 3 which saw 3 different manufacturing process and only lasted 2 years before the Netburst debut, the Pentium 4 lasted over 7 years with little progress and got 4 different manufacturing processes and little tweaks, being the HT, EM64T and SSE3 the most significant changes in the Netdust architecture.

 

[IntelUser2000]

And that's not including their variants like the 0.13nm process in the Pentium 3 known as the Tualatin which was some sort of shot lived family of processors which was very efficient and faster than any Pentium 4 below the 2.0GHz mark. Asides from the Pentium 3 which saw 3 different manufacturing process and only lasted 2 years before the Netburst debut, the Pentium 4 lasted over 7 years with little progress and got 4 different manufacturing processes and little tweaks, being the HT, EM64T and SSE3 the most significant changes in the Netdust architecture.

I don't remember people complaining during the very successful days. Pentium 4 was originally slated to release in the late summer/early fall of 2000, not late-november. Had it not been delayed, 1.5GHz Pentium 4 would have been competing with sub-900MHz processors. Near-2GHz by November would have been possible.

Tualatin was a last ditch effort to bridge the gap since the Pentium 4 got delayed. It wasn't bad, but for most of its life Pentium III was a lame ass attempt to maximize profits without spurring innovation. Only enhancements Pentium III had over Pentium II were all in the Tualatin. Had the Pentium 4 executed well and never had thermal problems, we would have seen 7-8GHz Netburst derivative processors now. With the P4, they at least tried.

 

[Idontcare]

I thought the original motivation behind creating Tualatin (130nm PIII) was to have a lower-power smaller mobile part.

http://en.wikipedia.org/wiki/Pentium_III#Tualatin

 

[jvroig]

I'm pretty sure Phil( ) might respond back, and its not a direct reply to me but I feel I should do my own part to reply back. You don't mind right?

Thank you, your input is greatly appreciated, of course I don't mind... but who's Phil?