AMD sheds light on Bulldozer, Bobcat, desktop, laptop plans

Discussion in 'CPUs and Overclocking' started by thilanliyan, Nov 11, 2009.

  1. thilanliyan

    thilanliyan Diamond Member

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    #1 thilanliyan, Nov 11, 2009
    Last edited: Nov 11, 2009
  2. Phynaz

    Phynaz Diamond Member

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    OMG, Bulldozer is horribly misbalanced.

    I didn't think AMD could shock me any more, but they did.

    They had better wish for two things to happen in the next two years:

    1) General purpose FP loads are moved to GPU's.

    2) Applications become much, much more threaded.

    If that doesn't happen, then AMD will be in big, big trouble.
     
  3. theevilsharpie

    theevilsharpie Platinum Member

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    ROFL

    If AMD can pump out cheap low-power desktop and mobile chips in volume, they'll be just fine.
     
  4. Phynaz

    Phynaz Diamond Member

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    There's a saying in business - "He who lives by price dies by price".

    Being able to compete only on price is death, especially in an industry that requires the kind of funding that developing CPUs requires.
     
  5. Falloutboy

    Falloutboy Diamond Member

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    I think amd is taking a risk with this design but I think its something they have to do. they aren't like intel where they can have several parellel R&D programs. they have to pick something and hope it pans out the way they think.
     
  6. nismotigerwvu

    nismotigerwvu Golden Member

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    This seems like a high risk/high reward type move. I'm actually glad they acted instead of just steering the course for once. While nV has been trying to drum up GPGPU, having both an open standard (openCL) and a mainstream worth caring about (direct compute) I can see this sector really take off. Also, getting bobcat into netbooks and perhaps high end smartphones (depending on where that wattage range hits) could be a huuuuuuuuuge source of income.
     
  7. Idontcare

    Idontcare Elite Member

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    All that talk about cores and modules and two cores, etc, just confused the hell out of a me.

    So when AMD says a Zambezi CPU will have 4/8 Bulldozer Cores does that mean it will only have 2/4 of these "tightly link two-core modules"?

    [​IMG]

    [​IMG]
     
  8. IntelUser2000

    IntelUser2000 Elite Member

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    It's confusing to me too, but I think this might be a hint:

    "Two tightly linked cores..."

    8 clusters might be too large even at 32nm.
     
  9. GaiaHunter

    GaiaHunter Diamond Member

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    Well, I guess the smallest functional unit is 1 "bulldozer", which
    is composed by 2 smaller cores and seems to be in reality, 1.5 cores...

    Yeah it is confusing.

    I guess they want to say "Hey we have HT too" but then their HT is more hardware intensive and sounds a lot better to say you have 2 linked cores than 1.5 cores or a core that can do 2 threads.

    From 4/8 I read (4cores/8 threads)/(8 cores/16 threads).

    On the other hand 4/8 is different from "up to 6". Fucking slides.
     
    #9 GaiaHunter, Nov 11, 2009
    Last edited: Nov 11, 2009
  10. GaiaHunter

    GaiaHunter Diamond Member

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    Well,

    [​IMG]

    and

    [​IMG]

    Shouldn't this take care of number 1 concern? (non-ironic remark)
     
  11. piesquared

    piesquared Golden Member

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    Naw, I don't think they have any plans to ever say hey we have hyperthreading too. In fact, they have spoken out on the record saying they don't plan on having anything similar to hyperthreading, as it shows performance losses in some cases. Not really worth the real estate.
     
  12. IntelUser2000

    IntelUser2000 Elite Member

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    It SEEMS as though FP on CPU is being deprioritized with the advent of on-die GPUs and whatnot. Ironically, its really Intel doing Fusion-idea first. The push for CPU-accelerated vertex processing on their IGPs is a case in point. It's just that no one cares currently. Only matter of time CPUs start accessing GPU resources.

    Problem with thread is more complex, but Intel is currently pushing it with Hyperthreading, which by Bulldozer timeframe might be ready with more threaded apps.
     
  13. GaiaHunter

    GaiaHunter Diamond Member

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    Well they can call it whatever and their approach is different, that is for sure, but
    from http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=3674 ,

    when I read the above, even if they don't want to say HT, they want to say "look you have loads of CPU thingies on task manager, isn't that pretty?".
     
  14. Phynaz

    Phynaz Diamond Member

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    No, because current GPU's are only fast at extremely parallel applications that use a rather limited instruction set. That's why I mentioned general purpose floating point.

    Even if they manage to pull off a miracle and somehow create the next evolution in computing, notice on the slide it says "Next-Generation Software Ecosystem". A new generation of development tools and end user applications aren't going to happen in two years. Maybe, just maybe, you could pull it off in five if you were Intel and owned the compiler.
     
    #14 Phynaz, Nov 11, 2009
    Last edited: Nov 11, 2009
  15. IntelUser2000

    IntelUser2000 Elite Member

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    Meh, its not like the FPU is disappearing. 2x 128-bit FMAC equals to 2x 256-bit FPU that can do ADD and MUL each. In single thread, its effectively having a 256-bit FPU, while in multi-thread its probably limited by resource contention and bandwidth to take advantage of full 256-bit so 128-bit might be enough.

    Larrabee based on-die GPU might be able to do it.
     
  16. GaiaHunter

    GaiaHunter Diamond Member

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    Shouldn't the success of the future architecture than be dependent on future GPUs?

    Rumors have the next ATI generation end of 2010, more than in time to pair with bulldozer. Additionally, we still have to see what Fermi will do (although I don't think AMD is counting on what NVIDIA has to offer or not).
     
    #16 GaiaHunter, Nov 11, 2009
    Last edited: Nov 11, 2009
  17. IntelUser2000

    IntelUser2000 Elite Member

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    There's no way they'll be able to pair a end-2010 GPU with Llano, unless Llano is releasing at sometime like say, September. From what I heard the GPU performance will be at Radeon 4700-ish levels and will feature a 5x00 derivative core.
     
  18. Phynaz

    Phynaz Diamond Member

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    Yes, the FMAC is nice but the CPU still seems out of whack between INT and FP units to me.
     
    #18 Phynaz, Nov 11, 2009
    Last edited: Nov 11, 2009
  19. GaiaHunter

    GaiaHunter Diamond Member

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    Sure, but Llano isn't a bulldozer core, right? I was under the impression it is phenom II cores.

    My point was that, the perceived or real imbalance of the bulldozer core, might not be one if the 6xxx architecture solves the problems highlighted by Phynaz.
     
    #19 GaiaHunter, Nov 11, 2009
    Last edited: Nov 11, 2009
  20. Idontcare

    Idontcare Elite Member

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    Wait...so now we are finding out that AMD's "the future is fusion" marketing strategy is really more like "back to the future" with CPU's being Integer processors and the FPU being shoveled into math-coprocessors?

    [​IMG]

    What's next, move the CPU caches back onto the mobo? (j/k)
     
  21. Phynaz

    Phynaz Diamond Member

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    Lol, that's funny IDC.
     
  22. GaiaHunter

    GaiaHunter Diamond Member

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    Well, being in a single die has to count for innovation, right? :p
     
  23. IntelUser2000

    IntelUser2000 Elite Member

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    Yea, you are right. But the "heterogeneous computing" slide is explicitely about Fusion, which made me thought you were naturally referring to Llano.
     
  24. GaiaHunter

    GaiaHunter Diamond Member

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    Might be misinterpreting your post, and if so I apologize, but won't Bulldozer CPUs also have GPU on the same die, using Fusion as the controller?

    High-end being APU (Buldozer CPU+GPU on same die) + Discrete GPU that will also be accessed as GPGPU if needs be, while low-end can just be the APU with no discrete GPU and/or a less powerful individual GPU.

    I've the impression Llano is basically a test bed for integration of CPU+GPU on same die (and probably being a cheaper overall platform that can actually play current games), that will then be replaced by smaller Bulldozers a la i3/i5.

    It will also be interesting to see where NVIDIA GPUs will fit on this - if the AMD APU will access them and/or if the GPU on the APU will be able to enhance NVIDIA GPU.

    Then we have the Intel side - it is a safe bet to say Intel CPU will be faster than AMD CPU, but will the APU (what is the name for the Intel version? Sandy Bridge?any?) be overall a better buy? What will be the value of Larrabee and how will NVIDIA GPUs work with Intel APU?

    2011 seems as it can be an interest year. 2010, though, seems one-sided - again...
     
    #24 GaiaHunter, Nov 11, 2009
    Last edited: Nov 11, 2009
  25. Viditor

    Viditor Diamond Member

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    I believe that it means that every 2 cores will share one cache, and that the shared cache pairs will be using direct connect architecture with each other. So an 8 core will be 4 dual cores directly connected to each other on the DCA Bus...
    This is similar to Intel's shared cache on the Core Duo, except that Intel had to connect the cache through an off-die FSB rather than directly connect to another cache on the die (much higher latency).

    They're talking about OpenCL...so I would disagree with your statement as they are almost ready now and developers already have initial SDK kits...
     
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