Haha, what's wrong with that? That's exactly what we've all been telling AMD they needed to do, for 3½ or 4 years now. Lower their clockspeeds, and raise their IPC. If done properly, this has the potential to be AMD's 'Conroe moment'. I mean sure, they're not also going to bypass their competition in one fell swoop like Intel did with Conroe, but who would expect them to at this point? They're monetarily well under half the company they were in 2006, when Intel released Conroe.40% IPC increase, if true, will mean a heavy clock regression.
Exactly. Stop sharing FP units, and you've magically regained 20% of your FPU IPC*. Hire (or promote) the guy who can raise the performance of the cache subsystem, and FX IPC will rise considerably, across the board. Spend some more time tweaking the cache hit ratio, and that will also raise performance in both FPU and integer.For one 40% is obviously an average, it will be less in Integer and likely more in FP,
Umm, no. Even if we give the FX FP unit back the 20% that Dirk Meyer stole from it, it still has nowhere near the single-thread IPC of Haswell. Now, give it the improvements to the cache, and whatever other IPC improvements they can come up with, in addition to recovering the stolen 20%, and it may very well give Ivy Bridge a run for its money in FP performance, which would be awesome.for instance we can be sure that the FPU will be reused since its throughput is as good as the one of a Haswell core.
Yeah, I think so as well. Well, maybe not a lot more, but definitely more than 40%, since just stopping the sharing of FPUs will immediately 'give back' 20%.Thus FP IPC can be increased by much more than those 40%,
1. What kind of performance increase can we expect from the iGPU of Zen compared to Kaveri?
2. Will Zen APUs support AMD dual graphics like current APUs?
1. Nobody knows yet, its ~18 months away. That's what we've been speculating about for the past page or so. About the only guarantee on CPU performance is that it will not be lower performing than its predecessor, the way they did with Bulldozer. No tech company is that dumb.
Unless they're crazy, they'll give the iGPU the same memory tech that is in their current top of the line dedicated video card, the Fury X, known as HBM. Around here, we call it HBM1, since in the next year or 18 months, there is supposed to be an HBM2. It will of course have fewer stream processors, texture units, and maybe even ROPs, than the Fury X. It shares its TDP with the CPU, which means that it is forced to share its ability to be cooled properly. If they can give it the performance of today's 390, it will be a runaway bestseller.
2. I don't know why they wouldn't. They'd be shooting themselves in the foot, if they didn't. Besides, by the time the Zen is released, Windows 10 will be the operating system, and it is supposed to be supporting Crossfiring/SLIing across architectures, so I don't believe AMD could even stop it from happening, if they were dumb enough to want to stop it.
Haha, what's wrong with that? That's exactly what we've all been telling AMD they needed to do, for 3½ or 4 years now. Lower their clockspeeds, and raise their IPC. If done properly, this has the potential to be AMD's 'Conroe moment'. I mean sure, they're not also going to bypass their competition in one fell swoop like Intel did with Conroe, but who would expect them to at this point? They're monetarily well under half the company they were in 2006, when Intel released Conroe.
Haha, what's wrong with that? That's exactly what we've all been telling AMD they needed to do, for 3½ or 4 years now. Lower their clockspeeds, and raise their IPC. If done properly, this has the potential to be AMD's 'Conroe moment'. I mean sure, they're not also going to bypass their competition in one fell swoop like Intel did with Conroe, but who would expect them to at this point? They're monetarily well under half the company they were in 2006, when Intel released Conroe.
R9 390 level performance is impossible even in the highest end Zen because then there will be too many challenges like
Don't forget AMD wants Zen to be affordable and power efficient . My much more realistic guess is r7 260x level performance in the top end APU.
But at what clocks and power consumption. It doesnt matter if they just exchange one problem for the other.
Also we dont even know yet what AMD actually specifies as IPC increase. It could for the sake of argument be SMT.
I dont even think AMD knows yet, since its unlikely they actually have any silicon.
A GT4e looks to be around 160mm2 after looking at the Skylake quad GT2 die.
Broadwell GT3e (2x 24 EUs) Dual Core 4 threads is 133mm2. Add two more cores (~20mm2) PLUs another 24 EUs (~40mm2) GT3 iGPU and you will have 200-220mm2 Skylake Quad Core GT4e.
40%? I'll take it. Beats the hell out of any improvements AMD has offered since being Conroe'd. I welcome the 40% IPC per core increase. Now, we have to factor in the hype quotient into the formula. So, on my chalkboard here, I am getting 10% actual increase in IPC per core without setting foot in the mobius continuum.
No.
6700K is ~120mm2 and the die looks like this.
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Double the IGP and you got ~160mm2. And in case you wonder, eDRAM controller sits on the system agent and is present in all SKUs. eDRAM is purely optional.
Big mistake trying to compare Gen8 with Gen9.
Skylake GT2 doesn't have eDRAM controller.
In Gen9 EDRAM now acts as a memory-side cache between LLC and DRAM. Also, the EDRAM memory controller has moved into the system agent, adjacent to the display controller, to support power efficient and low latency display refresh.
Remember how "Barcelona would have 40% better IPC than Q6600"? 7 years later, still can't beat an ancient Penryn in ST IPC.
It does:
https://software.intel.com/sites/de...ure-of-Intel-Processor-Graphics-Gen9-v1d0.pdf
Its not used, but its there. Its quite clear that Intel is ready to enable all products with eDRAM almost instantly if needed.
What it says is, the eDRAM controller is optional and when available it has moved inside the system agent.
There is no eDRAM controller with the GT2 dies. The System agent in GT2 die is too small to also include the eDRAM controller and Intel would not increase the already expensive 14nm die with added die space if they wouldn't use it.
What it says is, the eDRAM controller is optional and when available it has moved inside the system agent.
There is no eDRAM controller with the GT2 dies. The System agent in GT2 die is too small to also include the eDRAM controller and Intel would not increase the already expensive 14nm die with added die space if they wouldn't use it.
