News AMD Financial Analyst Day 2020: A Lot of Details to Digest

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moinmoin

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You may be aware AnandTech posted a lot of articles about the AMD Financial Analyst Day 2020. A lot of details were discussion which I think deserve a dedicated thread. I'll keep updating the OP while going through them. Done



AMD no longer references 7nm+, so the connection to TSMC's N7+ is no longer a given.
Epyc_Roadmap_575px.png



In place of the current Vega for computing in the server market CDNA will come as counterpart to RDNA for consumers.
AMD_GPU_Fission_575px.png



To cover the increasing scope of Infinity Fabric it's being renamed to Infinity Architecture.
InfinityArch_575px.png



AMD teased X3D packaging as a successor to the current chiplets MCM packaging in an unspecified future.
X3D-14_575px.jpg



AMD shipped 260 million Zen cores by 2020. Ian Cutress pixel counted the graph and came up with these numbers: 2017-2018: ~30m cores, 2018-2019: 80m cores (~110m total), 2019-2020: 150m cores (~260m total)

Note of caution: This is cores, not chips. So with up to 64 cores per chip this number looks more impressive than it would otherwise. For comparison, alone through sales of PS4 an Xbox One there are far more than 1.2 billion Jaguar cores in the wild. So we can expect the numbers of Zen cores to vastly increase further once the new Zen 2 based consoles launch later this year.


RDNA 2 is called Navi 2X, further improves perf per watt and includes hardware ray tracing.


Zen 3 based Milan coming in ‘late 2020’, Zen 4 based is coming out by 2022.So the cadence is more to the 15 months than 12 months side. Zen 3 will hit the consumer market ‘later this year’.
 
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awesomedeluxe

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If this ends up being true, I don't think AMD has to worry about getting bested in the mobile space:


[EDIT] Whoops misunderstood something. I don't think that is true. My understanding is that AMD has made big leaps with idle draw in Renoir but the way they do power gating is still a lot more crude than Intel and will not be fixed for some time.

Or rather, if it were true, it would also be true for Ice Lake and then some.
 

exquisitechar

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I feel the need to point this out: Genoa is a server chip, not the code name for the Zen 4 architecture. We will see desktop chips before the server chips drop. As to launch timing? Nobody except AMD knows, of course. If I had to speculate, I would say Zen 3 launches in July and Zen 4 will launch later rather than sooner. However, I expect Vermeer to launch in 2021 along with some variants of Genoa. The cheaper chips for both Vermeer and Genoa won’t land until 2022.
Vermeer is Zen 3 desktop, I think. I’m not sure if it will launch in July, but it should launch in Q3.
 

Hitman928

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[EDIT] Whoops misunderstood something. I don't think that is true. My understanding is that AMD has made big leaps with idle draw in Renoir but the way they do power gating is still a lot more crude than Intel and will not be fixed for some time.

Or rather, if it were true, it would also be true for Ice Lake and then some.

Source? I haven't seen any kind of technical deep dive yet on how Renoir handles p-states. We still don't have any official review numbers but the early leaks have been impressive:

 
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soresu

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Vermeer is Zen 3 desktop, I think. I’m not sure if it will launch in July, but it should launch in Q3.
Yeah, seems like Vermeer in the DT part, and likely Cezanne is Renoir's APU successor - as to what GPU generation makes it into Cezanne, RDNA at least though I would hope for RDNA2.
 

NostaSeronx

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Yeah, seems like Vermeer in the DT part, and likely Cezanne is Renoir's APU successor - as to what GPU generation makes it into Cezanne, RDNA at least though I would hope for RDNA2.
It will be RDNA2.

Renoir => Zen2+GCN // Small APU // 17h 60h-6Fh
Van Gogh => Zen2+RDNA2 // Big APU // 17h 90h-9Fh
Cezanne => Zen3+RDNA2 // Small APU // 19h 50h-5Fh
Rembrandt => Zen4+RDNA3 // "Big APU" // ¯\_(ツ)_/¯
 
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soresu

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Good: Zen 4 is officially 5nm. Not sure this was confirmed before; I think there was an outside chance it was would be 6nm.
I still wonder though whether they meant standard N5, or N5P instead - with Zen4 almost certainly late Q4 2021 to early Q1 2022 there should be more than enough time for N5P to ramp and increase yields.

With Zen3 merely built on an optimised N7 process (rather than EUV N7+), the move to N5P should be as beneficial as the move from GF 14/12nm to TSMC N7.

I also hope that the Zen3 X670 chipset will have a lower TDP, I skipped X570 because of the small (and therefore annoying) fan on most of those motherboards.
 

awesomedeluxe

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I still wonder though whether they meant standard N5, or N5P instead - with Zen4 almost certainly late Q4 2021 to early Q1 2022 there should be more than enough time for N5P to ramp and increase yields.

With Zen3 merely built on an optimised N7 process (rather than EUV N7+), the move to N5P should be as beneficial as the move from GF 14/12nm to TSMC N7.

I also hope that the Zen3 X670 chipset will have a lower TDP, I skipped X570 because of the small (and therefore annoying) fan on most of those motherboards.
We can dream! But as a betting man my money is on N5. N5P will probably have a price premium, and N5 is likely to be expensive as-is. I'm guessing N5P exists for a very special pomaceous company's H2 2021 flagship device and, maybe, successors to that company's notebooks in 2022.
 

amrnuke

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With Zen3 merely built on an optimised N7 process (rather than EUV N7+), the move to N5P should be as beneficial as the move from GF 14/12nm to TSMC N7.
Has it been confirmed that Zen3 will not be N7P or N7+? While they removed the plus, they left ambiguity. Seems silly to not take the efficiency/performance advantages of at least N7P which will use same tooling, even if it's not a direct ancestor of N5 -- unless N7P yields are crummy, in which case all bets are off.
 

uzzi38

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Has it been confirmed that Zen3 will not be N7P or N7+? While they removed the plus, they left ambiguity. Seems silly to not take the efficiency/performance advantages of at least N7P which will use same tooling, even if it's not a direct ancestor of N5 -- unless N7P yields are crummy, in which case all bets are off.
No.

 
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moinmoin

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Intentional obfuscation. Basically not releasing publicly any information that might let us know the kind of IPC or efficiency gains they are actually likely to get.
Indeed. AMD never used TSMC's node names to begin with. Zen 2 turned out to use mobile oriented N7 with design optimized by AMD to still reach high frequencies, instead what some people expected to be a precursor to TSMC's N7P. I guess too many people were directly linking AMD's mention of 7nm+ to TSMC's N7+ so AMD severed that link. Now the question is why AMD even bothers with obfuscating such details, they have been and will be only guesstimates at best anyway.
 

moinmoin

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Interesting long read by The Next Platform, a mix of AMD FAD coverage, looking back at the history since 2011 and discussion about AMD's strategy and plans. Some of the stuff we already discussed in this thread and elsewhere on here put in some new context.