AMD CPU And GPU Roadmaps For 2015-2020 Officially Emerge

[csbin]

http://wccftech.com/amd-gpu-apu-roadmaps-2015-2020-emerge/

AMD shared its 5 year long GPU and APU roadmap with the world for the first time during the PC Cluster Consortium event in Osaka Japan. During the event AMD’s Junji Hayashi took the stage to reveal what AMD has got in the works for the next five years.

The discussion revolved around AMD’s graphics IP and all the products that involve it. Including discrete Radeon graphics cards and Radeon powered Accelerated Processing Units or APUs for short. As well as AMD’s upcoming ARM ( K12 ) and it’s sister x86 CPU core ( Zen ) . In addition to AMD’s ambidextrous strategy to develop and introduce both x86 and ARM powered SOCs to the market in a pin for pin compatible platform code named SkyBridge.

 

[Idontcare]

Why does their future appear blurry and saturated all at the same time?

 

[coercitiv]

Why does their future appear blurry and saturated all at the same time?

Marketing side effects.

 

[Idontcare]

Marketing side effects.

On the bright side of things, clearly the future is a veritable cornucopia of "Next-Gen" products.

Thank the sun and moon that they aren't setting their sights on "Last-Gen" products as the future

 

[frozentundra123456]

Are these old slides? First slide says they have plans for the next 10 years, but only goes to 2020.

 

[NTMBK]

Are these old slides? First slide says they have plans for the next 10 years, but only goes to 2020.

Date at the bottom says February 2015, but some of them (like the Skybridge one) are clearly recycled from older presentations.

 

[Idontcare]

Are these old slides? First slide says they have plans for the next 10 years, but only goes to 2020.

To be fair, isn't that about right in line with what you'd expect? As comical as it may be, this is about as good as it ever gets for AMD's shareholders.

 

[Abwx]

Why does their future appear blurry and saturated all at the same time?

Theses are shots of a screen....

Other than those infos were posted weeks ago in the Carrizo thread...

Date at the bottom says February 2015, but some of them (like the Skybridge one) are clearly recycled from older presentations.

Where previous slides also in Japanese..?.

 

[Idontcare]

Theses are shots of a screen....

I think you didn't quite get my point. But no matter, who cares anyways?

 

[Yuriman]

The information density is incredible.

 

[Abwx]

I think you didn't quite get my point. But no matter, who cares anyways?

I got it the way you re talking about but i gave you the benefit of the doubt, look like i was wrong...

 

[PG]

Very disappointing. All I see is Next Gen repeated. Where is the real detail and info?

 

[positivedoppler]

The 300 hpc is interesting. Looks to be the answer to Knights Landing.

 

[Martimus]

All I got out of those charts is that they are still on a two year development cycle for both CPU and GPU. Those charts are pretty barren though.

 

[mrmt]

To be fair, isn't that about right in line with what you'd expect? As comical as it may be, this is about as good as it ever gets for AMD's shareholders.

This roadmap seems to be straight from ghostbusters. A lot of ectoplasm flying around.

 

[Fjodor2001]

All I got out of those charts is that they are still on a two year development cycle for both CPU and GPU. Those charts are pretty barren though.

The roadmap images did not say much, I agree. But the actual text in the article contained lots of interesting information. Here are some highlights:

The new information that has been revealed this time around is that the K12 and x86 sister core will support “many threads”. It was speculated and rumored before that AMD’s upcoming x86 and ARM CPU cores will support simultaneous multi-threading instead of clustered multi-threading which is what AMD’s current Bulldozer family (Piledriver, Steamroller and Excavator) of processors support.
[...]
It was never really confirmed nor was the extent of the multi-threading support in AMD’s upcoming cores known. So it appears that AMD’s upcoming K12 ARM core will be quite large for it support “many threads” instead of just supporting one additional thread as is the case with Intel’s high performance CPUs.
[...]
Moving on to GPUs, Hayashi revealed that AMD will be employing a two year cadence to updating its GPU architecture inside APUs.

AMD will introduce Accelerated Processing Units with updated GPU architectures once every two years. It should be noted that this does not mean that AMD will only be introducing new graphics products every couple of years because that’s not the case. Discrete graphics cards will follow a faster cadence, this roadmap only serves to illustrate GPU architectures in relation to APUs.
[...]
By 2017 AMD plans to introduce what it described as a High Performance Computing APU or HPC for short. This APU will carry a sizable TDP between 200 and 300 watts. This sort of APU, AMD expects, will excel in HPC applications. Similarly powerful APUs were not attempted up to this point because they were simply not viable due to the amount of memory bandwidth required to keep such a powerful APU fed. Thankfully however stacked HBM ( High Bandwidth Memory ) will make such designs not only possible but extremely effective as well. As the second generation of HBM is 9 times faster than GDDR5 memory and a whopping 128 times faster than DDR3 memory. Code names for future GPU architectures unfortunately were not revealed. But we did learn through a previous leak by our friends from Sweden that AMD’s upcoming GPU architecture to debut on 16nm FinFET will be code named Arctic Islands. We’ll get considerably more detailed CPU, APU and GPU roadmaps from AMD in May during the company’s scheduled Financial Analyst Day event, so stay tuned.​

 

[AtenRa]

This roadmap seems to be straight from ghostbusters. A lot of ectoplasm flying around.

If you take off the blue classes, you can clearly see there is no ectoplasm in the slides. In fact your classes create a blur effect because of the crappy blue GPU drivers. :biggrin:

 

[NTMBK]

The roadmap images did not say much, I agree. But the actual text in the article contained lots of interesting information. Here are some highlights:

That's WCCFtech... they couldn't analyse their way out of a paper bag.

The terribly Google Translated section from the original Japanese article reads:

In the era of this K12 core, also x86 core chip also K12 core of ARM chip many-core, it was that of become the chip to be executed in parallel MANY thread. Currently, the X2150 APU that m700 has been adopted in the cartridge of HP Moonshot server is the Kabini of 4 core, the future of high-density server would use this chip.

The impression I get is that it is talking about using the GPU to execute "MANY thread", not that the K12 will have high order SMT (which is what WCCF are insinuating).

 

[mrmt]

The impression I get is that it is talking about using the GPU to execute "MANY thread", not that the K12 will have high order SMT (which is what WCCF are insinuating).

SMT needs a lot of OoO windows and good branch predictor, which is something AMD never could get right on their most expensive designs, I will be quite surprised if a low cost project like Zen/K12 are to have this feature.

 

[Abwx]

SMT needs a lot of OoO windows and good branch predictor, which is something AMD never could get right on their most expensive designs, I will be quite surprised if a low cost project like Zen/K12 are to have this feature.

Seems that we have some specialist here that ignore that previous Atoms were SMT and in order designs, or was it the post that was actualy OoO and branch prediction less..??..

 

[AtenRa]

SMT needs a lot of OoO windows and good branch predictor, which is something AMD never could get right on their most expensive designs, I will be quite surprised if a low cost project like Zen/K12 are to have this feature.

You are right, that is why AMD small Cores (Cat family) has OoO and Intel was using in-order architecture until BayTrail.

Not to mention that because CMT has higher throughput than SMT it needs OoO and branch predictors among other thinks. SteamRoller and Excavator Throughput is even higher than Intels SMT and you cant do that without having good OoO and the rest.

You can stop the FUD now

 

[AtenRa]

Seems that we have some specialist here that ignore that previous Atoms were SMT and in order designs, or was it the post that was actualy OoO and branch prediction less..??..

Its the classes, he can only see blueprints. :biggrin:

 

[mizzou]

looks like it's safe to say neither Intel nor AMD will have any desktop enthusiast product for the next 3-4 years.

I suppose I could stomach a modest upgrade in the meantime and then upgrade with the 2nd gen of their new architecture.

 

[AnandThenMan]

Why does their future appear blurry and saturated all at the same time?

On the bright side of things, clearly the future is a veritable cornucopia of "Next-Gen" products.

Thank the sun and moon that they aren't setting their sights on "Last-Gen" products as the future

To be fair, isn't that about right in line with what you'd expect? As comical as it may be, this is about as good as it ever gets for AMD's shareholders.

I think you didn't quite get my point. But no matter, who cares anyways?

Thanks for the quality contributions. :thumbsdown:


Insulting other members is not allowed in a technical forum
Markfw900

 

[witeken]

Impressive, just in time for April's fools.

At least they could fabricate that slide on schedule.