#### Schmide

##### Diamond Member

- Mar 7, 2002

- 5,505

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I'm sure IDC will describe this better than me but transistors are non-linear in their current to voltage ratio. I believe they follow more of an inverse logarithmic curve, also known as the exponential function e^x. I'm kind of surprised they modeled it with a cubic function, then again the power series for e^x is well approximated by its 4th iteration. (e^x = 1 + x +x^2/!2 + x^3/!3...) which in turn models well to the above equation.Since this is a cubic function , i assume that it is composed

of a product of three first degree functions.

First is the current needed to charge/discharge the parasistic

capacitance, wich increase linearly with frequency.

Second should be the cross conduction losses of the push pull

cmos pairs wich increase also linearly with freq.

And third, i can only see the necessary voltage increase as the third factor that raise the final degree to 3...

Is that plausible ?..

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