Ignoring heat and power, how fast a processor can clock is basically a measure of two things -- firstly, how quickly the physical transistors can switch and how quickly signals move trough wires, and secondly, how many consecutive transistor switches and how much signal transit needs to happen in series on the longest path in the processor before that clock cycle is complete.
These things are basically independent, making it useful to have standard idealized metric against which to compare both how long it takes for logic to complete, and how quickly a certain silicon implementation can compute things. This metric is FO4
, or if I say that a logic device has a latency of 3 FO4, it means that regardless of the process where it's implemented, it will take as long as 3 consecutive not-gates each driving a load of 4 other not gates implemented on the same process. So a device with a logic length of 10 FO4 can be expected to clock twice as fast of another device on the same process and a FO4 of 20.
The rumor is (and I don't think there is any confirmation other than "yes, it's a speed demon") that BD has a FO4 length of 17, compared to known 22 for Phenom. So, looking only at transistor delay, BD should run at 30% higher clock speed, when implemented on the same process. Also, the GF 32nm SOI process should supposedly be much better than their earlier processes, meaning gain from Phenom should be higher
This all was for the case when you are not limited by power. When you are, the gains should be more conservative, especially when AMD is fitting so much more logic in a single chip. However, for the single-threaded case, the conservative
baseline quess should be "whatever phenom is clocking now" * 1.3 for architecture * roughly 1.1 for process = Holy ****.
disclaimers: FO4 is a lot hairier metric than the simplified view I told here -- wire delay and transistor switching time do not shrink in unison, making comparisons across too many process generations not very good. A more in-depth look on FO4 can be found from RWT