AMD Bristol/Stoney Ridge Thread

[NostaSeronx]

A massive IPC jump like that is only going to come with a big change to the core design.

Not exactly, the change can be very small.

Why the heck would AMD spend millions designing a new core, on a type of process it's never used before, porting its GPU to a process it's never used before, just to target a tiny niche of the market with wafer thin margins?

It wouldn't necessarily be a new core, but rather a redesigned one. AMD does have a patent in regards to the GPU: https://patents.google.com/patent/US8314647B2
Most of the design methodology of 22FDX is from low-power Bulk. It isn't radically different compared to the SR/XV process, while it might adopt some BD/PD optimizations. Relative to Stoney, a 22FDX APU would have higher margins.

22FDX/12FDX <== More lucrative than anything on => 14LPP/7FF.

28nm FDSOI => Cortex-A9 @ 1V = 2.3 GHz
22FDX => Cortex-A53 @ 0.9V = 2.4 GHz
22FD w/ FBB = Cortex-A53 @ 0.9V+0.9Vbb = 2.5 GHz (0.9+0.9 should equal 1V without Vdd degradation and lower power consumption.)

Production ramp for 28nm at GlobalFoundries = 2012
Production ramp for 22FDX at GlobalFoundries = 2018
Historically, we have a bit of time still before 22FDX if we take 28nm into consideration.

 

[amd6502]

Sadly it doesn't seem like Amd is counting much on GF nodes. Zen 5 supposedly already in a very early stage; with Zen2's lead architect and relying on N5



https://wccftech.com/amd-zen-5-cpu-core-next-gen-ryzen-threadripper-epyc-cpus/

 

[NostaSeronx]

Sadly it doesn't seem like Amd is counting much on GF nodes.

There isn't any GlobalFoundries next-gen node for AMD's premium next-gen APUs. However, there is one for their value side.

AMD's 2019 Mobility Lineup
-> Same word as GloFo: https://www.globalfoundries.com/market-solutions/mobility

All the 12nm/14nm APUs are moving to 7nm next year.
What is the 28nm APU moving too? Obviously the only choice is 22FDX.

For example;

https://imgur.com/cuQKKOD

President and CEO at Synaptics: “GF’s 22FDX technology delivers a potent mix of low static and dynamic power along with excellent performance to give us a great platform for our world-class products.”

//
On side note, just was referenced this;
Both Raven on 12nm and Raven2 on 14nm appear as "Picasso". It would thus be more logical that the big and small APU on 7nm will also both fall under 'Renoir". Leaving Stony on the 28nm node to fall into "Dali" on the 22FDX node. Raven2 if it only refreshes it would also only fit into "Renoir" and not "Dali". The only value APUs for 2019 are the Stoney APUs.

 

[Thunder 57]

There will be no new major product wafer starts on 14LPP/12LP beyond 2019 from AMD. This leaves a huge gap for 22FDX and 12FDX which AMD agreed to use. <b>It is signed, it is notarized, etc, the agreement has been placed.</b>

I would ask for a source on this, but every time I have asked your for a link or a source you have either said the information is easy to find, Google it, or you have an inside source. I don't know what is up with this delusion that you have about updated Con cores on FDSOI.

Family 15h = 2011-2019+ (No RIP)
Family 14h = RIP
Family 16h = RIP
Family 17h = Soon to be RIP
Family 19h = Will probably still be next to 15h.

Ideally, we would want after Stoney Ridge there to be an architecture and a SoC template that can last from 2020 to 2030. Hoping on to the FDX train from 22FDX(post-2020) to 3FDX(pre-2030).

So you think 15h will live through 2030, but Zen is soon to be dead?

 

[NostaSeronx]

So you think 15h will live through 2030, but Zen is soon to be dead?

In the time frame of 15h(Bulldozer);
14h => Bobcat
16h => Jaguar
17h => Zen
19h => Zen3
Four new architectures. There is also potential for 21h to be Zen5 which would be the 5th architecture.

We will be overdue on a minor 15h revision soon-ish.
Bobcat => Bulldozer
Jaguar => Steamroller
Zen => Excavator
Zen3 => ???

 

[Thunder 57]

In the time frame of 15h(Bulldozer);
14h => Bobcat
16h => Jaguar
17h => Zen
19h => Zen3
Four new architectures. There is also potential for 21h to be Zen5 which would be the 5th architecture.

We will be overdue on a minor 15h revision soon-ish.
Bobcat => Bulldozer
Jaguar => Steamroller
Zen => Excavator
Zen3 => ???

I disagree. First, Bobcat came before Dozer. And Jaguar is very much an evolution of Bobcat, just like Zen 3 is very much an evolution of Zen. So by my count, there is one new uarch since Bulldozer, that being Zen.

 

[NTMBK]

We will be overdue on a minor 15h revision soon-ish.
Bobcat => Bulldozer
Jaguar => Steamroller
Zen => Excavator
Zen3 => ???

What are you talking about? Steamroller -> Excavator was a minor refinement mostly focused on reducing die area and power consumption for mobile. Whereas Jaguar -> Zen is an entirely new architecture. It's really not at all comparable.

We're not "due" any new Bulldozer derivative. It's dead. It's been dead for years. Ever since they cancelled the Steamroller server chips, it's been obvious that the architecture had failed. They iterated on it for a while just so that they had something to sell, but as soon as Zen was ready they ditched it.

 

[Abwx]

What are you talking about? Steamroller -> Excavator was a minor refinement mostly focused on reducing die area and power consumption for mobile.

It wasnt that minor but the halved L2 and hugely increased latency did take their toll, otherwise that was a substancial improvement, to give an idea let say that in Cinebench 11.5 XV is 23% faster per clock than Piledriver, also XV has AVX2, wich is not the case of Steamroller.

https://www.anandtech.com/show/10436/amd-carrizo-tested-generational-deep-dive-athlon-x4-845/7

 

[DrMrLordX]

@Abwx

XV's AVX2 support was half rate, just like Summit Ridge and Pinnacle Ridge. It only existed to permit such software to operate. It didn't provide any performance advantage over AVX128 or XOP. Good luck getting anyone other than the y-cruncher guy to support XOP though. Oh, and the JVM.

 

[Thunder 57]

It wasnt that minor but the halved L2 and hugely increased latency did take their toll, otherwise that was a substancial improvement, to give an idea let say that in Cinebench 11.5 XV is 23% faster per clock than Piledriver, also XV has AVX2, wich is not the case of Steamroller.

https://www.anandtech.com/show/10436/amd-carrizo-tested-generational-deep-dive-athlon-x4-845/7

It wasnt that minor but the halved L2 and hugely increased latency did take their toll, otherwise that was a substancial improvement, to give an idea let say that in Cinebench 11.5 XV is 23% faster per clock than Piledriver, also XV has AVX2, wich is not the case of Steamroller.

https://www.anandtech.com/show/10436/amd-carrizo-tested-generational-deep-dive-athlon-x4-845/7

And you know how many people care today? Zero. None. Nada. Null.

 

[Abwx]

And you know how many people care today? Zero. None. Nada. Null.

And your point is...?.
That any technical dscussion on XV should be forbidden..?.

@Abwx

XV's AVX2 support was half rate, just like Summit Ridge and Pinnacle Ridge. It only existed to permit such software to operate. It didn't provide any performance advantage over AVX128 or XOP. Good luck getting anyone other than the y-cruncher guy to support XOP though. Oh, and the JVM.

That s right but this would provide no advantage if code were 100% AVX2 instructions, wich wont happen, so XV was more efficient than Steamroller when such code was used, but one more time it is handicapped by the smaller L2 while AVX2 require twice as big operands...

That being said as better as XV could be in Cinebench 11.5 FI (than Kaveri) it was still largely beaten by Llano wich has 16% better perf/clock, quite a set back even if a single core was meant to be replaced by a module :

https://www.hardware.fr/medias/photos_news/00/32/IMG0032986.png

https://www.hardware.fr/articles/837-5/cpu-cinebench-x264.html

 

[Thunder 57]

And your point is...?.
That any technical dscussion on XV should be forbidden..?.

Of course not. It's surprising AMD got XV as low power as they did. But it is irrelevant today. Nobody outside of a few dumbtards think it is relevant or has any future. I wish we could just shut up and forget about it. Did people post about how Prescott could be revived? I don't think so.

 

[NTMBK]

Of course not. It's surprising AMD got XV as low power as they did. But it is irrelevant today. Nobody outside of a few dumbtards think it is relevant or has any future. I wish we could just shut up and forget about it. Did people post about how Prescott could be revived? I don't think so.

If Prescott was ported to 22FDX, I know of at least one poster who would be interested!

 

[DrMrLordX]

If Prescott was ported to 22FDX, I know of at least one poster who would be interested!

Prescott and not Cedar Mill? Intriguing!

 

[Thunder 57]

Let us not forget about Tejas and Jayhawk!

 

[Abwx]

Of course not. It's surprising AMD got XV as low power as they did. But it is irrelevant today. Nobody outside of a few dumbtards think it is relevant or has any future. I wish we could just shut up and forget about it. Did people post about how Prescott could be revived? I don't think so.

Granted it wont be used anymore by AMD but contrary to the designs you re quoting XV is still on sale, and somewhat produced even if in low quantities.

That being said it s obvious, to almost everyone, that Zen will replace XV in the low end if it isnt already done since Athlon 300U are used in lower cost designs, at the pace at wich the things are going i predict that there wont be a 2C/4T die replacing Banded Kestrel, methink that they will have 4C/8T as minimalist offering as 12LPP cost gradually decrease.

 

[VirtualLarry]

Just in terms of laptop performance, my 9220e XV-derivative single-module/dual-"core" (and I question that, when the laptop gets topped out at 53% usage), is by far, pretty-much the WORST-performing laptop chip that I've used. Except possibly for the C-60 APU. 1.6Ghz 6W XV is basically a nearly-useless APU, although the single-channel DDR4 support, allows for a 1080P "virtual" res. on a 768P native screen.

My Bay Trail Atom N2830 out-performs it, because it has two REAL cores.

It only cost me $120 for it, plus an 8GB DDR4 DIMM, but still, I hardly consider it worth it, if I can't Skype and browse the web at the same time.

Something that my Ryzen 3 3200U 2C/4T 2.6Ghz base, does with aplomb.

That one cost me $280, and a 2x8GB kit of DDR4 borrowed from a mini-PC.

Well worth it. XV isn't worth it, at nearly any price. Maybe Chromebooks could use it.

 

[NostaSeronx]

And, of course you are comparing a 28nm 6W product to a 14nm 15W product. There is a massive divide in density, performance, and power between 28HPA and 14LPP.(line cut continues on from here)

Then there is the N2380, which has a higher clock rate. Which is on Intel's 22nm node, which is FinFET.
1.6 GHz/2.4 GHz AMD core w/ 2x(2 ALUs + 2 AGUs) + shared 2x 128b FMAC+1x 128b MMX
2.1 GHz/2.4 GHz Intel core w/ 2x(2 ALUs + 1 AGU) + 2x(1x 64b FMUL+1x 128b FADD)

Which pretty much explains in low-end, frequency is more important than IPC.

It's even worse with Jaguar;
1.0 GHz/1.4 GHz AMD core at 4W
1.5 GHz/-- GHZ AMD core at 10W
2.1 GHz/2.4 GHz Intel core

----
However, this gap is negligible in 22FDX(22FD transistors) or non-existent in 22FDX+(22FD+ transistors).

9T 28nm to 8T 22nm = the same change from Kaveri(13T/28SHP) to Carrizo(9T/28A)
FX-7600P(Kaveri) SR at 2.7 GHz & GCN2 at 600 MHz at 35W TDP default
FX-7500(Kaveri) SR at 2.1 GHz & GCN2 at 498 MHz at 20W TDP default
to
FX-8800P(Carrizo) XV at 2.1 GHz & GCN3 at 800 MHz at 15W TDP default
A10-8700P(Carrizo) XV at 1.8 GHz & GCN3 at 800 MHz at 15W TDP default

The lower frequencies can be explained off from the switch to high-perf track to high-density track. Which can be gained back with faster transistors(28A transistors(SHP) to 28HPA transistors)
to
FX-9800P/A12-9720P(Bristol) XV @ 2.7 GHz & GCN3.x at 758 MHz at 15W TDP default
A10-9700P(Bristol) XV @ 2.5 GHz & GCN3.x at 758 MHz at 15W TDP default

The lower GPU frequency is probably from the increased focus on CPU frequency.

With the switch to 22FDX, the designs would probably be focused at 6W TDPs. Rather than 35W/20W with Steamroller and 15W with Excavator.

A6-9220C(Stoney) XV at 1.8 GHz & GCN3.x at 720 MHz at 6W TDP.
A4-9120C(Stoney) XV at 1.6 GHz & GCN3.x at 600 MHz at 6W TDP.

To be a proper succesor;
Top-sku post-XV at >3 GHz & RDNA at >900 at 6W TDP.
Mid-SKU post-XV at >2.5 GHz & RDNA at >800 at 6W TDP.
We also want to see a move from DDR4-2400 to DDR5-4800 or higher. LPDDR5 is available as well 12GB/16GB for a 64-bit bus.

RDNA's wgp would be two CUs, rather than three. Starting early is beneficiary to 12FDX, which can go quad core(dual post-XV) and dual WGP(8 SIMD32).
Three SIMD64 to Four SIMD32(Small cost-effective APU), Eight SIMD64 to Eight SIMD32(Shrinked small cost-effective APU).

 

[amd6502]

Then there is the N2380, which has a higher clock rate. Which is on Intel's 22nm node, which is FinFET.
1.6 GHz/2.4 GHz AMD core w/ 2x(2 ALUs + 2 AGUs) + shared 2x 128b FMAC+1x 128b MMX
2.1 GHz/2.4 GHz Intel core w/ 2x(2 ALUs + 1 AGU) + 2x(1x 64b FMUL+1x 128b FADD)

Which pretty much explains in low-end, frequency is more important than IPC.

It's even worse with Jaguar;
1.0 GHz/1.4 GHz AMD core at 4W
1.5 GHz/-- GHZ AMD core at 10W

[...]

A6-9220C(Stoney) XV at 1.8 GHz & GCN3.x at 720 MHz at 6W TDP.
A4-9120C(Stoney) XV at 1.6 GHz & GCN3.x at 600 MHz at 6W TDP.

To be a proper succesor;
Top-sku post-XV at >3 GHz & RDNA at >900 at 6W TDP.
Mid-SKU post-XV at >2.5 GHz & RDNA at >800 at 6W TDP.

Wouldn't GCN 1.2 be easier to port?

Other than the 16nm console shrink, Jaguar/Puma has not been updated in like 5+ years or so (?). So, it's not really a surpise it has a handicap over XV.

Stoney medium and low bin at 6W simply should not exist. The critics are right, it simply lowers AMD's reputation over the longer term. A node upgrade would change that, but by the time the products land, dual thread limit might make the product questionable.

I think a port of Zen3 or Zen4 to 22FDX would be better, with a single-core APU designed for 6W and below, if either of those cores in fact do 4-way multithread. These could also be salvaged from a dual core APU focused at cTDP 8W-15W.

 

[NostaSeronx]

Wouldn't GCN 1.2 be easier to port?

There is two runs that have been provided;
-> Stoney Ridge converted to 22FDX with minimal changes.
-> Totally new design with same general specs; New module(CMT2)+New GPU(RDNA)

The first, 22FDX transistors can as a whole fulfill HP and LP results without losing performance in HP or power in LP. However, another XV/GCN new product launch wouldn't have enough oomph. Even with the better <15W performance, or the better >15W performance at lower cost.

RDNA is potentially more area efficient, while allowing for higher frequency. Compared to 7nm Vega and 7nm Navi. In general, GPUs are much more scalable than CPUs.

I think a port of Zen3 or Zen4 to 22FDX would be better, with a single-core APU designed for 6W and below, if either of those cores in fact do 4-way multithread. These could also be salvaged from a dual core APU focused at cTDP 8W-15W.

Going up for Zen is bad, more IPC = lower frequency, higher power, higher area, higher cost. AMD's 14nm/7nm dual-core Zens have to worry about Willowcove & Tremont-HiPerf.

The more ideal path is a new CMT core that isn't server/high-performance-compute orientated. Rather, it is high-performance-client/mobility focused which would solve some low density units.

 

[jpiniero]

Probably be easier to do Zen Lite.

Thing is, I don't know how much effort AMD really wants to put into this.

 

[krumme]

Probably be easier to do Zen Lite.

Thing is, I don't know how much effort AMD really wants to put into this.

Perhaps something derived from the next gen consoles?

It's a bit of a stretch to think the consoles like 8 core zen 2.5 at some 7nm plus. Gets on the expensive side vs 8x jaguar at 28nm back then.

 

[NTMBK]

Perhaps something derived from the next gen consoles?

It's a bit of a stretch to think the consoles like 8 core zen 2.5 at some 7nm plus. Gets on the expensive side vs 8x jaguar at 28nm back then.

Have you seen the size of the 8 core chiplet? It really isn't very big. And that's with a whopping 32MB of L3! If you take a look at die shots of Zen 2, you can see just how much of it is cache:

https://flic.kr/p/2gxmkir

Cut that down to 16MB (or even 8MB), and you'd see a substantially smaller die area. I suspect that the cache is that huge so that the I/O hub on Rome doesn't get swamped by all those cores- I don't see why you'd need that much cache for a console APU.

 

[DrMrLordX]

I don't see why you'd need that much cache for a console APU.

Those consoles will probably use a GDDR variant with lamentably-poor latency. The more L3, the better, I say.

 

[NTMBK]

Those consoles will probably use a GDDR variant with lamentably-poor latency. The more L3, the better, I say.

Is the GDDR latency really that bad? I was under the impression that while it was higher in cycle count, because the frequency was so much higher that the latency in NS was kind of a wash.