AMD Bristol/Stoney Ridge Thread

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NostaSeronx

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Beside no mention is made, even it was posted in this forum, that there s a native 2C/4T Raven Ridge, one has to wonder why they released this SKU if it were to be replaced by a chimeric FDSOI based Stoney Ridge.
They aren't replacing each other at this point.

Stoney Ridge successors are ~$300 and lower targeted in laptops. ~25% of AMD's market
Raven2 successors are ~$300 and up targeted in laptops. ~40% of AMD's market.
Raven/Renoir successors are $700 and up targeted in laptops. ~35% of AMD's market.

15h has not had a new CPU design since Carrizo, which launched in 2015!
There is subtle differences with 65h and 70h models versions of Excavator. Why would they need to improve on a product that is uncontested within its field.

AMD has only shown their compute(HP) x86 core roadmap. AMD had subtlely changed the naming of Excavator with Stoney. To their mobile(LP) core architecture.

Excavator = the core for Entry, Essential, Budget SoCs.
Zen = the core for Mainstream, Premium, Enthusiast SoCs.

It might not be on a roadmap, but there is an architecture after Excavator. That happens to not be Zen. Why else stop-gap and release A9-9420, A9-9425, A9-9435.. we have seen this behavior before a decade ago.

"Up to 52% Higher CPU Performance over previous generation with 'Excavator' cores in Entry-level."
"Incredible 52% CPU improvement over A8-7410"

However, when Ryzen 3 3200u/Athlon 300u comes around, they do not compare them to the A9-9425(2018 model)/A6-9225(2018 model). Instead, they compare only towards Intel, implying this is a new market section between big Raven and small Stoney. While, also registering A9-9435/A6-9235 for USB support. We know those are coming out because of A4-9120e.

We do not know exactly the new core will be but we do know the strong points of cluster-based multithreading.

- Better area, power, performance scaling than SMT and CMP.
- Reduces complexity to the PMU and interconnect. A single module is virtually a single core to the power distribution/data transport architecture.
- Dual-core CMP same clock = dual-core CMT same clock, quad-core or dual-core w/ SMT same clock = quad-core CMT same clock.

However, they use the same numbers as Zen. Meaning if you are paying attention, XV2 is to Zen2 from Zen1 levels of improvement at minimum.
 
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NTMBK

Lifer
Nov 14, 2011
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They aren't replacing each other at this point.

Stoney Ridge successors are ~$300 and lower targeted in laptops. ~25% of AMD's market
Raven2 successors are ~$300 and up targeted in laptops. ~40% of AMD's market.
Raven/Renoir successors are $700 and up targeted in laptops. ~35% of AMD's market.

There is subtle differences with 65h and 70h models versions of Excavator. Why would they need to improve on a product that is uncontested within its field.

AMD has only shown their compute(HP) x86 core roadmap. AMD had subtlely changed the naming of Excavator with Stoney. To their mobile(LP) core architecture.

Excavator = the core for Entry, Essential, Budget SoCs.
Zen = the core for Mainstream, Premium, Enthusiast SoCs.

It might not be on a roadmap, but there is an architecture after Excavator. That happens to not be Zen. Why else stop-gap and release A9-9420, A9-9425, A9-9435.. we have seen this behavior before a decade ago.

"Up to 52% Higher CPU Performance over previous generation with 'Excavator' cores in Entry-level."
"Incredible 52% CPU improvement over A8-7410"

However, when Ryzen 3 3200u/Athlon 300u comes around, they do not compare them to the A9-9425(2018 model)/A6-9225(2018 model). Instead, they compare only towards Intel, implying this is a new market section between big Raven and small Stoney. While, also registering A9-9435/A6-9235 for USB support. We know those are coming out because of A4-9120e.

We do not know exactly the new core will be but we do know the strong points of cluster-based multithreading.

- Better area, power, performance scaling than SMT and CMP.
- Reduces complexity to the PMU and interconnect. A single module is virtually a single core to the power distribution/data transport architecture.
- Dual-core CMP same clock = dual-core CMT same clock, quad-core or dual-core w/ SMT same clock = quad-core CMT same clock.

However, they use the same numbers as Zen. Meaning if you are paying attention, XV2 is to Zen2 from Zen1 levels of improvement at minimum.

They didn't compare Excavator to Intel because they knew that it was terrible by comparison. The only way they could make it look good was by comparing their big core to their small core... And even then the multithreaded performance went down.
 

NostaSeronx

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They didn't compare Excavator to Intel because they knew that it was terrible by comparison. The only way they could make it look good was by comparing their big core to their small core... And even then the multithreaded performance went down.
Nope, as I said in my post... Zen no longer replaces/succeeds Excavator, as implied.

https://www.cnx-software.com/2019/01/07/amd-a6-9220c-a4-9120c-processors-chromebooks/
They do compare Excavator to Intel, btw. However, they only compare to products from 2016. Not the late 2017/early 2018 versions. Stoney however did launch in 2016, with no die overhauls like Intel did.
 
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NTMBK

Lifer
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Nope, as I said in my post... Zen no longer replaces/succeeds Excavator, as implied.

https://www.cnx-software.com/2019/01/07/amd-a6-9220c-a4-9120c-processors-chromebooks/
They do compare Excavator to Intel, btw. However, they only compare to products from 2016. Not the late 2017/early 2018 versions. Stoney however did launch in 2016, with no die overhauls like Intel did.

Wow. A warmed over bottom of the barrel SKU, targeting a miniscule niche of the market, which required approximately $3.50 of R&D to bring to market. Yes, this is clearly the linchpin of AMD's strategy.
 

NostaSeronx

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Wow. A warmed over bottom of the barrel SKU, targeting a miniscule niche of the market, which required approximately $3.50 of R&D to bring to market. Yes, this is clearly the linchpin of AMD's strategy.
The 6W products that are mostly launched can be thought of as stop gaps. Stoney lineup are still at heart optimized for 10W-15W TDPs.

Apollo Lake -> Gemini Lake -> Gemini Lake Refresh -> Elkhart Lake <-- When is it time for a new die/architecture/product to compete. *hint: it isn't Zen*

It also doesn't need to be GlobalFoundries 22nm FDSOI;
https://www.semanticscholar.org/pap...WANG/20594c00d27825714cdc4f66f256336a00463fdd
https://ieeexplore.ieee.org/document/8754434/

For info in general, gate-last RMG FDSOI is superior to gate-first MIPS FDSOI in digital performance. So, HLMC has one upped GlobalFoundries.
=> Simulations from a Scottish EDA company show that fully-depleted silicon-on-insulator process technology is the way to go at 20-nm, but better put the metal-gate in last not first.
- "Metal-gate-first FDSOI will be very good but metal-gate-last could be spectacular," said Professor Asenov.
- "TSMC or Samsung could get a huge advantage by introducing metal-gate-last FDSOI, probably much better than FinFET at the same geometry," Professor Asenov said. <= 2012
Leti, ST => plotted gate-last/hk-first for the 10nm FDSOI node. <== in 2013

However GlobalFoundries via employee paper after GF/IBM => Although FDSOI can use the popular replacement metal gate (gate-last) similar to FinFET, we believe a gate-first process with tungsten metal gate with an insulator cap is easier to implement. ,, Which is the Full Metal Gate and it performs similar to RMG.
 
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krumme

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What is the idle power usage of the new zen plus apu? - battery life. Any new test?

I mean if that is solved I dont know a better way to showel all the old 12/14nm gf capacity out the door and fulfill the wsa. Especially in 1 year time when all zen plus is ended.
 

VirtualLarry

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Honestly, I'm pretty happy with my new HP 14" Laptop with a Ryzen 3200U. I didn't realize when I bought it that it was a 2C/4T "native", and not scavenged. According to AMD's site, IIRC, it's 14nm though, not 12nm. Which I thought was kind of weird. Maybe it's a typo.
 
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Abwx

Lifer
Apr 2, 2011
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Honestly, I'm pretty happy with my new HP 14" Laptop with a Ryzen 3200U. I didn't realize when I bought it that it was a 2C/4T "native", and not scavenged. According to AMD's site, IIRC, it's 14nm though, not 12nm. Which I thought was kind of weird. Maybe it's a typo.

The Athlon 300U is still 14nm but it doesnt matter much since it got the same power management enhancement as Picasso, you lose 100-150MHz comparatively to 12nm.
 

NostaSeronx

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I mean if that is solved I dont know a better way to showel all the old 12/14nm gf capacity out the door and fulfill the wsa. Especially in 1 year time when all zen plus is ended.
The WSA can be fulfilled with 22FDX and 12FDX throughout the new period. TSMC for the EPYC/Ryzen I/O die should be preferred at the moment.
According to AMD's site, IIRC, it's 14nm though, not 12nm. Which I thought was kind of weird. Maybe it's a typo.
It isn't a typo... it is Zen+ and it re-uses 12LP performance/power enhancement, just without the 12LP transistors. Which is only for high-performance(1.2V+) or high-density(84CPP/7.5T/56M2).
For information... 3200u = 3.5 GHz @ ~0.9V and 1.4 GHz @ ~0.7V
The improvements of the 12LP transistor is for performance at 1.2V and beyond. Since, Raven2 doesn't need it why waste money for extra process steps/masks.

Relative to 28nm and 22FDX
A-series with the e-suffix (a9-9420e) => ~1.0V @ 2.7 GHz at highest and less than 1.6 GHz @ less than 0.85v.
CEA Leti numbers: "28FDSOI VERSUS BULK" => 32% frequency improvement at VDD=1V / 49% frequency improvement at VDD=0.8V + "22NM FDSOI PERFORMANCE BOOSTERS" +50% frequency with 100mV VDD reduction.
32+50 = 82% + -100mV
0.9V => 4.9 GHz
49+50 = 99% + -100mV
0.75V => 3.2 GHz

For 22FDX to be effective the clock rate gain would have to be 1.5 GHz on top the 3200u. => 3.5 + 1.5 => 5 GHz which becomes the frequency gain with GenY 22FDX(2019 PDK) or 22FDX+(This has BOX15 and 2nd generation transistors).
^-- it however doesn't need to do this to improve on A-series value.

It would need a 28nm Kaveri to 28nm Carrizo die evolution to actually maximize the increase in frequency. DDR4/DDR5 controller/phy w/ 3.6 GHz-4.8 GHz from 1866 MHz-2400 MHz DDR4. With an upgraded interconnect that can handle the extra DDR bandwidth.

With quad-core CMT the integer cores could actually technically shrink.
28nm per module(divided by two cores) = 256-entry retire queue, 88-entry load queue, 64-entry store queue, 96-entry scheduler
If its static: 256 / 4 = 64-entry retire, 88 / 4 = 22-entry load queue, 64 / 4 = 16-entry store queue, 96 / 4 = 24-entry scheduler, per core
If it increases: 288+ / 4 = >72-entry retire, 96+ / 4 = >24-entry load queue, 72+ / 4 = >18-entry queue, 112+ / 4 = >28-entry scheduler, per core.
Jaguar => 64-entry retire, 16-entry memory queue, 20-entry store queue, 20 ALU + 12 AGU entry schedulers, per core

Relative to 2 module CMP+CMT, the sole quad-core CMT based on research should reduce power. If two modules is 6W+6W+misc wattage, then the quad-core would be 8W+misc wattage on same node. It would also have increased FPU potential in 1T over the two module approach. Since, it could have two modules worth of FPU. Then, there is the front-end which can clearly be partitioned further.
 
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Shivansps

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Honestly, I'm pretty happy with my new HP 14" Laptop with a Ryzen 3200U. I didn't realize when I bought it that it was a 2C/4T "native", and not scavenged. According to AMD's site, IIRC, it's 14nm though, not 12nm. Which I thought was kind of weird. Maybe it's a typo.

No typo, the native 2C/4T w/Vega 3 is 14nm (Banded Kestrel), 4C variants with bigger Vega are 12nm.

The fact that Banded Kestrel even exist tells that Stoney is dead.
 
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NostaSeronx

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The fact that Banded Kestrel even exist tells that Stoney is dead.
Raven2 doesn't succeed or replace Stoney.

Ryzen 3 3200U launched with A6-9220c -> A9-9435
Athlon 300U launched with A4-9120c -> A6-9235

With the return of Chrome OS desktops(AIOs(Chromebases) & NUCs(Chromeboxes)), there is room to have 15W A6-9235c and 15W A4-9135c. Which will clearly launch with 35W Ryzen 3 3250H and 35W Athlon 350H.

https://browser.geekbench.com/v4/cpu/compare/13611282?baseline=12806522
 
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krumme

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Raven2 doesn't succeed or replace Stoney.

Ryzen 3 3200U launched with A6-9220c -> A9-9435
Athlon 300U launched with A4-9120c -> A6-9235

With the return of Chrome OS desktops(AIOs(Chromebases) & NUCs(Chromeboxes)), there is room to have 15W A6-9235c and 15W A4-9135c. Which will clearly launch with 35W Ryzen 3 3250H and 35W Athlon 350H.

https://browser.geekbench.com/v4/cpu/compare/13611282?baseline=12806522
It's about depreciation profile and strategy. Stoney is slowly getting replaced by banded kestrel. Look what is actually happening.
 
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NostaSeronx

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It's about depreciation profile and strategy. Stoney is slowly getting replaced by banded kestrel. Look what is actually happening.
AMD's behavior with Raven2 doesn't show it replacing Stoney. Instead, it is primarily targeting Carrizo/Bristol, without impacting Stoney's product line.

However, do to GlobalFoundries behavior, 28nm costs a fraction of 14nm. AMD is not exempt from 22FDX/12FDX obligations.
 
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krumme

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AMD's behavior with Raven2 doesn't show it replacing Stoney. Instead, it is primarily targeting Carrizo/Bristol, without impacting Stoney's product line.

However, do to GlobalFoundries behavior, 28nm costs a fraction of 14nm. AMD is not exempt from 22FDX/12FDX obligations.
You still need people to plug them into a device if the competitor is some new atom. It means as you said stoney is competitor to some dirt cheap alternatives. It's not tablets or crappy laptops. So it's not a market we usually regard and discuss here.
 

NostaSeronx

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You still need people to plug them into a device if the competitor is some new atom. It means as you said stoney is competitor to some dirt cheap alternatives. It's not tablets or crappy laptops. So it's not a market we usually regard and discuss here.
Well most of my posts are for Stoney's successor.

Malta within 2016 has baseline 14nm wafer capacity, in which for 2018 they doubled it.
Dresden within 2017 has baseline 22nm wafer capacity, in which for...
2019 they quadruple(4x) it. <== Single Module max
2020 they hextuple(6x) it. <== Second Module start ramp
2021 they decuple(10x) it.

AMD's market behavior of Stoney is on-par with the low-end before a new low-end appears. Basically, Bobcat refreshes before Jaguar deploys.

Raven = High-end, which goes to 7nm (which is exempt from GlobalFoundries).
Raven2 = Mid-end, which might go to 7nm EUV (also, exempt from GlobalFoundries).
Stoney = Low-end, which absolutely must go to 22FDX/12FDX (Not exempt from GlobalFoundries).

With revisionist AMD history; Piledriver is succeeded by Zen(HP/compute). While Jaguar is succeeded by Excavator(LP/Mobile).

Since, most of the people who did Zen and Excavator within AMD are in better pastures. They cleared up that history real good. So, Zen2 replaces Zen for Raven/Raven2 successors. Then, what replaces Excavator on 22FDX, is it Excavator2. Who knows but those that talk are adamant it is CMT.

Summit has left GlobalFoundries. -1 14nm, +1 7nm TSMC
Polaris is in progress of leaving Globalfoundries. -1 14nm, +1 7nm TSMC
Vega has left GlobalFoundries. -1 14nm, +1 7nm TSMC
Raven is in progress... - 1 14nm, +1 7nm TSMC
Raven2 is also in progress(Zen3/RDNA), - 14nm, +1 7nm TSMC
Most of the consoles were shifted to TSMC.

Which leaves Raven2 at 150 mm squared, the small IOD at 125 mm squared, and the bigger one. Being the only ones in HVM new product ramp. Compared to all the Polaris chips(P10, P11, P12, etc), Vega(Vega 10, Vega 12) chips, Summit and Raven, etc.

If the A-series Stoney gets succeeded by Sempron 22FDX. Top model should at launch be $36 USD and mid model $31 USD and bottom model $26 USD. If it releases on to a motherboard with a socket.

....
Steamroller arbitrary per core module area utilization; 9.305 mm squared each
Excavator arbitrary per core module area utilization; 7.24 mm squared each.
22FDX version at minimum shrink; 5.63 mm squared each. Similar 0.77x shrink as Steamroller to Excavator.
22FDX version at maximum shrink: 4.34 mm squared each. Results of 28nm 9T to 22nm 8T reports.
The most accurate is the mean; 4.99 mm squared each. Which would be better than Excavator and worse than single-Vt architectures.

Zen roadmap is the core of any cost. Excavator roadmap is the core of cost-effectiveness.

Based on FX, A-series, Radeon 530/520 there is room for three SKUs;
Cost-effective CPU under FX-series brand
Cost-effective APU under A-series/Sempron brand.
Cost-effective GPU under RX 5300/5200 brand

However do to more focus towards mobile markets, it should not do a dCPU/dGPU. Instead, there should only be two APUs;
Big APU w/ quad-core + six-compute units: A9 (4C+6CU) max frequency, A7(4C+6CU) salvaged frequency, A5(4C+4CU) salvaged frequency+GPU salvage
//Octo-core ~3GHz x86/PowerPC/ARM w/ integrated GPU is its competitor.
Small APU w/ dual-core + four-compute units: A3(2C+4CU) max frequency, Sempron 3(2C+4CU) salvaged frequency, Sempron 1(2C+2CU) salvaged frequency+GPU salvage
//Quad-core ~3GHz x86/PowerPC/ARM w/ integrated GPU is this groups competitor.

Do to the high revenue of China, the above designs should be aimed at http://www.zhaoxin.com/ZXC.aspx?seriesid=20 & http://www.zhaoxin.com/ZXC.aspx?seriesid=18 respectively. Where as Raven2/Raven successors should be against existing/future Intel core/super-core products.

250.04 mm squared w/o I/O + 2 CUs removed = 176 mm squared then w/ 22FDX shrink = 135.5 mm squared, then via the small APU = <81.3 mm squared.
IOD from Carrizo would be 74.4 mm squared, 28nm BEOL to 28nm BEOL, other than some redesigns should be the same size.
135.5 + 75 => >210 mm squared and 82 + 75 => > 157 mm squared ,, use on package
 
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amd6502

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Apr 21, 2017
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Raven2 doesn't succeed or replace Stoney.

Ryzen 3 3200U launched with A6-9220c -> A9-9435
Athlon 300U launched with A4-9120c -> A6-9235

With the return of Chrome OS desktops(AIOs(Chromebases) & NUCs(Chromeboxes)), there is room to have 15W A6-9235c and 15W A4-9135c. Which will clearly launch with 35W Ryzen 3 3250H and 35W Athlon 350H.

https://browser.geekbench.com/v4/cpu/compare/13611282?baseline=12806522

Well, so Stoney compares very well against modern bottom of the barrel Atoms (dual core). I'd pick the Stoney here as it's generally much faster, with mainly the exception of memory bandwidth; the single channel design here is what gives the handicap.

So it's better here to have some product in this low range than none at all. But a narrow 2c/2t can only be a short temporary stopgap at this point. 4-thread would be the new minimum soon. Today all androde telephones are already quadcore (or higher). I think it makes less sense to pour money into a massive redesign on an old architecture. So these two paths are the most likely imho:

More likely: Lite version of Zen3, 1c/4t single core APU ported backwards either to 12LP or 12FDX. This could feature 4-way asymmetric multithreading, and a very wide core with a low power mode that uses quit a bit of power gating (which is similar to a repeat of the work done on excavator improvement over steamroller).

Less likely: A port of BR with mini 3CU graphics to FDX22
 

NTMBK

Lifer
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Well, so Stoney compares very well against modern bottom of the barrel Atoms (dual core). I'd pick the Stoney here as it's generally much faster, with mainly the exception of memory bandwidth; the single channel design here is what gives the handicap.

So it's better here to have some product in this low range than none at all. But a narrow 2c/2t can only be a short temporary stopgap at this point. 4-thread would be the new minimum soon. Today all androde telephones are already quadcore (or higher). I think it makes less sense to pour money into a massive redesign on an old architecture. So these two paths are the most likely imho:

More likely: Lite version of Zen3, 1c/4t single core APU ported backwards either to 12LP or 12FDX. This could feature 4-way asymmetric multithreading, and a very wide core with a low power mode that uses quit a bit of power gating (which is similar to a repeat of the work done on excavator improvement over steamroller).

Less likely: A port of BR with mini 3CU graphics to FDX22

I'm not sure that a 4T core really makes sense for this use case. High thread count SMT is useful for squeezing more throughput from a wide core, but it doesn't help with latency, which is what you actually want to get "snappiness" from a consumer platform. In fact forcing more threads to share the same resources may actually make things feel worse, by reducing the consistency of performance! Given that a Zen core isn't that big, I'd just put down two Zen cores with a small L3 and call it a day. If you really want you can optimize the cores for lower max clocks than Raven Ridge, and fit them into a smaller die area.
 

NostaSeronx

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The best core in any scenario will be derived from an evolution of 15h or a revolutionary CMT design.

Steamroller -> Excavator;
114-nm min. CPP/6x 90-nm 1x Mx/13-track(Thick Library)
to
114-nm min. CPP/8x 90-nm 1x Mx/9-track(Thin Library)

No other architecture has done the above at AMD. It would thus be more likely for AMD to do it again.

Excavator -> 22FDX process
114-nm min. CPP/8x 90-nm 1x Mx/9-track to 104-nm min. CPP/2x + 6x 80-nm & 90nm "1x" Mxs/8-track(Dense Library) or 7-track(Low Cost Library)

28SHP -> 28A(derived from SHP) -> 22FDX(comes with UHP, explicitly stating its increased performance).
<--- 28nm(28nm poly+28nm metal)/22nm(14nm poly+28nm metal) --->

Thus, 22FDX would be another 28nm node. Except, it is on-par with the FinFET node(marketing), and better than the FinFET node(R&D).

28SHP(Thick/13T) -> 28A(Thin/9T) -> 22FDX(Dense/8T) -> 22FDX+(Low cost/7T)
<-- Longevity sake, if 14nm generation is to be avoided till absolute costs go down then this is it. -->
// Wait till Low-cost EUV for logic or JFIL achieves logic
 
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amd6502

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I think Zen is a lot more area efficient and modern than XV.

XV advantage is it would be easier to port to FDX than Zen3. But Zen3 could probably be ported backwards to 12LP at somewhat higher cost than an XV node jump. Upfront cost is probably not a very big concern to Lisa Su, who's turned the ship around, reduced debt, and brought AMD solidly back into the black.

4-way aSMT would be pretty much like SMT2 with just a small added freebie as bonus. In many consumer cases would be just disabled (or used transparent to the consumer to enable cores to dynamically power down for lowest p-state) .

And we know Raven2 can keep up with BR in multithread very well. Latencies are no issues for Zen APUs and I don't think they would be for Zen3 APUs.

Something like 5 ALU + 3 AGU or wider would be pretty wide. It would be a very good step up from Zen+.

In near idle conditions and lowest p-state, cores could power down, and execution pipes put to sleep to operate in a 2 ALU + 2 AGU mode (which is the equivalent of half a dozer module). I think it would more efficient than CMT (whose main advantage over a very well done SMT core is mostly design simplicity).
 
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NostaSeronx

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Excavator being more behind is actually a benefit. Any Jaguar(14nm)/Zen(14nm) will see less improvement going to 22FDX/12FDX. This is why going from 15h to a new/revised design is vital.

Any level of area reduction from Excavator means lower delay, while the transition to 22FDX also means lower delay. However, for Zen it means increased area, pessimal process-swap efficiency from FinFET to FDSOI. Where Excavator's legacy came from PDSOI, which makes it have an optimal process-swap efficiency from bulk to FDSOI. The 28nm nodes:{SLP/HPP/SHP/HPA} all have increasing variation, increasing costs, decreasing yields from LP to HP compared to 22FDX.

Without Picasso's Raven2, since they do not compete..
High performance side{example}
A8-7410: 2.2 GHz base/2.5 GHz turbo
A9-9410: 2.9 GHz base/3.5 GHz turbo
Avg. of 52% increase of performance.
t6eeIHW.png


It would basically need to increase by 700 MHz at base and 1 GHz at turbo;
A9-9425(9435(est)): 3.1(3.2?) GHz base/3.7(3.8?) GHz boost
New 22FDX clocks: 3.8 GHz base/4.7 GHz boost

Steamroller with new process => 14.5% IPC increase
Excavator with new track height => 5% IPC increase

For the new 22FDX SoC that succeeds Stoney. The minimum expected increase of IPC is 19.5% or/and the minimum increase of frequency is +700 MHz@base/+1 GHz@boost. While overall CPU performance would need to increase by 52% at least. In which, from the whacky way AMD calculates, Excavator is only 6% ~ 18.5% over Jaguar/Puma.
 
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DrMrLordX

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XV advantage is it would be easier to port to FDX than Zen3.

When are people going to drop the idea of AMD selling anything on an FDX node? Nobody has demonstrated that AMD is taking any FDX wafers from GF. Ever.

Banded Kestrel will probably give way to a 12nm variant next year, and then we'll probably see a Renoir-based 7nm replacement in 2021 (possibly with a full CCX).
 

Hitman928

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When are people going to drop the idea of AMD selling anything on an FDX node? Nobody has demonstrated that AMD is taking any FDX wafers from GF. Ever.

Banded Kestrel will probably give way to a 12nm variant next year, and then we'll probably see a Renoir-based 7nm replacement in 2021 (possibly with a full CCX).

The company I work for actually just started to use the 22FDX node. I can't get into details at all but let's just say I'm quite certain AMD is not using this node for any major CPU design.
 

NostaSeronx

Diamond Member
Sep 18, 2011
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Banded Kestrel will probably give way to a 12nm variant next year, and then we'll probably see a Renoir-based 7nm replacement in 2021 (possibly with a full CCX).
Raven2/Banded Kestrel leads straight to Dali/River Hawk. It is 14nm for a reason, so it can go straight to 7nm. Like the original roadmap; Renoir/Grey Hawk(1H) + Dali/River Hawk(2H).
When are people going to drop the idea of AMD selling anything on an FDX node? Nobody has demonstrated that AMD is taking any FDX wafers from GF. Ever.
There will be no new major product wafer starts on 14LPP/12LP beyond 2019 from AMD. This leaves a huge gap for 22FDX and 12FDX which AMD agreed to use. It is signed, it is notarized, etc, the agreement has been placed.
The company I work for actually just started to use the 22FDX node. I can't get into details at all but let's just say I'm quite certain AMD is not using this node for any major CPU design.
Oracle 20SoC = M7 w/ 2-issue width @ 4.13 GHz / M8 w/ 4-issue width @ 5 GHz. Certainty isn't a guarantee, AMD will be fine with 22FDX. Relative to 28nm at GlobalFoundries, 22FDX blows it away. For 20nm vs 22FDX, DC charateristics have 22FDX being faster at -100 mV.

As far as anyone is concerned;
1. 14-nm gen FinFETs at Globalfoundries are worse than TSMC currently; 2x to 2.4x higher leakage to 12FFC and 1.2x to 1.4x higher area consumption to 12FFC.
2. GlobalFoundries is seeking to halt 14/12 and start a hastily new FDXcelerator;
FDXcelerator 1.0 = 40nm/28nm nodes to 22FDX
FDXcelerator 2.0 = 22FDX/14LPP/12LP nodes to 12FDX

///
However, any 22FDX/12FDX device will be better than any 14LPP/7FF device in competitiveness.

I do not think the 22FDX CMT core would even look like any of these;
 
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DrMrLordX

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Apr 27, 2000
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The company I work for actually just started to use the 22FDX node. I can't get into details at all but let's just say I'm quite certain AMD is not using this node for any major CPU design.

I'll accept that as valid. It reflects statements made by AMD regarding future product and GF regarding future applications of FDX nodes.
 
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NTMBK

Lifer
Nov 14, 2011
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For the new 22FDX SoC that succeeds Stoney. The minimum expected increase of IPC is 19.5% or/and the minimum increase of frequency is +700 MHz@base/+1 GHz@boost. While overall CPU performance would need to increase by 52% at least. In which, from the whacky way AMD calculates, Excavator is only 6% ~ 18.5% over Jaguar/Puma.

A massive IPC jump like that is only going to come with a big change to the core design. Why the heck would AMD spend millions designing a new core, on a type of process it's never used before, porting its GPU to a process it's never used before, just to target a tiny niche of the market with wafer thin margins? Two core Zen covers most of that market just fine. Those engineers would be much better spent on far more lucrative tasks like the next generation of Zen, or the next generation of RDNA.