NostaSeronx
Diamond Member
- Sep 18, 2011
- 3,683
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GlobalFoundries didn't cancel but because there is no successor new customers might drop. Customers who buy a lot in hopes for a continued safe roadmap no longer will buy.
CPU-side 14LPP/12LP @ GF would be switched to 12FF and 7FF @ TSMC.
GPU-side 14LPP/12LP @ GF would be switched to 12FF and 7FF @ TSMC
APU-side with no option will most likely get pulled to TSMC.
//
- advanced process nodes testchips (Global Foundries 14nm and TSMC 16nm)
- advanced FinFET CMOS process technologies on TSMC/GF Foundries
So, with no 7nm and the "differentiated options" in 14LPP/12LP might be used to increase the FinFET base cost. This will however just be the sort of reason to kill it off.
http://nattokude.gozaru.jp/inspiron11_3180/review.html
http://www.pasonisan.com/dell/inspiron11-2in1/3185-a6-9220e-a9-9420e.html
Looking at the Stoney Ridge. Then, add a switch to 22FDX w/ perf boost as promised then one half of it.
A9-9420e => 2.7 GHz (peak) * 1.5 => 4.05 GHz * 1.2 w/ (1v FBB) => 4.86 GHz with the same TDP.
A9-9220e => 2.4 GHz (peak) * 1.5 => 3.6 GHz * 1.2 w/ (1v FBB) => 4.32 GHz with the same TDP.
9420e w/ Half => 2.7 GHz (peak) * 1.25 => 3.375 GHz * 1.1 w/ (1v FBB) => 3.7125 GHz with the same TDP.
9220e w/ Half => 2.4 GHz (peak) * 1.25 => 3 GHz * 1.1 w/ (1v FBB) => 3.3 GHz with the same TDP.
I'm calculating from the 1V supply and body biasing performance increase from the FBB @ 1 Vdd + 1 Vbb.
Complex IP:
https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/fd-soi-2
https://community.cadence.com/cfs-f...n-Shot-2016_2D00_04_2D00_20-at-2.57.56-PM.jpg
For future FT5? with;
DDR4 support up to 3600 MHz
LPDDR4 support up to 4267 MHz
By the way: Apr 27, 2016 is the date. When Cadence Blogs showed this. PCIE4.0 w/ CCIX is supported now. LPDDR5/DDR5 haven't shown themselves yet on 22FDX, but it is only a bit of time.
If Raven2 top SKU is at $55, then successor to Stoney and 22FDX replacement to Raven2 would be $44 for top SKU. With the 12FDX solution being $40 for top SKU. As the ASP drops, but the volume sold increases.
The lowest cost scenario is like Agena to Deneb. Same architecture with higher clocks with new uncore and same to lower power.
The slightly more expensive scenario is like Bobcat to Jaguar. This however would be cheaper to the 12FDX node. As the new architecture would be validated sooner than later. Less masks now, rather than more masks later.
https://www.semanticscholar.org/paper/Low-Cost-and-Highly-Manufacturable-MOL/BEOL-in-for-Jain-Kim/30cf974cc4734ccb0240e92bd165cbdb8c3f385f
22FDX DDB-12T width is 960nm
28BLK SDB-9T width is 900nm
22FDX CNRX-8T width is 640nm
(Relative to NR2)
===
Doing some simulations:
FX (CPU-type) => 130~140 mm squared
FX would have 8-cores via CMT modules; either in 4M(2C) or 2M(4C) methodology. It will most definitely have no L3 cache. Instead, it would probably adopt Jaguar's L2 and upgrade it to 4 MB; 8x 512 KB SRAMs. Do to the aim for EPI the 96KB L1i might be shrinked for lower size. The shared FPU might turn into private FPUs which would increase LSU/FPU density by 2x~3x. A much smaller core and CMT with more modern design.
Sempron FX/Sempron (APU-type) => 100~120 mm squared
These products would probably peak out at 4-cores via CMT modules. Also, either 4-core module or a two 2-core modules. Largely following the above CPU enhancements. While, also reducing the GPU from Bristol Ridge or enhancing the GPU from Stoney. These would probably use 2 MB L2, with 4x 512 KB SRAMs. With Small Super-SIMD CUs w/ small caches we could still see 8 CUs. This would probably point why we haven't seen 22FDX products yet. The GPU validation isn't complete and probably by the time it is complete DDR5/LPDDR5 will be out.
GlobalFoundries releases AMD from FinFETs, then GlobalFoundries shackles AMD with FDSOI. It is the only way for GlobalFoundries to keep big names at the foundry. I highly doubt AMD wouldn't run a processor that will get cheaper than 28nm by Q4 2018. Adaptive Voltage Frequency Biasing Scaling; AVFBS would probably be an extreme benefit to 25x20. Essentially, getting to it in 2019, rather by 2020.
New Ryzen/Athlon => Premium
New FX/Sempron => Budget
CPU-side 14LPP/12LP @ GF would be switched to 12FF and 7FF @ TSMC.
GPU-side 14LPP/12LP @ GF would be switched to 12FF and 7FF @ TSMC
APU-side with no option will most likely get pulled to TSMC.
//
- advanced process nodes testchips (Global Foundries 14nm and TSMC 16nm)
- advanced FinFET CMOS process technologies on TSMC/GF Foundries
So, with no 7nm and the "differentiated options" in 14LPP/12LP might be used to increase the FinFET base cost. This will however just be the sort of reason to kill it off.
http://nattokude.gozaru.jp/inspiron11_3180/review.html
http://www.pasonisan.com/dell/inspiron11-2in1/3185-a6-9220e-a9-9420e.html
Looking at the Stoney Ridge. Then, add a switch to 22FDX w/ perf boost as promised then one half of it.
A9-9420e => 2.7 GHz (peak) * 1.5 => 4.05 GHz * 1.2 w/ (1v FBB) => 4.86 GHz with the same TDP.
A9-9220e => 2.4 GHz (peak) * 1.5 => 3.6 GHz * 1.2 w/ (1v FBB) => 4.32 GHz with the same TDP.
9420e w/ Half => 2.7 GHz (peak) * 1.25 => 3.375 GHz * 1.1 w/ (1v FBB) => 3.7125 GHz with the same TDP.
9220e w/ Half => 2.4 GHz (peak) * 1.25 => 3 GHz * 1.1 w/ (1v FBB) => 3.3 GHz with the same TDP.
I'm calculating from the 1V supply and body biasing performance increase from the FBB @ 1 Vdd + 1 Vbb.
Complex IP:
https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/fd-soi-2
https://community.cadence.com/cfs-f...n-Shot-2016_2D00_04_2D00_20-at-2.57.56-PM.jpg
For future FT5? with;
DDR4 support up to 3600 MHz
LPDDR4 support up to 4267 MHz
By the way: Apr 27, 2016 is the date. When Cadence Blogs showed this. PCIE4.0 w/ CCIX is supported now. LPDDR5/DDR5 haven't shown themselves yet on 22FDX, but it is only a bit of time.
If Raven2 top SKU is at $55, then successor to Stoney and 22FDX replacement to Raven2 would be $44 for top SKU. With the 12FDX solution being $40 for top SKU. As the ASP drops, but the volume sold increases.
The lowest cost scenario is like Agena to Deneb. Same architecture with higher clocks with new uncore and same to lower power.
The slightly more expensive scenario is like Bobcat to Jaguar. This however would be cheaper to the 12FDX node. As the new architecture would be validated sooner than later. Less masks now, rather than more masks later.
https://www.semanticscholar.org/paper/Low-Cost-and-Highly-Manufacturable-MOL/BEOL-in-for-Jain-Kim/30cf974cc4734ccb0240e92bd165cbdb8c3f385f
22FDX DDB-12T width is 960nm
28BLK SDB-9T width is 900nm
22FDX CNRX-8T width is 640nm
(Relative to NR2)
===
Doing some simulations:
FX (CPU-type) => 130~140 mm squared
FX would have 8-cores via CMT modules; either in 4M(2C) or 2M(4C) methodology. It will most definitely have no L3 cache. Instead, it would probably adopt Jaguar's L2 and upgrade it to 4 MB; 8x 512 KB SRAMs. Do to the aim for EPI the 96KB L1i might be shrinked for lower size. The shared FPU might turn into private FPUs which would increase LSU/FPU density by 2x~3x. A much smaller core and CMT with more modern design.
Sempron FX/Sempron (APU-type) => 100~120 mm squared
These products would probably peak out at 4-cores via CMT modules. Also, either 4-core module or a two 2-core modules. Largely following the above CPU enhancements. While, also reducing the GPU from Bristol Ridge or enhancing the GPU from Stoney. These would probably use 2 MB L2, with 4x 512 KB SRAMs. With Small Super-SIMD CUs w/ small caches we could still see 8 CUs. This would probably point why we haven't seen 22FDX products yet. The GPU validation isn't complete and probably by the time it is complete DDR5/LPDDR5 will be out.
GlobalFoundries releases AMD from FinFETs, then GlobalFoundries shackles AMD with FDSOI. It is the only way for GlobalFoundries to keep big names at the foundry. I highly doubt AMD wouldn't run a processor that will get cheaper than 28nm by Q4 2018. Adaptive Voltage Frequency Biasing Scaling; AVFBS would probably be an extreme benefit to 25x20. Essentially, getting to it in 2019, rather by 2020.
New Ryzen/Athlon => Premium
New FX/Sempron => Budget
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