AMD Bristol/Stoney Ridge Thread

[The Stilt]

I'm confused about VP9. All the sites report the there is VP9 support, and even anandtech implies that UVD handles VP9 decode "...the upgraded video decoder and codec engine, and thus support for VP9 and HEVC decode in AMD’s lowest parts."

Why are people saying that there is no VP9 decode in the APU?

If there is VP9 support, AMD completely forgot to document it :sneaky: I'd point at AMD marketing department.

 

[DrMrLordX]

If I was a billionaire, I would order a full analysis of "Carrizo" and "Bristol Ridge" from Chipworks :sneaky:

I wonder why didn't they implement those marvelous changes in "Carrizo" to begin with. The 28nm HPP process wasn't exactly new, nor Carrizo in the schedule by the time AMD finally managed to pop it out.

Consider when GF finally took possession of IBM's remaining fabs and fab staff/engineers. That was actually after AMD launched Carrizo, no? Something like Sept. 2015? That might also explain why Bristol Ridge isn't yet launched?

edit: correction, July 2015

http://www.globalfoundries.com/news...-acquisition-of-ibm-microelectronics-business

So during/shortly after the launch of Carrizo.

 

[monstercameron]

Serious question here: could this compete with Core m3 parts? If I were AMD right now, I would be integrating systems that looked something like this:

11.6" 1600x900 screen
Metal body
128GB mSATA SSD
4-8GB of RAM

By passing on useless gimmicks like 360-degree hinges and touchscreens, AMD could invest in build quality and SSDs and produce fairly cheap and rather reliable machines. Think something like "Eee PC on steroids" here, or a metal version of the old Thinkpad X100-series.

keep dreaming...I'm still searching for it.

http://forums.anandtech.com/showthread.php?p=38268376#post38268376


As for BR, josh @ pcperspective is claiming that it is built on a newer tweak 28nm process, not the same as carrizo.

 

[Flash831]

There is no point in "releasing" Bristol Ridge separately for FM2+, as the same silicon already exists in form of Athlon X4 845 for FM2+.

The Stilt, do you know if Bristol Ridge/Stoney Ridge could work on the AM1-socket? If we presume the memory controller works with DDR3 of course.

Thanks in advance, I really appreciate your work.

 

[The Stilt]

The Stilt, do you know if Bristol Ridge/Stoney Ridge could work on the AM1-socket? If we presume the memory controller works with DDR3 of course.

Thanks in advance, I really appreciate your work.

In existing AM1 motherboards?
As a CPU (like Athlon X4 845) yes, with limited functionality (PCI-E, SATA, single channel memory). As a full SoC, no (only two main voltages available and not enough of contacts).

 

[bhtooefr]

Serious question here: could this compete with Core m3 parts? If I were AMD right now, I would be integrating systems that looked something like this:

11.6" 1600x900 screen
Metal body
128GB mSATA SSD
4-8GB of RAM

By passing on useless gimmicks like 360-degree hinges and touchscreens, AMD could invest in build quality and SSDs and produce fairly cheap and rather reliable machines. Think something like "Eee PC on steroids" here, or a metal version of the old Thinkpad X100-series.

Core m3's TDP is at 4.5 watts, though, versus an optimum TDP of 15 for these parts on the low end (and cTDPs down to 10 watts for Stoney Ridge). And, a cTDP-down Stoney would probably get destroyed by a Core m3, especially if you cTDP-upped the m3 to 7.5 watts, I suspect.

 

[monstercameron]

am4!!!!!!!!!!!!
http://tieba.baidu.com/p/4468719980?pn=1

the a10-9700 BR desktop chip in an hp system.

3.8GHz, higher than the 845 @3.5Ghz base. maybe it has a higher turbo clock.

 

[The Stilt]

am4!!!!!!!!!!!!
http://tieba.baidu.com/p/4468719980?pn=1

the a10-9700 BR desktop chip in an hp system.

3.8GHz, higher than the 845 @3.5Ghz base. maybe it has a higher turbo clock.

3.8GHz is the maximum turbo and 3.5GHz is the base. No different to Athlon X4 845 in that aspect.

 

[dark zero]

3.8GHz is the maximum turbo and 3.5GHz is the base. No different to Athlon X4 845 in that aspect.

It has now an iGPU!

Also... AM4 confirmed!

So Bristol Ridge will come with Summit Ridge then... or it got delayed until July.

 

[cbn]

It has now an iGPU!

Also... AM4 confirmed!

So Bristol Ridge will come with Summit Ridge then... or it got delayed until July.

The pictures in the link were posted April 10, 2016.

But desktop BR was not announced at AMD's Computex presentation:

http://forums.anandtech.com/showthread.php?t=2475103

 

[Abwx]

There are no physical differences between BR and CZ.

Bristol Ridge est très (très) proche de Carrizo, d'ailleurs le nombre de transistor est identique à 3,1 milliards alors que la surface varie légèrement (250.4mm² au lieu de 244.6mm²).

http://www.hardware.fr/news/14654/2-puces-apu-7e-generation.html

If there is VP9 support, AMD completely forgot to document it :sneaky: I'd point at AMD marketing department.

.............

http://www.anandtech.com/show/10362/amd-7th-generation-apu-bristol-ridge-stoney-ridge-for-notebooks

 

[monstercameron]

http://www.hardware.fr/news/14654/2-puces-apu-7e-generation.html




.............

http://www.anandtech.com/show/10362/amd-7th-generation-apu-bristol-ridge-stoney-ridge-for-notebooks

accelerated vp9 but hardware decode hevc...seems shader/opencl based.

 

[Abwx]

accelerated vp9 but hardware decode hevc...seems shader/opencl based.

Whatever the means it seems efficently supported since they insist on this feature :

 

[The Stilt]

Since "Bristol Ridge" is also supposed to support VP9 (AMD doesn't separate Bristol and Stoney), obviously it is a OpenCL accelerated decoding and not a fixed function HW solution. Carrizo doesn't have VP9 acceleration and there is exactly 0 differences between Carrizo and "Bristol Ridge" die layouts.

So

CZ / BR = H.264 / HEVC 8-bit HW up to 4K
ST = H.264 / HEVC 8/10-bit HW up to 4K

 

[Abwx]

Carrizo doesn't have VP9 acceleration and there is exactly 0 differences between Carrizo and "Bristol Ridge" die layouts.

I think you missed this in my previous posts :

Bristol Ridge est très (très) proche de Carrizo, d'ailleurs le nombre de transistor est identique à 3,1 milliards alors que la surface varie légèrement (250.4mm² au lieu de 244.6mm²).

www.hardware.fr/news/14654/2-puces-apu-7e-generation.html

The dies areas are not the same, so there s forcibly a difference, quite possibly in the UVD since they state that it was upgraded..

 

[cbn]

(snip) quite possibly in the UVD since they state that it was upgraded..

That slide is specific to A9, A6 and E2 which is Stoney Ridge.

 

[Abwx]

That slide is specific to A9, A6 and E2 which is Stoney Ridge.

What about the one below ?..

Is it also about Stoney Ridge.?.

VP9 is supported by both Stoney and Bristol Ridges, if some people believe that it s not the case then there s some money that can be made on courts...

 

[cbn]

What about the one below ?..

Is it also about Stoney Ridge.?.

VP9 is supported by both Stoney and Bristol Ridges, if some people believe that it s not the case then there s some money that can be made on courts...

A12 is Bristol Ridge.

And they mention accelerated VP9 decode rather than VP9 hardware decode.

P.S. Also looking back on the Stoney Ridge slide notice it says H265 hardware decode, but only VP9 decode (not VP9 hardware decode).

 

[The Stilt]

I think you missed this in my previous posts :

www.hardware.fr/news/14654/2-puces-apu-7e-generation.html

The dies areas are not the same, so there s forcibly a difference, quite possibly in the UVD since they state that it was upgraded..

No, I didn't miss it.
Both Carrizo and Bristol Ridge dies are 250.06mm² (nominal), 246.39mm² (actual).

Carrizo on "Bristol Ridge" (50% transparency). AMD took the shot of BR on a wafer and Carrizo was already cut out, as you can see.

Carrizo: http://gallery.dpcdn.pl/imgc/Video/63433/g_-_-x-_-_-_63433x20150603021240_0.jpg

BR: http://blogs-images.forbes.com/patr...5/7thGen-DIE-SMALL-Final-Recolor-1200x847.jpg

Could you please point out the differences?

 

[VirtualLarry]

Well, sounds good to me. HDMI2.0, "accelerated" (whether in hardware or compute-core shaders) VP9 and HEVC decode... when is Gigabyte going to use one in a Brix box? And will it be compatible with Win7 64-bit? (PLEASE!)

I'd buy several in Brix units. Sounds like a winner to me!

 

[Abwx]

No, I didn't miss it.
Both Carrizo and Bristol Ridge dies are 250.06mm² (nominal), 246.39mm² (actual).

Could you please point out the differences?

I could point you that one shot doesnt show the full die.

Besides the area difference was pointed by Hardware.fr after they got briefed by AMD at the Computex, indeed the transistors used (likely only in the high frequency parts of the chip) are not exactly the same as in Carrizo..
I dont think that looking at a die shot will give any info about thoses evolutions, no more that differences in electric schematics of a given part can be accurately spoted.

Anyway this debate is moot, the point is that BR as well as SRidge have support for VP9, wich contradict your sayings in several of your posts.

 

[The Stilt]

Not a full die?
Look around the original Bristol Ridge die shot and then tell me what's around the "not the full die".

EDIT: I'll give you a hint: Below the memory controllers (of the center die), there is a PCI-E block. And above the PCI-E block (of the center die) there are memory controllers :sneaky:
In total you see parts of nine different dies.

 

[Abwx]

Not a full die?
Look around the original Bristol Ridge die shot and then tell me what's around the "nots the full die".

Look closer at the shot you linked :

http://gallery.dpcdn.pl/imgc/Video/63433/g_-_-x-_-_-_63433x20150603021240_0.jpg

http://blogs-images.forbes.com/patr...5/7thGen-DIE-SMALL-Final-Recolor-1200x847.jpg

Look at the first shot where the GPU is red, precisely on the top right of the pic, on the second shot this part is on the bottom right, isnt a part of the circuitry missing.?

The second shot is inverted top to bottom in respect of the first one, all the bottom of the second one is masked on the top of the first one (the one wich is red)...

The side at the exterior of the GPU is also missing..

 

[Sweepr]

So no 6W TDP model? Disappointing.

 

[The Stilt]

I can't see anything missing, unless you mean the parts which turn into dust when the dies are sliced apart. Besides UVD blocks are located below the CPU CUs.