AMD Bristol/Stoney Ridge Thread

[amd6502]

I don't think they're available yet, so delidding isn't yet possible, but AMD had confirmed to Anandtech that the new mobile line is two new chips. Like bsp2020, I can't find it with a trivial search, but I'm sure a little more work would dig that up.

I imagine that the 200GE is purely binned first gen Raven Ridge. It was said that Raven 2 has 4x PCIe, and, assuming that's true, it would conflict with 200GE's specs. I figure we'll have to wait for the 300GE to see Raven 2.

There are now more signs that 220ge and 240ge likely are not native dual core dies but rebinned RR salvage. While it's not nearly as conclusive as delidding or confirmation by wccftech, the stepping info from supposed cpu-z info posted here is the same as 200ge ""RV-B0"

https://pc.watch.impress.co.jp/docs/topic/review/1167323.html

compare with:

This is a good sign for a quad thread Stoney successor (XV based APU) to share the low end market with the Athlon 200ge series.

It's still not the likeliest. Picasso-L still seems somewhat more likely than a Bristol Ridge-L (with parts 300ge 320ge 340ge fitting in better with existing product line than A9-???) .

 

[ET]

There are now more signs that 220ge and 240ge likely are not native dual core dies but rebinned RR salvage.

Wouldn't have expected differently. The only chips I'm expecting at this point to perhaps be native dual core are Athlon 300U and Ryzen 3 3200U, which might at some point arrive as Athlon 3x0GE on the desktop.

 

[NTMBK]

This is a good sign for a quad thread Stoney successor (XV based APU) to share the low end market with the Athlon 200ge series.

Why would AMD make yet another 4-core Excavator chip? They already have Bristol Ridge, and Excavator fundamentally isn't a very good CPU architecture. Why sink money into a new design for marginal gains over the chip they already have in their catalogue, instead of spending it on Zen?

 

[krumme]

For 2022 to 2024 amd still have to use a lot of gf capacity due to wsa.
When the need for 12nm io becomes problematic and tsmc moves to 5mm and 3nm nodes there will be a huge need to move a lot of 12nm capacity. The successor to stoney ridge is a prime candidate for that job.
So yeaa it's interesting when we will see a slim 2 core zen apu here. Or you think they will just use zen plus 4c apu and just adapt them? That would be a pretty strong chromebook cpu

 

[NostaSeronx]

Why would AMD make yet another 4-core Excavator chip?

imho, they probably won't.
A shrink would automatically give it a new name.
Bulldozer -> Piledriver // Small modification -> new name
Piledriver -> Steamroller // Shrink+redesign modification -> new name
Steamroller -> Excavator // Migration modification -> new name
Excavator(CZ) -> Excavator(BrR/StR) // Transistor swap -> no new name.

A port to 22FDX would be a full migration at minimum to a full redesign at maximum. All options available warrant a new name.

They already have Bristol Ridge, and Excavator fundamentally isn't a very good CPU architecture. Why sink money into a new design for marginal gains over the chip they already have in their catalogue, instead of spending it on Zen?

Zen moves forward at rapid pace. There is room for a slower shrinking architecture.

Zen: 14nm -> 7nm -> 5/3nm
xyz: 22FDX -> 12FDX -> 7FDX(a.k.a Beyond 12FD)

Excavator is silicon-proven in the sub-10W area. Using it as the basis for a next-gen architecture is logical. Keeping it on planar will make it easier to contract it off. Specifically at Chengdu Haiguang Microelectronics Technology and Chengdu Haiguang Integrated Circuit Design. Which would have a relatively local fab in Chengdu from GlobalFoundries to use.

Excavator -> 2015 / +4 years => 2019 for a new architecture on low budget.
Stoney Ridge -> 2016 / +4 years => 2020 for a new SoC on low budget.

 

[ET]

AMD is still selling the

For 2022 to 2024 amd still have to use a lot of gf capacity due to wsa.

We don't know what kind of agreement AMD will have for 2022 to 2024. The capacity in that amendment might be quite low. We also don't know what kind of prices AMD is getting, which might make it worth producing more 14/12nm stuff.

Just based on the past, AMD could very well use that capacity for something. AMD is still selling the 6 years old 28nm Oland GPUs. It might replace them with Polaris 12, for example, as a long term entry level mobile GPU. Similarly for CPUs, assuming we indeed have 2 core native Ryzen Mobile, that, or a 12nm derivative, could remain a low end offering until 2024. There are probably other chips or chiplets AMD could continue making if the GF 14/12nm production cost is low enough.

 

[Shivansps]

Why AMD would waste money on a die shrink of Stoney Ridge? This makes no sence to me, just let it die already, right now it dosent even make sence as a Celeron counterpart due to prices, right now the 200GE is at the same price as the G4900.

AMD, if they need, they could make a 12nm low powered dual cores monolithic Ryzen APUs for entry level PC market and mobile devices in the same area that is right now taken by Atom based Celeron and Pentiums.

A native 2C/4T with 6CU is enoght for the job.

 

[amd6502]

Why would AMD make yet another 4-core Excavator chip? They already have Bristol Ridge, and Excavator fundamentally isn't a very good CPU architecture. Why sink money into a new design for marginal gains over the chip they already have in their catalogue, instead of spending it on Zen?

1. Product segmentation
2. Production cost
3. WSA economics
4. Branch research to FDSOI (and pioneer concepts for a NG architecture on cheap nodes).

A native 2C/4T with 6CU is enoght for the job.

Yes that's the other option if higher volumes of low end low wattage products are needed. They now have the idle power much improved in Picasso. So Picasso-L could be a decent sub 10W product.

The design is already there. So the development cost will be low even with pricier fintet masks.

As far as pro (FD)SOI arguments:

The advantage of Stoney++ (4c/4t) would be considerably lower transistor count (~1.5B), lower manufacturing cost of 28nm or 22FDX. On FDX (and with big-little arrangement) I'm guessing it would have wattage advantages over Zen+ while if it remained on 28nm it would be at a disadvantage even to RR salvage athlons.

 

[NostaSeronx]

Why AMD would waste money on a die shrink of Stoney Ridge?

Why would it be a waste?

22FDX guarantees a 50% increase of frequency with a 200 mV decrease.
a9-9420e/a6-9220c shrink would be:
1.8 GHz -> 2.7 GHz at <0.8V
2.7 GHz -> 4.05 GHz at ~0.8V

a6-9220e/a4-9120C
1.6 GHz -> 2.4 GHz at <0.8V
2.4 GHz -> 3.6 GHz at ~0.8V
^-- would still be 6W parts.

This is displayed in Cortex A53/A55s... where the 28nm models are 1.5~1.7 GHz and the 22FDX models are 2.3~2.5 GHz.

However, there is subtle design changes which have been researched. That could reduce Excavator's area by 40% and power by 60% on the same node. Add the shrink of 22FDX which guarantees a 0.72x shrink of logic and a 0.83x shrink of SRAM. With the above performance boost, and the undisclosed boost of FBB. Don't forget with the added area, the premiums also decrease so there could be an IPC boost. M-SPACE cores allow them to swap FE/BE/Cores/FPU/Caches at anytime.

Cost-effective improvement at the lowest cost. To a new architecture for a low development cost. Barely, seems like a waste.

 

[Shivansps]

Why would it be a waste?

22FDX guarantees a 50% increase of frequency with a 200 mV decrease.
a9-9420e/a6-9220c shrink would be:
1.8 GHz -> 2.7 GHz at <0.8V
2.7 GHz -> 4.05 GHz at ~0.8V

a6-9220e/a4-9120C
1.6 GHz -> 2.4 GHz at <0.8V
2.4 GHz -> 3.6 GHz at ~0.8V
^-- would still be 6W parts.

This is displayed in Cortex A53/A55s... where the 28nm models are 1.5~1.7 GHz and the 22FDX models are 2.3~2.5 GHz.

However, there is subtle design changes which have been researched. That could reduce Excavator's area by 40% and power by 60% on the same node. Add the shrink of 22FDX which guarantees a 0.72x shrink of logic and a 0.83x shrink of SRAM. With the above performance boost, and the undisclosed boost of FBB. Don't forget with the added area, the premiums also decrease so there could be an IPC boost. M-SPACE cores allow them to swap FE/BE/Cores/FPU/Caches at anytime.

Cost-effective improvement at the lowest cost. To a new architecture for a low development cost. Barely, seems like a waste.

OK ill admit you got a point there, but all this is even worth it? remember that AMD needs to have both the performance AND power to re-enter this market that they lost to Intel newer Atoms and there is now ARM making a push as well. Forget about margins, AMD knows they have to sacrifice margins here.

just check Anandtech review of the 200GE, it is wiping the floor with the 3.8Ghz BASE A12-9800 on almost every CPU test.
Even the 15W 2200U manages equal or very close results to the A12-9800... I just think its time to give up on this old arch, I rather see then going to a native 2C Ryzen with a small gpu of 4-6CUs.

 

[NostaSeronx]

just check Anandtech review of the 200GE, it is wiping the floor with the 3.8Ghz BASE A12-9800 on almost every CPU test.
Even the 15W 2200U manages equal or very close results to the A12-9800... I just think its time to give up on this old arch, I rather see then going to a native 2C Ryzen with a small gpu of 4-6CUs.

I do not think that AMD will be releasing Excavator again.

OK ill admit you got a point there, but all this is even worth it? remember that AMD needs to have both the performance AND power to re-enter this market that they lost to Intel newer Atoms and there is now ARM making a push as well. Forget about margins, AMD knows they have to sacrifice margins here.

At worst, it has Excavator's performance with higher efficiency and speed.
At best, it goes beyond Zen's performance/cost for anything below 15W.

Athlon 200U/300U 15W vs Sempron ___ 15W might lean towards Sempron with Performance and Power over Cost.
Sempron(__) is fully within $9-$60 range, while only the bottom tier of Athlon(RV2) would be below $60.

I'll throw this bit in... the AGLUs are always open to have fully realized arithmetic capability. If AMD does that, it would barely make a dent within the size of the Integer core. However, that isn't the biggest issue. If they commit that, what are they going to do to the floating point units. Bulldozer through Excavator still use outdated physical FP80+FP64 register files and datapaths.

CPU-side, there is much to improve without upending the frame of the architecture. Switching to FP128 register files/datapaths won't warrant a new design. Swapping AGLUs with AALUs won't warrant a new design. A module is modular, thus none of this really impacts the module architecture.

 

[NTMBK]

1. Product segmentation
2. Production cost
3. WSA economics
4. Branch research to FDSOI (and pioneer concepts for a NG architecture on cheap nodes).

On the topic of production cost- take a look at the actual layout of the Raven Ridge die:

Notice the large amounts of space that are devoted to neither the GPU nor the CPU. Now imagine that the GPU was cut down by 8/11ths (from 11CU to 3CU), and the CPU was cut down by half (from 4 core to 2 core). You still need all the other stuff in place to manage IO, decode video, etc. At that point the two CPU cores really aren't that big a part of the remaining die area- the non-CPU, non-GPU part is a much bigger proportion of that cut down die.

Now compare that theoretical die with one that replaces the two Zen cores with a (shrunk and tweaked) Excavator module. Is the die smaller? Sure, but not that much smaller. All the non-CPU stuff hasn't shrunk. Is the dramatic loss in system responsiveness worth that small tradeoff in die area? Is the slight saving in production costs worth the millions in up-front costs to port Excavator to 12nm FinFET, instead of reusing Zen?

 

[ET]

Is the slight saving in production costs worth the millions in up-front costs to port Excavator to 12nm FinFET, instead of reusing Zen?

We're talking 22nm and 12nm FDSOI, and not 12nm FinFET.

As for the size, it's not purely replacing the CPU block in a current design. Though even if you did that in the example you gave, that could potentially reduce the space wasted for routing, simply on account of being able to fit the blocks better.

The advantage of using 22FDX would be that it's a cheaper process than 14nm but smaller than 28nm and it's low power. Port something like Stoney to it, and it would take less power, be smaller (than 28nm) and potentially work at higher clocks. That's what Nosta is driving at.

AMD announced at CES 'new' Stoney based CPUs for Chromebooks, so obviously there's a market that Stoney is addressing better than Raven Ridge variants, even though Raven Ridge performs much better. So it's not out of the question for AMD to produce variants of these chips, as long as they address a market that Zen doesn't cover, or doesn't cover well.

 

[krumme]

We're talking 22nm and 12nm FDSOI, and not 12nm FinFET.

As for the size, it's not purely replacing the CPU block in a current design. Though even if you did that in the example you gave, that could potentially reduce the space wasted for routing, simply on account of being able to fit the blocks better.

The advantage of using 22FDX would be that it's a cheaper process than 14nm but smaller than 28nm and it's low power. Port something like Stoney to it, and it would take less power, be smaller (than 28nm) and potentially work at higher clocks. That's what Nosta is driving at.

AMD announced at CES 'new' Stoney based CPUs for Chromebooks, so obviously there's a market that Stoney is addressing better than Raven Ridge variants, even though Raven Ridge performs much better. So it's not out of the question for AMD to produce variants of these chips, as long as they address a market that Zen doesn't cover, or doesn't cover well.

The stoney cromebook is just a new microcode change. That's pretty cheap fixed cost

And i think the future solution for that market is the same. The ryzen apu plus we will know in a few months but just tuned for low cost with new micro code. Supplemented by stoney for the lowest lowest market. The stoney can be allocated to lower and lower end as new 7nm apu is introduced.

Upfront it might look like a 2c 3cu zen solution is cheaper but it bears a risk to develop a new product for such a low end market. And you have to take persons away from the more high end pipeline. Imo it isn't worth it for the saved variable cost especially as you have stoney to wipe the lowest end. To risky.
Amd needs to move away from that market anyway.

 

[Shivansps]

Risky? Intel has an entire lineup of Atoms devoted to that market the main problem for AMD is matching power/heat...

The secondary problem is matching 4C MT perf with a 2C/4T, and Intel will step up performance in this area in the next few years...

 

[krumme]

Risky? Intel has an entire lineup of Atoms devoted to that market the main problem for AMD is matching power/heat...

The secondary problem is matching 4C MT perf with a 2C/4T, and Intel will step up performance in this area in the next few years...

Intel had a profit of 22.000M in 2017.
Amd had a profit of 43M.
Or 500 times as much
Or 50000% more.
Risk management mirrors the available resources.

 

[ET]

And you have to take persons away from the more high end pipeline.

Not really. AMD might not be Intel, but it's still a big company. I'm sure that it has teams working on quite a few experimental things to cover various contingencies.

It's not that I believe in the mythical 22FDX APU, but I think that most arguments against it are only speculations based on what people think AMD should do. And people are often wrong about that kind of thing.

 

[Shivansps]

Not really. AMD might not be Intel, but it's still a big company. I'm sure that it has teams working on quite a few experimental things to cover various contingencies.

It's not that I believe in the mythical 22FDX APU, but I think that most arguments against it are only speculations based on what people think AMD should do. And people are often wrong about that kind of thing.

The only strong argument i could think off is that AMD does not want to do parallel developments of 2 archs, AMD killed off everything when started to work on Zen and i dont see any reason of why that would change now. Specially if they can still use Zen for the job.

 

[ET]

AMD killed off everything when started to work on Zen

No, it didn't. Zen started around 2012, and AMD released quite a few things after that.
Bristol and Stoney were released well into the Zen work cycle.

And even if one imagines that AMD has killed off development of other things, we know Ryzen profits allowed AMD to invest more in R&D.

 

[krumme]

Not really. AMD might not be Intel, but it's still a big company. I'm sure that it has teams working on quite a few experimental things to cover various contingencies.

It's not that I believe in the mythical 22FDX APU, but I think that most arguments against it are only speculations based on what people think AMD should do. And people are often wrong about that kind of thing.

A new 14nm is 100M. Grated it's finfet but you don't dump the equivalent of thr entire profit for 2017 on some stoney ridge 4c derivative - or rip future zen or gpu development of the same ammount. And that's a conservative estimate.There is better ways to use those money. The resources is extremely scarce vs Intel. We get one 7nm cpu die for this year. Stoney ridge was on the shelf. Fine. It's an excellent solution. But only because it was on the shelf.

 

[ET]

A new 14nm is 100M

Again, talking about 22FDX. Cost is much lower.

Also, here's a link to AMD's R&D spending from 2001 to 2018. That's almost $1.5B spent in 2018 on R&D. So even if that was $100M, or about $20M a year (assuming a 5 year project), that's less than 2% of AMD's R&D budget. Which granted is still quite a bit, but it gives you some perspective. Now, if you move that to 22FDX cost of about $30M, or about $6M a year, that's about 0.5% of AMD's global yearly R&D budget.

The end result of that is a chip that reaches higher clocks and lower power than Bristol/Stoney and costs less per unit (and also less than a cut down Raven Ridge). It's something that AMD can use to address the pretty large low power / low cost market with a small fraction of its R&D budget.

Again, that doesn't mean that the design exists, but I certainly don't see any reason to 100% believe that it doesn't. The market is there, the benefits are there, and the cost isn't exorbitant.

 

[krumme]

Again, talking about 22FDX. Cost is much lower.

Also, here's a link to AMD's R&D spending from 2001 to 2018. That's almost $1.5B spent in 2018 on R&D. So even if that was $100M, or about $20M a year (assuming a 5 year project), that's less than 2% of AMD's R&D budget. Which granted is still quite a bit, but it gives you some perspective. Now, if you move that to 22FDX cost of about $30M, or about $6M a year, that's about 0.5% of AMD's global yearly R&D budget.

The end result of that is a chip that reaches higher clocks and lower power than Bristol/Stoney and costs less per unit (and also less than a cut down Raven Ridge). It's something that AMD can use to address the pretty large low power / low cost market with a small fraction of its R&D budget.

Again, that doesn't mean that the design exists, but I certainly don't see any reason to 100% believe that it doesn't. The market is there, the benefits are there, and the cost isn't exorbitant.

People always have good ideas where to use money. As it's always "just" a little bit compared to the total amount. They seldom have ideas up front where to get those money from.

A business is excactly made up of tons of those small cost. Be it a r&d cost or marketing project.

Looking at cost and say its minor even a pencil or a cup of coffee is the kind of mentality that kills a business.

Some people can find out where to cut cost and prioritize. So they get in charge. It's often not rocket science but you have to have some balls and be able to tackle a certain level of conflict level and managing different interest.

Some advice if you go to your manager. If you want to spend 40M or even 4K on some project be prepared to explain where the money should be cut. And don't point at sales marketing or administrative overhead. Just a good advice if your project is important. If you got a solid plan for financing before you enter the door you are 90% of the way.

 

[NostaSeronx]

The total investment for a 22FDX CPU, a 22FDX GPU, and a 22FDX APU. Would ultimately fit within a single 14-nm project.

In most cases, the 22FDX CPU can re-use 14-nm Matisse I/O die and re-use a modified Orochi floorplan. Orochi didn't have a Northbridge or Southbridge, just HT links and DDR.
Orochi L3+uncore - 192.4 mm squared => There is no need for on-die L3/DRAM and needed HT links would be converted to Infinity Fabric links.
Orochi modules - 123.6 mm squared => (28nm) 78 mm square mm

https://blog.globalfoundries.com/wp-content/uploads/2018/12/AI_blog_2.jpg
While, the 7LP 3D SRAM project is switched to FDX 3D SRAM project.
2 x >78 mm squared CPU dies with each CPU having a 1x >36 square mm SRAM stack. With 1H-4H SRAM being 8(4@min) to 32(16@min) Megabyte high.

That is with 28-nm numbers... but I think some would get the picture. Sixteen cores within $100 and increases usage of the 14LPP I/O. Increasing its effective cost roll over.
(Imagine it in an EPYC2 Opteron config, the most expensive part would be the 14LPP I/O. Low-cost, same core count, entry in servers.)

The Stoney Ridge successor could get a high bandwidth L3 as well if it is also stacked. It would still be less than $40 overall to customers.

15W XV -> 6W Ultimate successor;
>40% higher performance at ~60% the power with a <45% area shrink
>10.8 square mm module + >4.2 GHz stock at 6W.
The above requires the 22FDX node and the design to use more power-efficient/area optimized circuit design. This is the absolute peak for the energy efficient side. The expectation is that there will be negligible performance loss from the circuit refinement. If anything, the long development time is finding these peak refined circuits.

 

[ET]

People always have good ideas where to use money. As it's always "just" a little bit compared to the total amount. They seldom have ideas up front where to get those money from.

A business is excactly made up of tons of those small cost. Be it a r&d cost or marketing project.

...

True, but you and I have no clue about how to manage these costs for AMD, and if there's one thing that's really bad for business it's saving as much as possible. If you want to grow and seize market opportunities, you need to spend money. There's no way around it.

AMD has a very good place to get money from: about $6.5B revenue in 2018. And it has a very good idea what to do with it: spend it on R&D. As I said before: "most arguments against it are only speculations based on what people think AMD should do". And if your only argument is that cost cutting is important, well, that's really bad business if it leaves a company short of a competitive product in a specific market.

In the end, AMD has a lot more data for making that decision. The only point I'm trying to make is that what makes sense to you isn't necessarily the right decision, because your speculation isn't based on any facts, and the fact that your arguments get more vague underlines that.

 

[Insert_Nickname]

No, it didn't. Zen started around 2012, and AMD released quite a few things after that.
Bristol and Stoney were released well into the Zen work cycle.

BR and Stoney are nothing more then reheated 28nm Carrizo. So the design and fabrication work was already done, it just required a bit of integration with the AM4 platform in BR's case.

I think I read somewhere AMD had a few engineers on BD duty to cover the interim while Zen was being designed. But I'm not sure.