Question Alder Lake - Official Thread

[carrotmania]

Imagine if Raptor Lake had launched instead of ADL. AMD would have lost in most MT benchmarks. But Intel is so adept at shooting itself in the foot.

This is one of my favourite things you've ever said...

 

[dark zero]

I found this new and seems that is the Alder Lake-N processor.
And as expected it goes with Quad and Octa core configuration.

So.. small cores got a victory with more cores saying finally goodbye to the 2 core config?

 

[DrMrLordX]

With eight fewer threads. Imagine if Raptor Lake had launched instead of ADL. AMD would have lost in most MT benchmarks. But Intel is so adept at shooting itself in the foot.

It's unlikely that Intel could have launched Raptor Lake in 2021.

 

[igor_kavinski]

It's unlikely that Intel could have launched Raptor Lake in 2021.

I meant, if Intel were firing on all cylinders and ADL never existed in the first place. We could have had RPL in its place and a year later, 8P+32E cores. That would have put AMD under some, if not immense, pressure.

 

[MarkPost]

May I request one more battle? Both Zen 3 and ADL at 8C/16T.

Sorry but for some reason, enabling only one CCD causes 5950X to perform well below a real 5800X/5700X. So it wouldn't be an accurate comparison. I can run the benchmark on 12900k with P-cores only, lets say @4.0ghz and see if someone here with a 5800X/5700X run the benchmark at the same speed...

 

[Kocicak]

I meant, if Intel were firing on all cylinders and ADL never existed in the first place. We could have had RPL in its place and a year later, 8P+32E cores. That would have put AMD under some, if not immense, pressure.

8P+32E cores at 600W ? Sizzle. I mean - we would probably see some power delivery components on motherboards popping under pressure - not AMD.

Such a large die would be very expensive to make too. Even the Raptor lake 8+16 dies look pretty large.

 

[igor_kavinski]

8P+32E cores at 600W ?

They would have to downclock the cores a bit to keep them within 350W TDP. Wasting time on the useless Rocket Lake launch was the stupid decision that probably resulted in diverting valuable engineering resources away from more important things, like ADL/RPL and SPR.

They did it just to give their 14nm fabs something to do. Instead of backporting Tiger Lake, they could have backported Golden Cove cores without Gracemont cores to 14nm and gotten some competitive CPUs in the hands of customers around the time Zen 3 launched.

 

[DrMrLordX]

I meant, if Intel were firing on all cylinders and ADL never existed in the first place. We could have had RPL in its place and a year later, 8P+32E cores. That would have put AMD under some, if not immense, pressure.

Yeah that's what I was addressing directly. I don't think they had the capability at all, even "firing on all cylinders".

 

[moinmoin]

Instead of backporting Tiger Lake, they could have backported Golden Cove cores without Gracemont cores to 14nm and gotten some competitive CPUs in the hands of customers around the time Zen 3 launched.

That wouldn't have fared much better. Rocket's problem wasn't TGL, it was 14nm and an obvious lack of optimization for it.

 

[igor_kavinski]

That wouldn't have fared much better.

Heat-wise, yes it wouldn't have helped but they could have gotten better than RKL IPC. Some dumb group of Intel engineers gets very excited at the prospect of high bandwidth RAM. That's why they wasted their time optimizing ADL for DDR5 and mispredicted DDR5's rate of adoption. They could have simply worked more on getting their IMC to play better with DDR4-3800 or DDR4-4000. Their fetish for DDR5 led to getting forced to release RKL to buy some more time.

I also blame idiot Intel marketing folks. Here's the sort of discussion they had:

Q: When is AMD going to release their DDR5 parts?

A: Not on time.

Marketing: Great! We can hype up the massive benefits of DDR5! We'll be first to market!

Engineers: Umm...there's the issue of higher latency...

Marketing: Who cares??? DDR5-4800 looks so much better than DDR4-3200. It's a no contest on paper!

And Marketing won.

I have enough rage right now to incinerate them, just by looking at them

 

[Exist50]

They would have to downclock the cores a bit to keep them within 350W TDP. Wasting time on the useless Rocket Lake launch was the stupid decision that probably resulted in diverting valuable engineering resources away from more important things, like ADL/RPL and SPR.

They did it just to give their 14nm fabs something to do. Instead of backporting Tiger Lake, they could have backported Golden Cove cores without Gracemont cores to 14nm and gotten some competitive CPUs in the hands of customers around the time Zen 3 launched.

Rocket Lake was an Ice Lake backport. No chance would they have been able to backport Alder Lake on a similar timeline.

 

[LightningZ71]

They would likely have done better to release cascade lake die in up to 12-16 cores with decent L3 and only dual channel DDR4 with ice lake mobile covering the i3 and below market. Would have been cheaper to develop and compete just as well. Maybe even a cut down Cooper Lake die.

 

[Makaveli]

Sorry but for some reason, enabling only one CCD causes 5950X to perform well below a real 5800X/5700X. So it wouldn't be an accurate comparison. I can run the benchmark on 12900k with P-cores only, lets say @4.0ghz and see if someone here with a 5800X/5700X run the benchmark at the same speed...

I would consider running it but you want the cpu capped at 4Ghz?

 

[dark zero]

Waiting for Alder Lake -N and see how fares against the Celeron and Pentium in desktop tier. I mean, they are gonna dissapear in Single Thread, but how about Multi Thread?

 

[igor_kavinski]

I would consider running it but you want the cpu capped at 4Ghz?

Can you run it please, at 4GHz?